[golan] Add Connect-IB, ConnectX-4 and ConnectX-4 Lx (Infiniband) support
[ipxe.git] / src / drivers / infiniband / CIB_PRM.h
1 /*
2 * Copyright (C) 2013-2015 Mellanox Technologies Ltd.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of the
7 * License, or any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
17 * 02110-1301, USA.
18 */
19
20 FILE_LICENCE ( GPL2_OR_LATER );
21
22 #ifndef __CIB_PRM__
23 #define __CIB_PRM__
24
25 typedef unsigned long long __be64;
26 typedef uint32_t __be32;
27 typedef uint16_t __be16;
28
29 #define GOLAN_CMD_DATA_BLOCK_SIZE (1 << 9)
30 #define GOLAN_CMD_PAS_CNT (GOLAN_CMD_DATA_BLOCK_SIZE / sizeof(__be64))
31 #define MAILBOX_STRIDE (1 << 10)
32 #define MAILBOX_MASK (MAILBOX_STRIDE - 1)
33
34 #define GOLAN_PCI_CMD_XPORT 7
35 #define CMD_OWNER_HW 0x1
36
37 #define IB_NUM_PKEYS 0x20
38
39 struct health_buffer {
40 __be32 assert_var[5];
41 __be32 rsvd0[3];
42 __be32 assert_exit_ptr;
43 __be32 assert_callra;
44 __be32 rsvd1[2];
45 __be32 fw_ver;
46 __be32 hw_id;
47 __be32 rsvd2;
48 u8 irisc_index;
49 u8 synd;
50 __be16 ext_sync;
51 } __attribute ( ( packed ) );
52
53 struct golan_hca_init_seg {
54 __be32 fw_rev;
55 __be32 cmdif_rev_fw_sub;
56 __be32 rsvd0[2];
57 __be32 cmdq_addr_h;
58 __be32 cmdq_addr_l_sz;
59 __be32 cmd_dbell;
60 __be32 rsvd1[121];
61 struct health_buffer health;
62 __be32 rsvd2[884];
63 __be32 health_counter;
64 __be32 rsvd3[1023];
65 __be64 ieee1588_clk;
66 __be32 ieee1588_clk_type;
67 __be32 clr_intx;
68 } __attribute ( ( packed ) );
69
70 enum golan_manage_pages_mode {
71 GOLAN_PAGES_CANT_GIVE = 0,
72 GOLAN_PAGES_GIVE = 1,
73 GOLAN_PAGES_TAKE = 2
74 };
75
76 enum golan_qry_pages_mode {
77 GOLAN_BOOT_PAGES = 0x1,
78 GOLAN_INIT_PAGES = 0x2,
79 GOLAN_REG_PAGES = 0x3,
80 };
81
82 enum {
83 GOLAN_REG_PCAP = 0x5001,
84 GOLAN_REG_PMTU = 0x5003,
85 GOLAN_REG_PTYS = 0x5004,
86 GOLAN_REG_PAOS = 0x5006,
87 GOLAN_REG_PMAOS = 0x5012,
88 GOLAN_REG_PUDE = 0x5009,
89 GOLAN_REG_PMPE = 0x5010,
90 GOLAN_REG_PELC = 0x500e,
91 GOLAN_REG_PMLP = 0, /* TBD */
92 GOLAN_REG_NODE_DESC = 0x6001,
93 GOLAN_REG_HOST_ENDIANESS = 0x7004,
94 };
95
96 enum {
97 GOLAN_CMD_OP_QUERY_HCA_CAP = 0x100,
98 GOLAN_CMD_OP_QUERY_ADAPTER = 0x101,
99 GOLAN_CMD_OP_INIT_HCA = 0x102,
100 GOLAN_CMD_OP_TEARDOWN_HCA = 0x103,
101 GOLAN_CMD_OP_ENABLE_HCA = 0x104,
102 GOLAN_CMD_OP_DISABLE_HCA = 0x105,
103
104 GOLAN_CMD_OP_QUERY_PAGES = 0x107,
105 GOLAN_CMD_OP_MANAGE_PAGES = 0x108,
106 GOLAN_CMD_OP_SET_HCA_CAP = 0x109,
107
108 GOLAN_CMD_OP_CREATE_MKEY = 0x200,
109 GOLAN_CMD_OP_QUERY_MKEY = 0x201,
110 GOLAN_CMD_OP_DESTROY_MKEY = 0x202,
111 GOLAN_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
112
113 GOLAN_CMD_OP_CREATE_EQ = 0x301,
114 GOLAN_CMD_OP_DESTROY_EQ = 0x302,
115 GOLAN_CMD_OP_QUERY_EQ = 0x303,
116
117 GOLAN_CMD_OP_CREATE_CQ = 0x400,
118 GOLAN_CMD_OP_DESTROY_CQ = 0x401,
119 GOLAN_CMD_OP_QUERY_CQ = 0x402,
120 GOLAN_CMD_OP_MODIFY_CQ = 0x403,
121
122 GOLAN_CMD_OP_CREATE_QP = 0x500,
123 GOLAN_CMD_OP_DESTROY_QP = 0x501,
124 GOLAN_CMD_OP_RST2INIT_QP = 0x502,
125 GOLAN_CMD_OP_INIT2RTR_QP = 0x503,
126 GOLAN_CMD_OP_RTR2RTS_QP = 0x504,
127 GOLAN_CMD_OP_RTS2RTS_QP = 0x505,
128 GOLAN_CMD_OP_SQERR2RTS_QP = 0x506,
129 GOLAN_CMD_OP_2ERR_QP = 0x507,
130 GOLAN_CMD_OP_RTS2SQD_QP = 0x508,
131 GOLAN_CMD_OP_SQD2RTS_QP = 0x509,
132 GOLAN_CMD_OP_2RST_QP = 0x50a,
133 GOLAN_CMD_OP_QUERY_QP = 0x50b,
134 GOLAN_CMD_OP_CONF_SQP = 0x50c,
135 GOLAN_CMD_OP_MAD_IFC = 0x50d,
136 GOLAN_CMD_OP_INIT2INIT_QP = 0x50e,
137 GOLAN_CMD_OP_SUSPEND_QP = 0x50f,
138 GOLAN_CMD_OP_UNSUSPEND_QP = 0x510,
139 GOLAN_CMD_OP_SQD2SQD_QP = 0x511,
140 GOLAN_CMD_OP_ALLOC_QP_COUNTER_SET = 0x512,
141 GOLAN_CMD_OP_DEALLOC_QP_COUNTER_SET = 0x513,
142 GOLAN_CMD_OP_QUERY_QP_COUNTER_SET = 0x514,
143
144 GOLAN_CMD_OP_CREATE_PSV = 0x600,
145 GOLAN_CMD_OP_DESTROY_PSV = 0x601,
146 GOLAN_CMD_OP_QUERY_PSV = 0x602,
147 GOLAN_CMD_OP_QUERY_SIG_RULE_TABLE = 0x603,
148 GOLAN_CMD_OP_QUERY_BLOCK_SIZE_TABLE = 0x604,
149
150 GOLAN_CMD_OP_CREATE_SRQ = 0x700,
151 GOLAN_CMD_OP_DESTROY_SRQ = 0x701,
152 GOLAN_CMD_OP_QUERY_SRQ = 0x702,
153 GOLAN_CMD_OP_ARM_RQ = 0x703,
154 GOLAN_CMD_OP_RESIZE_SRQ = 0x704,
155
156 GOLAN_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
157 GOLAN_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
158 GOLAN_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
159
160 GOLAN_CMD_OP_ALLOC_PD = 0x800,
161 GOLAN_CMD_OP_DEALLOC_PD = 0x801,
162 GOLAN_CMD_OP_ALLOC_UAR = 0x802,
163 GOLAN_CMD_OP_DEALLOC_UAR = 0x803,
164
165 GOLAN_CMD_OP_ATTACH_TO_MCG = 0x806,
166 GOLAN_CMD_OP_DETACH_FROM_MCG = 0x807,
167
168
169 GOLAN_CMD_OP_ALLOC_XRCD = 0x80e,
170 GOLAN_CMD_OP_DEALLOC_XRCD = 0x80f,
171
172 GOLAN_CMD_OP_ACCESS_REG = 0x805,
173 };
174
175 struct golan_inbox_hdr {
176 __be16 opcode;
177 u8 rsvd[4];
178 __be16 opmod;
179 } __attribute ( ( packed ) );
180
181 struct golan_cmd_layout {
182 u8 type;
183 u8 rsvd0[3];
184 __be32 inlen;
185 union {
186 __be64 in_ptr;
187 __be32 in_ptr32[2];
188 };
189 __be32 in[4];
190 __be32 out[4];
191 union {
192 __be64 out_ptr;
193 __be32 out_ptr32[2];
194 };
195 __be32 outlen;
196 u8 token;
197 u8 sig;
198 u8 rsvd1;
199 volatile u8 status_own;
200 } __attribute ( ( packed ) );
201
202 struct golan_outbox_hdr {
203 u8 status;
204 u8 rsvd[3];
205 __be32 syndrome;
206 } __attribute ( ( packed ) );
207
208 enum {
209 GOLAN_DEV_CAP_FLAG_RC = 1LL << 0,
210 GOLAN_DEV_CAP_FLAG_UC = 1LL << 1,
211 GOLAN_DEV_CAP_FLAG_UD = 1LL << 2,
212 GOLAN_DEV_CAP_FLAG_XRC = 1LL << 3,
213 GOLAN_DEV_CAP_FLAG_SRQ = 1LL << 6,
214 GOLAN_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1LL << 8,
215 GOLAN_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1LL << 9,
216 GOLAN_DEV_CAP_FLAG_APM = 1LL << 17,
217 GOLAN_DEV_CAP_FLAG_ATOMIC = 1LL << 18,
218 GOLAN_DEV_CAP_FLAG_ON_DMND_PG = 1LL << 24,
219 GOLAN_DEV_CAP_FLAG_RESIZE_SRQ = 1LL << 32,
220 GOLAN_DEV_CAP_FLAG_REMOTE_FENCE = 1LL << 38,
221 GOLAN_DEV_CAP_FLAG_TLP_HINTS = 1LL << 39,
222 GOLAN_DEV_CAP_FLAG_SIG_HAND_OVER = 1LL << 40,
223 GOLAN_DEV_CAP_FLAG_DCT = 1LL << 41,
224 GOLAN_DEV_CAP_FLAG_CMDIF_CSUM = 1LL << 46,
225 };
226
227
228 struct golan_hca_cap {
229 u8 rsvd1[16];
230 u8 log_max_srq_sz;
231 u8 log_max_qp_sz;
232 u8 rsvd2;
233 u8 log_max_qp;
234 u8 log_max_strq_sz;
235 u8 log_max_srqs;
236 u8 rsvd4[2];
237 u8 rsvd5;
238 u8 log_max_cq_sz;
239 u8 rsvd6;
240 u8 log_max_cq;
241 u8 log_max_eq_sz;
242 u8 log_max_mkey;
243 u8 rsvd7;
244 u8 log_max_eq;
245 u8 max_indirection;
246 u8 log_max_mrw_sz;
247 u8 log_max_bsf_list_sz;
248 u8 log_max_klm_list_sz;
249 u8 rsvd_8_0;
250 u8 log_max_ra_req_dc;
251 u8 rsvd_8_1;
252 u8 log_max_ra_res_dc;
253 u8 rsvd9;
254 u8 log_max_ra_req_qp;
255 u8 rsvd10;
256 u8 log_max_ra_res_qp;
257 u8 rsvd11[4];
258 __be16 max_qp_count;
259 __be16 pkey_table_size;
260 u8 rsvd13;
261 u8 local_ca_ack_delay;
262 u8 rsvd14;
263 u8 num_ports;
264 u8 log_max_msg;
265 u8 rsvd15[3];
266 __be16 stat_rate_support;
267 u8 rsvd16[2];
268 __be64 flags;
269 u8 rsvd17;
270 u8 uar_sz;
271 u8 rsvd18;
272 u8 log_pg_sz;
273 __be16 bf_log_bf_reg_size;
274 u8 rsvd19[4];
275 __be16 max_wqe_sz_sq;
276 u8 rsvd20[2];
277 __be16 max_wqe_sz_rq;
278 u8 rsvd21[2];
279 __be16 max_wqe_sz_sq_dc;
280 u8 rsvd22[4];
281 __be16 max_qp_mcg;
282 u8 rsvd23;
283 u8 log_max_mcg;
284 u8 rsvd24;
285 u8 log_max_pd;
286 u8 rsvd25;
287 u8 log_max_xrcd;
288 u8 rsvd26[40];
289 __be32 uar_page_sz;
290 u8 rsvd27[28];
291 u8 log_msx_atomic_size_qp;
292 u8 rsvd28[2];
293 u8 log_msx_atomic_size_dc;
294 u8 rsvd29[76];
295 } __attribute ( ( packed ) );
296
297 struct golan_query_pages_inbox {
298 struct golan_inbox_hdr hdr;
299 u8 rsvd[8];
300 } __attribute ( ( packed ) );
301
302 struct golan_query_pages_outbox {
303 struct golan_outbox_hdr hdr;
304 u8 rsvd[2];
305 __be16 func_id;
306 __be32 num_pages;
307 } __attribute ( ( packed ) );
308
309 struct golan_cmd_query_hca_cap_mbox_in {
310 struct golan_inbox_hdr hdr;
311 u8 rsvd[8];
312 } __attribute ( ( packed ) );
313
314 struct golan_cmd_query_hca_cap_mbox_out {
315 struct golan_outbox_hdr hdr;
316 u8 rsvd0[8];
317 struct golan_hca_cap hca_cap;
318 } __attribute ( ( packed ) );
319
320 struct golan_cmd_set_hca_cap_mbox_in {
321 struct golan_inbox_hdr hdr;
322 u8 rsvd[8];
323 struct golan_hca_cap hca_cap;
324 } __attribute ( ( packed ) );
325
326 struct golan_cmd_set_hca_cap_mbox_out {
327 struct golan_outbox_hdr hdr;
328 u8 rsvd0[8];
329 } __attribute ( ( packed ) );
330
331 struct golan_cmd_init_hca_mbox_in {
332 struct golan_inbox_hdr hdr;
333 u8 rsvd0[2];
334 __be16 profile;
335 u8 rsvd1[4];
336 } __attribute ( ( packed ) );
337
338 struct golan_cmd_init_hca_mbox_out {
339 struct golan_outbox_hdr hdr;
340 u8 rsvd[8];
341 } __attribute ( ( packed ) );
342
343 enum golan_teardown {
344 GOLAN_TEARDOWN_GRACEFUL = 0x0,
345 GOLAN_TEARDOWN_PANIC = 0x1
346 };
347
348 struct golan_cmd_teardown_hca_mbox_in {
349 struct golan_inbox_hdr hdr;
350 u8 rsvd0[2];
351 __be16 profile;
352 u8 rsvd1[4];
353 } __attribute ( ( packed ) );
354
355 struct golan_cmd_teardown_hca_mbox_out {
356 struct golan_outbox_hdr hdr;
357 u8 rsvd[8];
358 } __attribute ( ( packed ) );
359
360 struct golan_enable_hca_mbox_in {
361 struct golan_inbox_hdr hdr;
362 u8 rsvd[8];
363 } __attribute ( ( packed ) );
364
365 struct golan_enable_hca_mbox_out {
366 struct golan_outbox_hdr hdr;
367 u8 rsvd[8];
368 } __attribute ( ( packed ) );
369
370 struct golan_disable_hca_mbox_in {
371 struct golan_inbox_hdr hdr;
372 u8 rsvd[8];
373 } __attribute ( ( packed ) );
374
375 struct golan_disable_hca_mbox_out {
376 struct golan_outbox_hdr hdr;
377 u8 rsvd[8];
378 } __attribute ( ( packed ) );
379
380 struct golan_manage_pages_inbox_data {
381 u8 rsvd2[16];
382 __be64 pas[0];
383 } __attribute ( ( packed ) );
384
385 struct golan_manage_pages_inbox {
386 struct golan_inbox_hdr hdr;
387 __be16 rsvd0;
388 __be16 func_id;
389 __be32 num_entries;
390 struct golan_manage_pages_inbox_data data;
391 } __attribute ( ( packed ) );
392
393 struct golan_manage_pages_outbox_data {
394 __be64 pas[0];
395 } __attribute ( ( packed ) );
396
397 struct golan_manage_pages_outbox {
398 struct golan_outbox_hdr hdr;
399 __be32 num_entries;
400 __be32 rsrvd;
401 struct golan_manage_pages_outbox_data data;
402 } __attribute ( ( packed ) );
403
404 struct golan_reg_host_endianess {
405 u8 he;
406 u8 rsvd[15];
407 } __attribute ( ( packed ) );
408
409 struct golan_cmd_prot_block {
410 union {
411 __be64 data[GOLAN_CMD_PAS_CNT];
412 u8 bdata[GOLAN_CMD_DATA_BLOCK_SIZE];
413 };
414 u8 rsvd0[48];
415 __be64 next;
416 __be32 block_num;
417 u8 rsvd1;
418 u8 token;
419 u8 ctrl_sig;
420 u8 sig;
421 } __attribute ( ( packed ) );
422
423 /* MAD IFC structures */
424 #define GOLAN_MAD_SIZE 256
425 #define GOLAN_MAD_IFC_NO_VALIDATION 0x3
426 #define GOLAN_MAD_IFC_RLID_BIT 16
427
428 struct golan_mad_ifc_mbox_in {
429 struct golan_inbox_hdr hdr;
430 __be16 remote_lid;
431 u8 rsvd0;
432 u8 port;
433 u8 rsvd1[4];
434 u8 mad[GOLAN_MAD_SIZE];
435 } __attribute ( ( packed ) );
436
437 struct golan_mad_ifc_mbox_out {
438 struct golan_outbox_hdr hdr;
439 u8 rsvd[8];
440 u8 mad[GOLAN_MAD_SIZE];
441 } __attribute ( ( packed ) );
442
443 /* UAR Structures */
444 struct golan_alloc_uar_mbox_in {
445 struct golan_inbox_hdr hdr;
446 u8 rsvd[8];
447 } __attribute ( ( packed ) );
448
449 struct golan_alloc_uar_mbox_out {
450 struct golan_outbox_hdr hdr;
451 __be32 uarn;
452 u8 rsvd[4];
453 } __attribute ( ( packed ) );
454
455 struct golan_free_uar_mbox_in {
456 struct golan_inbox_hdr hdr;
457 __be32 uarn;
458 u8 rsvd[4];
459 } __attribute ( ( packed ) );
460
461 struct golan_free_uar_mbox_out {
462 struct golan_outbox_hdr hdr;
463 u8 rsvd[8];
464 } __attribute ( ( packed ) );
465
466 /* Event Queue Structures */
467 enum {
468 GOLAN_EQ_STATE_ARMED = 0x9,
469 GOLAN_EQ_STATE_FIRED = 0xa,
470 GOLAN_EQ_STATE_ALWAYS_ARMED = 0xb,
471 };
472
473
474 struct golan_eq_context {
475 u8 status;
476 u8 ec_oi;
477 u8 st;
478 u8 rsvd2[7];
479 __be16 page_pffset;
480 __be32 log_sz_usr_page;
481 u8 rsvd3[7];
482 u8 intr;
483 u8 log_page_size;
484 u8 rsvd4[15];
485 __be32 consumer_counter;
486 __be32 produser_counter;
487 u8 rsvd5[16];
488 } __attribute ( ( packed ) );
489
490 struct golan_create_eq_mbox_in_data {
491 struct golan_eq_context ctx;
492 u8 rsvd2[8];
493 __be64 events_mask;
494 u8 rsvd3[176];
495 __be64 pas[0];
496 } __attribute ( ( packed ) );
497
498 struct golan_create_eq_mbox_in {
499 struct golan_inbox_hdr hdr;
500 u8 rsvd0[3];
501 u8 input_eqn;
502 u8 rsvd1[4];
503 struct golan_create_eq_mbox_in_data data;
504 } __attribute ( ( packed ) );
505
506 struct golan_create_eq_mbox_out {
507 struct golan_outbox_hdr hdr;
508 u8 rsvd0[3];
509 u8 eq_number;
510 u8 rsvd1[4];
511 } __attribute ( ( packed ) );
512
513 struct golan_destroy_eq_mbox_in {
514 struct golan_inbox_hdr hdr;
515 u8 rsvd0[3];
516 u8 eqn;
517 u8 rsvd1[4];
518 } __attribute ( ( packed ) );
519
520 struct golan_destroy_eq_mbox_out {
521 struct golan_outbox_hdr hdr;
522 u8 rsvd[8];
523 } __attribute ( ( packed ) );
524
525 /***********************************************/
526 /************** Query Vport ****************/
527 struct golan_query_hca_vport_context_inbox {
528 struct golan_inbox_hdr hdr;
529 __be16 other_vport : 1;
530 __be16 rsvd1 : 7;
531 __be16 port_num : 4;
532 __be16 rsvd2 : 4;
533 __be16 vport_number;
534 u8 rsvd[4];
535 } __attribute ( ( packed ) );
536
537 struct golan_query_hca_vport_context_data {
538 __be32 field_select;
539 __be32 rsvd1[7];
540 //****
541 __be16 sm_virt_aware : 1;
542 __be16 has_smi : 1;
543 __be16 has_raw : 1;
544 __be16 grh_required : 1;
545 __be16 rsvd2 : 12;
546 u8 port_physical_state : 4;
547 u8 vport_state_policy : 4;
548 u8 port_state : 4;
549 u8 vport_state : 4;
550 //****
551 u8 rsvd3[4];
552 //****
553 __be32 system_image_guid[2];
554 //****
555 __be32 port_guid[2];
556 //****
557 __be32 node_guid[2];
558 //****
559 __be32 cap_mask1;
560 __be32 cap_mask1_field_select;
561 __be32 cap_mask2;
562 __be32 cap_mask2_field_select;
563 u8 rsvd4[16];
564 __be16 lid;
565 u8 rsvd5 : 4;
566 u8 init_type_reply : 4;
567 u8 lmc : 3;
568 u8 subnet_timeout : 5;
569 __be16 sm_lid;
570 u8 sm_sl : 4;
571 u8 rsvd6 : 4;
572 u8 rsvd7;
573 __be16 qkey_violation_counter;
574 __be16 pkey_violation_counter;
575 u8 rsvd8[100];
576 } __attribute ( ( packed ) );
577
578 struct golan_query_hca_vport_context_outbox {
579 struct golan_outbox_hdr hdr;
580 u8 rsvd[8];
581 struct golan_query_hca_vport_context_data context_data;
582 } __attribute ( ( packed ) );
583
584 struct golan_query_hca_vport_gid_inbox {
585 struct golan_inbox_hdr hdr;
586 u8 other_vport : 1;
587 u8 rsvd1 : 7;
588 u8 port_num : 4;
589 u8 rsvd2 : 4;
590 __be16 vport_number;
591 __be16 rsvd3;
592 __be16 gid_index;
593 } __attribute ( ( packed ) );
594
595 struct golan_query_hca_vport_gid_outbox {
596 struct golan_outbox_hdr hdr;
597 u8 rsvd0[4];
598 __be16 gids_num;
599 u8 rsvd1[2];
600 __be32 gid0[4];
601 } __attribute ( ( packed ) );
602
603 struct golan_query_hca_vport_pkey_inbox {
604 struct golan_inbox_hdr hdr;
605 u8 other_vport : 1;
606 u8 rsvd1 : 7;
607 u8 port_num : 4;
608 u8 rsvd2 : 4;
609 __be16 vport_number;
610 __be16 rsvd3;
611 __be16 pkey_index;
612 } __attribute ( ( packed ) );
613
614 struct golan_query_hca_vport_pkey_data {
615 __be16 rsvd1;
616 __be16 pkey0;
617 } __attribute ( ( packed ) );
618
619 struct golan_query_hca_vport_pkey_outbox {
620 struct golan_outbox_hdr hdr;
621 u8 rsvd[8];
622 struct golan_query_hca_vport_pkey_data *pkey_data;
623 } __attribute ( ( packed ) );
624
625 struct golan_eqe_comp {
626 __be32 reserved[6];
627 __be32 cqn;
628 } __attribute ( ( packed ) );
629
630 struct golan_eqe_qp_srq {
631 __be32 reserved[6];
632 __be32 qp_srq_n;
633 } __attribute ( ( packed ) );
634
635 struct golan_eqe_cq_err {
636 __be32 cqn;
637 u8 reserved1[7];
638 u8 syndrome;
639 } __attribute ( ( packed ) );
640
641 struct golan_eqe_dropped_packet {
642 };
643
644 struct golan_eqe_port_state {
645 u8 reserved0[8];
646 u8 port;
647 } __attribute ( ( packed ) );
648
649 struct golan_eqe_gpio {
650 __be32 reserved0[2];
651 __be64 gpio_event;
652 } __attribute ( ( packed ) );
653
654 struct golan_eqe_congestion {
655 u8 type;
656 u8 rsvd0;
657 u8 congestion_level;
658 } __attribute ( ( packed ) );
659
660 struct golan_eqe_stall_vl {
661 u8 rsvd0[3];
662 u8 port_vl;
663 } __attribute ( ( packed ) );
664
665 struct golan_eqe_cmd {
666 __be32 vector;
667 __be32 rsvd[6];
668 } __attribute ( ( packed ) );
669
670 struct golan_eqe_page_req {
671 u8 rsvd0[2];
672 __be16 func_id;
673 u8 rsvd1[2];
674 __be16 num_pages;
675 __be32 rsvd2[5];
676 } __attribute ( ( packed ) );
677
678 union ev_data {
679 __be32 raw[7];
680 struct golan_eqe_cmd cmd;
681 struct golan_eqe_comp comp;
682 struct golan_eqe_qp_srq qp_srq;
683 struct golan_eqe_cq_err cq_err;
684 struct golan_eqe_dropped_packet dp;
685 struct golan_eqe_port_state port;
686 struct golan_eqe_gpio gpio;
687 struct golan_eqe_congestion cong;
688 struct golan_eqe_stall_vl stall_vl;
689 struct golan_eqe_page_req req_pages;
690 } __attribute__ ((packed));
691
692 struct golan_eqe {
693 u8 rsvd0;
694 u8 type;
695 u8 rsvd1;
696 u8 sub_type;
697 __be32 rsvd2[7];
698 union ev_data data;
699 __be16 rsvd3;
700 u8 signature;
701 u8 owner;
702 } __attribute__ ((packed));
703
704 /* Protection Domain Structures */
705 struct golan_alloc_pd_mbox_in {
706 struct golan_inbox_hdr hdr;
707 u8 rsvd[8];
708 } __attribute ( ( packed ) );
709
710 struct golan_alloc_pd_mbox_out {
711 struct golan_outbox_hdr hdr;
712 __be32 pdn;
713 u8 rsvd[4];
714 } __attribute ( ( packed ) );
715
716 struct golan_dealloc_pd_mbox_in {
717 struct golan_inbox_hdr hdr;
718 __be32 pdn;
719 u8 rsvd[4];
720 } __attribute ( ( packed ) );
721
722 struct golan_dealloc_pd_mbox_out {
723 struct golan_outbox_hdr hdr;
724 u8 rsvd[8];
725 } __attribute ( ( packed ) );
726
727 /* Memory key structures */
728 #define GOLAN_IB_ACCESS_LOCAL_READ (1 << 2)
729 #define GOLAN_IB_ACCESS_LOCAL_WRITE (1 << 3)
730 #define GOLAN_MKEY_LEN64 (1 << 31)
731 #define GOLAN_CREATE_MKEY_SEG_QPN_BIT 8
732
733 struct golan_mkey_seg {
734 /*
735 * This is a two bit field occupying bits 31-30.
736 * bit 31 is always 0,
737 * bit 30 is zero for regular MRs and 1 (e.g free) for UMRs that do not have tanslation
738 */
739 u8 status;
740 u8 pcie_control;
741 u8 flags;
742 u8 version;
743 __be32 qpn_mkey7_0;
744 u8 rsvd1[4];
745 __be32 flags_pd;
746 __be64 start_addr;
747 __be64 len;
748 __be32 bsfs_octo_size;
749 u8 rsvd2[16];
750 __be32 xlt_oct_size;
751 u8 rsvd3[3];
752 u8 log2_page_size;
753 u8 rsvd4[4];
754 } __attribute ( ( packed ) );
755
756 struct golan_create_mkey_mbox_in_data {
757 struct golan_mkey_seg seg;
758 u8 rsvd1[16];
759 __be32 xlat_oct_act_size;
760 __be32 bsf_coto_act_size;
761 u8 rsvd2[168];
762 __be64 pas[0];
763 } __attribute ( ( packed ) );
764
765 struct golan_create_mkey_mbox_in {
766 struct golan_inbox_hdr hdr;
767 __be32 input_mkey_index;
768 u8 rsvd0[4];
769 struct golan_create_mkey_mbox_in_data data;
770 } __attribute ( ( packed ) );
771
772 struct golan_create_mkey_mbox_out {
773 struct golan_outbox_hdr hdr;
774 __be32 mkey;
775 u8 rsvd[4];
776 } __attribute ( ( packed ) );
777
778 struct golan_destroy_mkey_mbox_in {
779 struct golan_inbox_hdr hdr;
780 __be32 mkey;
781 u8 rsvd[4];
782 } __attribute ( ( packed ) );
783
784 struct golan_destroy_mkey_mbox_out {
785 struct golan_outbox_hdr hdr;
786 u8 rsvd[8];
787 } __attribute ( ( packed ) );
788
789 /* Completion Queue Structures */
790 enum {
791 GOLAN_CQ_STATE_ARMED = 9,
792 GOLAN_CQ_STATE_ALWAYS_ARMED = 0xb,
793 GOLAN_CQ_STATE_FIRED = 0xa
794 };
795
796 enum {
797 GOLAN_CQE_REQ = 0,
798 GOLAN_CQE_RESP_WR_IMM = 1,
799 GOLAN_CQE_RESP_SEND = 2,
800 GOLAN_CQE_RESP_SEND_IMM = 3,
801 GOLAN_CQE_RESP_SEND_INV = 4,
802 GOLAN_CQE_RESIZE_CQ = 0xff, /* TBD */
803 GOLAN_CQE_REQ_ERR = 13,
804 GOLAN_CQE_RESP_ERR = 14
805 };
806
807 struct golan_cq_context {
808 u8 status;
809 u8 cqe_sz_flags;
810 u8 st;
811 u8 rsvd3;
812 u8 rsvd4[6];
813 __be16 page_offset;
814 __be32 log_sz_usr_page;
815 __be16 cq_period;
816 __be16 cq_max_count;
817 __be16 rsvd20;
818 __be16 c_eqn;
819 u8 log_pg_sz;
820 u8 rsvd25[7];
821 __be32 last_notified_index;
822 __be32 solicit_producer_index;
823 __be32 consumer_counter;
824 __be32 producer_counter;
825 u8 rsvd48[8];
826 __be64 db_record_addr;
827 } __attribute ( ( packed ) );
828
829
830 struct golan_create_cq_mbox_in_data {
831 struct golan_cq_context ctx;
832 u8 rsvd6[192];
833 __be64 pas[0];
834 } __attribute ( ( packed ) );
835
836 struct golan_create_cq_mbox_in {
837 struct golan_inbox_hdr hdr;
838 __be32 input_cqn;
839 u8 rsvdx[4];
840 struct golan_create_cq_mbox_in_data data;
841 } __attribute ( ( packed ) );
842
843 struct golan_create_cq_mbox_out {
844 struct golan_outbox_hdr hdr;
845 __be32 cqn;
846 u8 rsvd0[4];
847 } __attribute ( ( packed ) );
848
849 struct golan_destroy_cq_mbox_in {
850 struct golan_inbox_hdr hdr;
851 __be32 cqn;
852 u8 rsvd0[4];
853 } __attribute ( ( packed ) );
854
855 struct golan_destroy_cq_mbox_out {
856 struct golan_outbox_hdr hdr;
857 u8 rsvd0[8];
858 } __attribute ( ( packed ) );
859
860 struct golan_err_cqe {
861 u8 rsvd0[32];
862 __be32 srqn;
863 u8 rsvd1[16];
864 u8 hw_syndrom;
865 u8 rsvd2;
866 u8 vendor_err_synd;
867 u8 syndrome;
868 __be32 s_wqe_opcode_qpn;
869 __be16 wqe_counter;
870 u8 signature;
871 u8 op_own;
872 } __attribute ( ( packed ) );
873
874 struct golan_cqe64 {
875 u8 rsvd0[17];
876 u8 ml_path;
877 u8 rsvd20[4];
878 __be16 slid;
879 __be32 flags_rqpn;
880 u8 rsvd28[4];
881 __be32 srqn;
882 __be32 imm_inval_pkey;
883 u8 rsvd40[4];
884 __be32 byte_cnt;
885 __be64 timestamp;
886 __be32 sop_drop_qpn;
887 __be16 wqe_counter;
888 u8 signature;
889 u8 op_own;
890 } __attribute ( ( packed ) );
891
892 /* Queue Pair Structures */
893 #define GOLAN_QP_CTX_ST_BIT 16
894 #define GOLAN_QP_CTX_PM_STATE_BIT 11
895 #define GOLAN_QP_CTX_FRE_BIT 11
896 #define GOLAN_QP_CTX_RLKY_BIT 4
897 #define GOLAN_QP_CTX_RQ_SIZE_BIT 3
898 #define GOLAN_QP_CTX_SQ_SIZE_BIT 11
899 #define GOLAN_QP_CTX_MTU_BIT 5
900 #define GOLAN_QP_CTX_ACK_REQ_FREQ_BIT 28
901
902 enum {
903 GOLAN_QP_CTX_DONT_USE_RSRVD_LKEY = 0,
904 GOLAN_QP_CTX_USE_RSRVD_LKEY = 1
905 };
906
907 enum {
908 GOLAN_IB_ACK_REQ_FREQ = 8,
909 };
910
911 enum golan_qp_optpar {
912 GOLAN_QP_PARAM_ALT_ADDR_PATH = 1 << 0,
913 GOLAN_QP_PARAM_RRE = 1 << 1,
914 GOLAN_QP_PARAM_RAE = 1 << 2,
915 GOLAN_QP_PARAM_RWE = 1 << 3,
916 GOLAN_QP_PARAM_PKEY_INDEX = 1 << 4,
917 GOLAN_QP_PARAM_Q_KEY = 1 << 5,
918 GOLAN_QP_PARAM_RNR_TIMEOUT = 1 << 6,
919 GOLAN_QP_PARAM_PRIMARY_ADDR_PATH = 1 << 7,
920 GOLAN_QP_PARAM_SRA_MAX = 1 << 8,
921 GOLAN_QP_PARAM_RRA_MAX = 1 << 9,
922 GOLAN_QP_PARAM_PM_STATE = 1 << 10,
923 GOLAN_QP_PARAM_RETRY_COUNT = 1 << 12,
924 GOLAN_QP_PARAM_RNR_RETRY = 1 << 13,
925 GOLAN_QP_PARAM_ACK_TIMEOUT = 1 << 14,
926 GOLAN_QP_PARAM_PRI_PORT = 1 << 16,
927 GOLAN_QP_PARAM_SRQN = 1 << 18,
928 GOLAN_QP_PARAM_CQN_RCV = 1 << 19,
929 GOLAN_QP_PARAM_DC_HS = 1 << 20,
930 GOLAN_QP_PARAM_DC_KEY = 1 << 21
931 };
932
933 #define GOLAN_QP_PARAMS_INIT2RTR_MASK (GOLAN_QP_PARAM_PKEY_INDEX |\
934 GOLAN_QP_PARAM_Q_KEY |\
935 GOLAN_QP_PARAM_RWE |\
936 GOLAN_QP_PARAM_RRE)
937
938 #define GOLAN_QP_PARAMS_RTR2RTS_MASK (GOLAN_QP_PARAM_PM_STATE |\
939 GOLAN_QP_PARAM_RNR_TIMEOUT |\
940 GOLAN_QP_PARAM_Q_KEY |\
941 GOLAN_QP_PARAM_RWE |\
942 GOLAN_QP_PARAM_RRE)
943
944
945 enum {
946 GOLAN_QP_ST_RC = 0x0,
947 GOLAN_QP_ST_UC = 0x1,
948 GOLAN_QP_ST_UD = 0x2,
949 GOLAN_QP_ST_XRC = 0x3,
950 GOLAN_QP_ST_MLX = 0x4,
951 GOLAN_QP_ST_DC = 0x5,
952 GOLAN_QP_ST_QP0 = 0x7,
953 GOLAN_QP_ST_QP1 = 0x8,
954 GOLAN_QP_ST_RAW_ETHERTYPE = 0x9,
955 GOLAN_QP_ST_RAW_IPV6 = 0xa,
956 GOLAN_QP_ST_SNIFFER = 0xb,
957 GOLAN_QP_ST_SYNC_UMR = 0xe,
958 GOLAN_QP_ST_PTP_1588 = 0xd,
959 GOLAN_QP_ST_REG_UMR = 0xc,
960 GOLAN_QP_ST_MAX
961 };
962
963 enum {
964 GOLAN_QP_PM_MIGRATED = 0x3,
965 GOLAN_QP_PM_ARMED = 0x0,
966 GOLAN_QP_PM_REARM = 0x1
967 };
968
969 enum {
970 GOLAN_QP_LAT_SENSITIVE = 1 << 28,
971 GOLAN_QP_ENABLE_SIG = 1 << 31
972 };
973
974
975 struct golan_qp_db {
976 u8 rsvd0[2];
977 __be16 recv_db;
978 u8 rsvd1[2];
979 __be16 send_db;
980 } __attribute ( ( packed ) );
981
982 enum {
983 GOLAN_WQE_CTRL_CQ_UPDATE = 2 << 2, /*Wissam, wtf?*/
984 GOLAN_WQE_CTRL_SOLICITED = 1 << 1
985 };
986
987 struct golan_wqe_ctrl_seg {
988 __be32 opmod_idx_opcode;
989 __be32 qpn_ds;
990 u8 signature;
991 u8 rsvd[2];
992 u8 fm_ce_se;
993 __be32 imm;
994 } __attribute ( ( packed ) );
995
996 struct golan_av {
997 union {
998 struct {
999 __be32 qkey;
1000 __be32 reserved;
1001 } qkey;
1002 __be64 dc_key;
1003 } key;
1004 __be32 dqp_dct;
1005 u8 stat_rate_sl;
1006 u8 fl_mlid;
1007 __be16 rlid;
1008 u8 reserved0[10];
1009 u8 tclass;
1010 u8 hop_limit;
1011 __be32 grh_gid_fl;
1012 u8 rgid[16];
1013 } __attribute ( ( packed ) );
1014
1015 struct golan_wqe_data_seg {
1016 __be32 byte_count;
1017 __be32 lkey;
1018 __be64 addr;
1019 } __attribute ( ( packed ) );
1020
1021 struct golan_wqe_signature_seg {
1022 u8 rsvd0[4];
1023 u8 signature;
1024 u8 rsvd1[11];
1025 } __attribute ( ( packed ) );
1026
1027 struct golan_wqe_inline_seg {
1028 __be32 byte_count;
1029 } __attribute ( ( packed ) );
1030
1031 struct golan_qp_path {
1032 u8 fl;
1033 u8 rsvd3;
1034 u8 free_ar;
1035 u8 pkey_index;
1036 u8 rsvd0;
1037 u8 grh_mlid;
1038 __be16 rlid;
1039 u8 ackto_lt;
1040 u8 mgid_index;
1041 u8 static_rate;
1042 u8 hop_limit;
1043 __be32 tclass_flowlabel;
1044 u8 rgid[16];
1045 u8 rsvd1[4];
1046 u8 sl;
1047 u8 port;
1048 u8 rsvd2[6];
1049 } __attribute ( ( packed ) );
1050
1051 struct golan_qp_context {
1052 __be32 flags;
1053 __be32 flags_pd;
1054 u8 mtu_msgmax;
1055 u8 rq_size_stride;
1056 __be16 sq_crq_size;
1057 __be32 qp_counter_set_usr_page;
1058 __be32 wire_qpn;
1059 __be32 log_pg_sz_remote_qpn;
1060 struct golan_qp_path pri_path;
1061 struct golan_qp_path alt_path;
1062 __be32 params1;
1063 u8 reserved2[4];
1064 __be32 next_send_psn;
1065 __be32 cqn_send;
1066 u8 reserved3[8];
1067 __be32 last_acked_psn;
1068 __be32 ssn;
1069 __be32 params2;
1070 __be32 rnr_nextrecvpsn;
1071 __be32 xrcd;
1072 __be32 cqn_recv;
1073 __be64 db_rec_addr;
1074 __be32 qkey;
1075 __be32 rq_type_srqn;
1076 __be32 rmsn;
1077 __be16 hw_sq_wqe_counter;
1078 __be16 sw_sq_wqe_counter;
1079 __be16 hw_rcyclic_byte_counter;
1080 __be16 hw_rq_counter;
1081 __be16 sw_rcyclic_byte_counter;
1082 __be16 sw_rq_counter;
1083 u8 rsvd0[5];
1084 u8 cgs;
1085 u8 cs_req;
1086 u8 cs_res;
1087 __be64 dc_access_key;
1088 u8 rsvd1[24];
1089 } __attribute ( ( packed ) );
1090
1091 struct golan_create_qp_mbox_in_data {
1092 __be32 opt_param_mask;
1093 u8 rsvd1[4];
1094 struct golan_qp_context ctx;
1095 u8 rsvd3[16];
1096 __be64 pas[0];
1097 } __attribute ( ( packed ) );
1098
1099 struct golan_create_qp_mbox_in {
1100 struct golan_inbox_hdr hdr;
1101 __be32 input_qpn;
1102 u8 rsvd0[4];
1103 struct golan_create_qp_mbox_in_data data;
1104 } __attribute ( ( packed ) );
1105
1106 struct golan_create_qp_mbox_out {
1107 struct golan_outbox_hdr hdr;
1108 __be32 qpn;
1109 u8 rsvd0[4];
1110 } __attribute ( ( packed ) );
1111
1112 struct golan_destroy_qp_mbox_in {
1113 struct golan_inbox_hdr hdr;
1114 __be32 qpn;
1115 u8 rsvd0[4];
1116 } __attribute ( ( packed ) );
1117
1118 struct golan_destroy_qp_mbox_out {
1119 struct golan_outbox_hdr hdr;
1120 u8 rsvd0[8];
1121 } __attribute ( ( packed ) );
1122
1123 struct golan_modify_qp_mbox_in_data {
1124 __be32 optparam;
1125 u8 rsvd0[4];
1126 struct golan_qp_context ctx;
1127 } __attribute ( ( packed ) );
1128
1129 struct golan_modify_qp_mbox_in {
1130 struct golan_inbox_hdr hdr;
1131 __be32 qpn;
1132 u8 rsvd1[4];
1133 struct golan_modify_qp_mbox_in_data data;
1134 } __attribute ( ( packed ) );
1135
1136 struct golan_modify_qp_mbox_out {
1137 struct golan_outbox_hdr hdr;
1138 u8 rsvd0[8];
1139 } __attribute ( ( packed ) );
1140
1141 struct golan_attach_mcg_mbox_in {
1142 struct golan_inbox_hdr hdr;
1143 __be32 qpn;
1144 __be32 rsvd;
1145 u8 gid[16];
1146 } __attribute ( ( packed ) );
1147
1148 struct golan_attach_mcg_mbox_out {
1149 struct golan_outbox_hdr hdr;
1150 u8 rsvf[8];
1151 } __attribute ( ( packed ) );
1152
1153 struct golan_detach_mcg_mbox_in {
1154 struct golan_inbox_hdr hdr;
1155 __be32 qpn;
1156 __be32 rsvd;
1157 u8 gid[16];
1158 } __attribute ( ( packed ) );
1159
1160 struct golan_detach_mcg_mbox_out {
1161 struct golan_outbox_hdr hdr;
1162 u8 rsvf[8];
1163 } __attribute ( ( packed ) );
1164
1165
1166 #define MAILBOX_SIZE sizeof(struct golan_cmd_prot_block)
1167
1168 #endif /* __CIB_PRM__ */