[golan] Set log_max_qp to 1
[ipxe.git] / src / drivers / infiniband / CIB_PRM.h
1 /*
2 * Copyright (C) 2013-2015 Mellanox Technologies Ltd.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of the
7 * License, or any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
17 * 02110-1301, USA.
18 */
19
20 FILE_LICENCE ( GPL2_OR_LATER );
21
22 #ifndef __CIB_PRM__
23 #define __CIB_PRM__
24
25 typedef unsigned long long __be64;
26 typedef uint32_t __be32;
27 typedef uint16_t __be16;
28
29 #define GOLAN_CMD_DATA_BLOCK_SIZE (1 << 9)
30 #define GOLAN_CMD_PAS_CNT (GOLAN_CMD_DATA_BLOCK_SIZE / sizeof(__be64))
31 #define MAILBOX_STRIDE (1 << 10)
32 #define MAILBOX_MASK (MAILBOX_STRIDE - 1)
33
34 #define GOLAN_PCI_CMD_XPORT 7
35 #define CMD_OWNER_HW 0x1
36 #define GOLAN_LOG_MAX_QP 0x1
37 #define IB_NUM_PKEYS 0x20
38
39 struct health_buffer {
40 __be32 assert_var[5];
41 __be32 rsvd0[3];
42 __be32 assert_exit_ptr;
43 __be32 assert_callra;
44 __be32 rsvd1[2];
45 __be32 fw_ver;
46 __be32 hw_id;
47 __be32 rsvd2;
48 u8 irisc_index;
49 u8 synd;
50 __be16 ext_sync;
51 } __attribute ( ( packed ) );
52
53 struct golan_hca_init_seg {
54 __be32 fw_rev;
55 __be32 cmdif_rev_fw_sub;
56 __be32 rsvd0[2];
57 __be32 cmdq_addr_h;
58 __be32 cmdq_addr_l_sz;
59 __be32 cmd_dbell;
60 __be32 rsvd1[121];
61 struct health_buffer health;
62 __be32 rsvd2[884];
63 __be32 health_counter;
64 __be32 rsvd3[1023];
65 __be64 ieee1588_clk;
66 __be32 ieee1588_clk_type;
67 __be32 clr_intx;
68 } __attribute ( ( packed ) );
69
70 enum golan_manage_pages_mode {
71 GOLAN_PAGES_CANT_GIVE = 0,
72 GOLAN_PAGES_GIVE = 1,
73 GOLAN_PAGES_TAKE = 2
74 };
75
76 enum golan_qry_pages_mode {
77 GOLAN_BOOT_PAGES = 0x1,
78 GOLAN_INIT_PAGES = 0x2,
79 GOLAN_REG_PAGES = 0x3,
80 };
81
82 enum {
83 GOLAN_REG_PCAP = 0x5001,
84 GOLAN_REG_PMTU = 0x5003,
85 GOLAN_REG_PTYS = 0x5004,
86 GOLAN_REG_PAOS = 0x5006,
87 GOLAN_REG_PMAOS = 0x5012,
88 GOLAN_REG_PUDE = 0x5009,
89 GOLAN_REG_PMPE = 0x5010,
90 GOLAN_REG_PELC = 0x500e,
91 GOLAN_REG_PMLP = 0, /* TBD */
92 GOLAN_REG_NODE_DESC = 0x6001,
93 GOLAN_REG_HOST_ENDIANESS = 0x7004,
94 };
95
96 enum {
97 GOLAN_CMD_OP_QUERY_HCA_CAP = 0x100,
98 GOLAN_CMD_OP_QUERY_ADAPTER = 0x101,
99 GOLAN_CMD_OP_INIT_HCA = 0x102,
100 GOLAN_CMD_OP_TEARDOWN_HCA = 0x103,
101 GOLAN_CMD_OP_ENABLE_HCA = 0x104,
102 GOLAN_CMD_OP_DISABLE_HCA = 0x105,
103
104 GOLAN_CMD_OP_QUERY_PAGES = 0x107,
105 GOLAN_CMD_OP_MANAGE_PAGES = 0x108,
106 GOLAN_CMD_OP_SET_HCA_CAP = 0x109,
107
108 GOLAN_CMD_OP_CREATE_MKEY = 0x200,
109 GOLAN_CMD_OP_QUERY_MKEY = 0x201,
110 GOLAN_CMD_OP_DESTROY_MKEY = 0x202,
111 GOLAN_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
112
113 GOLAN_CMD_OP_CREATE_EQ = 0x301,
114 GOLAN_CMD_OP_DESTROY_EQ = 0x302,
115 GOLAN_CMD_OP_QUERY_EQ = 0x303,
116
117 GOLAN_CMD_OP_CREATE_CQ = 0x400,
118 GOLAN_CMD_OP_DESTROY_CQ = 0x401,
119 GOLAN_CMD_OP_QUERY_CQ = 0x402,
120 GOLAN_CMD_OP_MODIFY_CQ = 0x403,
121
122 GOLAN_CMD_OP_CREATE_QP = 0x500,
123 GOLAN_CMD_OP_DESTROY_QP = 0x501,
124 GOLAN_CMD_OP_RST2INIT_QP = 0x502,
125 GOLAN_CMD_OP_INIT2RTR_QP = 0x503,
126 GOLAN_CMD_OP_RTR2RTS_QP = 0x504,
127 GOLAN_CMD_OP_RTS2RTS_QP = 0x505,
128 GOLAN_CMD_OP_SQERR2RTS_QP = 0x506,
129 GOLAN_CMD_OP_2ERR_QP = 0x507,
130 GOLAN_CMD_OP_RTS2SQD_QP = 0x508,
131 GOLAN_CMD_OP_SQD2RTS_QP = 0x509,
132 GOLAN_CMD_OP_2RST_QP = 0x50a,
133 GOLAN_CMD_OP_QUERY_QP = 0x50b,
134 GOLAN_CMD_OP_CONF_SQP = 0x50c,
135 GOLAN_CMD_OP_MAD_IFC = 0x50d,
136 GOLAN_CMD_OP_INIT2INIT_QP = 0x50e,
137 GOLAN_CMD_OP_SUSPEND_QP = 0x50f,
138 GOLAN_CMD_OP_UNSUSPEND_QP = 0x510,
139 GOLAN_CMD_OP_SQD2SQD_QP = 0x511,
140 GOLAN_CMD_OP_ALLOC_QP_COUNTER_SET = 0x512,
141 GOLAN_CMD_OP_DEALLOC_QP_COUNTER_SET = 0x513,
142 GOLAN_CMD_OP_QUERY_QP_COUNTER_SET = 0x514,
143
144 GOLAN_CMD_OP_CREATE_PSV = 0x600,
145 GOLAN_CMD_OP_DESTROY_PSV = 0x601,
146 GOLAN_CMD_OP_QUERY_PSV = 0x602,
147 GOLAN_CMD_OP_QUERY_SIG_RULE_TABLE = 0x603,
148 GOLAN_CMD_OP_QUERY_BLOCK_SIZE_TABLE = 0x604,
149
150 GOLAN_CMD_OP_CREATE_SRQ = 0x700,
151 GOLAN_CMD_OP_DESTROY_SRQ = 0x701,
152 GOLAN_CMD_OP_QUERY_SRQ = 0x702,
153 GOLAN_CMD_OP_ARM_RQ = 0x703,
154 GOLAN_CMD_OP_RESIZE_SRQ = 0x704,
155
156 GOLAN_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
157 GOLAN_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
158 GOLAN_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
159
160 GOLAN_CMD_OP_ALLOC_PD = 0x800,
161 GOLAN_CMD_OP_DEALLOC_PD = 0x801,
162 GOLAN_CMD_OP_ALLOC_UAR = 0x802,
163 GOLAN_CMD_OP_DEALLOC_UAR = 0x803,
164
165 GOLAN_CMD_OP_ATTACH_TO_MCG = 0x806,
166 GOLAN_CMD_OP_DETACH_FROM_MCG = 0x807,
167
168
169 GOLAN_CMD_OP_ALLOC_XRCD = 0x80e,
170 GOLAN_CMD_OP_DEALLOC_XRCD = 0x80f,
171
172 GOLAN_CMD_OP_ACCESS_REG = 0x805,
173 };
174
175 struct golan_inbox_hdr {
176 __be16 opcode;
177 u8 rsvd[4];
178 __be16 opmod;
179 } __attribute ( ( packed ) );
180
181 struct golan_cmd_layout {
182 u8 type;
183 u8 rsvd0[3];
184 __be32 inlen;
185 union {
186 __be64 in_ptr;
187 __be32 in_ptr32[2];
188 };
189 __be32 in[4];
190 __be32 out[4];
191 union {
192 __be64 out_ptr;
193 __be32 out_ptr32[2];
194 };
195 __be32 outlen;
196 u8 token;
197 u8 sig;
198 u8 rsvd1;
199 volatile u8 status_own;
200 } __attribute ( ( packed ) );
201
202 struct golan_outbox_hdr {
203 u8 status;
204 u8 rsvd[3];
205 __be32 syndrome;
206 } __attribute ( ( packed ) );
207
208 enum {
209 GOLAN_DEV_CAP_FLAG_RC = 1LL << 0,
210 GOLAN_DEV_CAP_FLAG_UC = 1LL << 1,
211 GOLAN_DEV_CAP_FLAG_UD = 1LL << 2,
212 GOLAN_DEV_CAP_FLAG_XRC = 1LL << 3,
213 GOLAN_DEV_CAP_FLAG_SRQ = 1LL << 6,
214 GOLAN_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1LL << 8,
215 GOLAN_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1LL << 9,
216 GOLAN_DEV_CAP_FLAG_APM = 1LL << 17,
217 GOLAN_DEV_CAP_FLAG_ATOMIC = 1LL << 18,
218 GOLAN_DEV_CAP_FLAG_ON_DMND_PG = 1LL << 24,
219 GOLAN_DEV_CAP_FLAG_RESIZE_SRQ = 1LL << 32,
220 GOLAN_DEV_CAP_FLAG_REMOTE_FENCE = 1LL << 38,
221 GOLAN_DEV_CAP_FLAG_TLP_HINTS = 1LL << 39,
222 GOLAN_DEV_CAP_FLAG_SIG_HAND_OVER = 1LL << 40,
223 GOLAN_DEV_CAP_FLAG_DCT = 1LL << 41,
224 GOLAN_DEV_CAP_FLAG_CMDIF_CSUM = 1LL << 46,
225 };
226
227
228 struct golan_hca_cap {
229 u8 rsvd1[16];
230 u8 log_max_srq_sz;
231 u8 log_max_qp_sz;
232 __be16 log_max_qp;
233 u8 log_max_strq_sz;
234 u8 log_max_srqs;
235 u8 rsvd4[2];
236 u8 rsvd5;
237 u8 log_max_cq_sz;
238 u8 rsvd6;
239 u8 log_max_cq;
240 u8 log_max_eq_sz;
241 u8 log_max_mkey;
242 u8 rsvd7;
243 u8 log_max_eq;
244 u8 max_indirection;
245 u8 log_max_mrw_sz;
246 u8 log_max_bsf_list_sz;
247 u8 log_max_klm_list_sz;
248 u8 rsvd_8_0;
249 u8 log_max_ra_req_dc;
250 u8 rsvd_8_1;
251 u8 log_max_ra_res_dc;
252 u8 rsvd9;
253 u8 log_max_ra_req_qp;
254 u8 rsvd10;
255 u8 log_max_ra_res_qp;
256 u8 rsvd11[4];
257 __be16 max_qp_count;
258 __be16 pkey_table_size;
259 u8 rsvd13;
260 u8 local_ca_ack_delay;
261 u8 rsvd14;
262 u8 num_ports;
263 u8 log_max_msg;
264 u8 rsvd15[3];
265 __be16 stat_rate_support;
266 u8 rsvd16[2];
267 __be64 flags;
268 u8 rsvd17;
269 u8 uar_sz;
270 u8 rsvd18;
271 u8 log_pg_sz;
272 __be16 bf_log_bf_reg_size;
273 u8 rsvd19[4];
274 __be16 max_wqe_sz_sq;
275 u8 rsvd20[2];
276 __be16 max_wqe_sz_rq;
277 u8 rsvd21[2];
278 __be16 max_wqe_sz_sq_dc;
279 u8 rsvd22[4];
280 __be16 max_qp_mcg;
281 u8 rsvd23;
282 u8 log_max_mcg;
283 u8 rsvd24;
284 u8 log_max_pd;
285 u8 rsvd25;
286 u8 log_max_xrcd;
287 u8 rsvd26[40];
288 __be32 uar_page_sz;
289 u8 rsvd27[28];
290 u8 log_msx_atomic_size_qp;
291 u8 rsvd28[2];
292 u8 log_msx_atomic_size_dc;
293 u8 rsvd29[76];
294 } __attribute ( ( packed ) );
295
296 struct golan_query_pages_inbox {
297 struct golan_inbox_hdr hdr;
298 u8 rsvd[8];
299 } __attribute ( ( packed ) );
300
301 struct golan_query_pages_outbox {
302 struct golan_outbox_hdr hdr;
303 u8 rsvd[2];
304 __be16 func_id;
305 __be32 num_pages;
306 } __attribute ( ( packed ) );
307
308 struct golan_cmd_query_hca_cap_mbox_in {
309 struct golan_inbox_hdr hdr;
310 u8 rsvd[8];
311 } __attribute ( ( packed ) );
312
313 struct golan_cmd_query_hca_cap_mbox_out {
314 struct golan_outbox_hdr hdr;
315 u8 rsvd0[8];
316 struct golan_hca_cap hca_cap;
317 } __attribute ( ( packed ) );
318
319 struct golan_cmd_set_hca_cap_mbox_in {
320 struct golan_inbox_hdr hdr;
321 u8 rsvd[8];
322 struct golan_hca_cap hca_cap;
323 } __attribute ( ( packed ) );
324
325 struct golan_cmd_set_hca_cap_mbox_out {
326 struct golan_outbox_hdr hdr;
327 u8 rsvd0[8];
328 } __attribute ( ( packed ) );
329
330 struct golan_cmd_init_hca_mbox_in {
331 struct golan_inbox_hdr hdr;
332 u8 rsvd0[2];
333 __be16 profile;
334 u8 rsvd1[4];
335 } __attribute ( ( packed ) );
336
337 struct golan_cmd_init_hca_mbox_out {
338 struct golan_outbox_hdr hdr;
339 u8 rsvd[8];
340 } __attribute ( ( packed ) );
341
342 enum golan_teardown {
343 GOLAN_TEARDOWN_GRACEFUL = 0x0,
344 GOLAN_TEARDOWN_PANIC = 0x1
345 };
346
347 struct golan_cmd_teardown_hca_mbox_in {
348 struct golan_inbox_hdr hdr;
349 u8 rsvd0[2];
350 __be16 profile;
351 u8 rsvd1[4];
352 } __attribute ( ( packed ) );
353
354 struct golan_cmd_teardown_hca_mbox_out {
355 struct golan_outbox_hdr hdr;
356 u8 rsvd[8];
357 } __attribute ( ( packed ) );
358
359 struct golan_enable_hca_mbox_in {
360 struct golan_inbox_hdr hdr;
361 u8 rsvd[8];
362 } __attribute ( ( packed ) );
363
364 struct golan_enable_hca_mbox_out {
365 struct golan_outbox_hdr hdr;
366 u8 rsvd[8];
367 } __attribute ( ( packed ) );
368
369 struct golan_disable_hca_mbox_in {
370 struct golan_inbox_hdr hdr;
371 u8 rsvd[8];
372 } __attribute ( ( packed ) );
373
374 struct golan_disable_hca_mbox_out {
375 struct golan_outbox_hdr hdr;
376 u8 rsvd[8];
377 } __attribute ( ( packed ) );
378
379 struct golan_manage_pages_inbox_data {
380 u8 rsvd2[16];
381 __be64 pas[0];
382 } __attribute ( ( packed ) );
383
384 struct golan_manage_pages_inbox {
385 struct golan_inbox_hdr hdr;
386 __be16 rsvd0;
387 __be16 func_id;
388 __be32 num_entries;
389 struct golan_manage_pages_inbox_data data;
390 } __attribute ( ( packed ) );
391
392 struct golan_manage_pages_outbox_data {
393 __be64 pas[0];
394 } __attribute ( ( packed ) );
395
396 struct golan_manage_pages_outbox {
397 struct golan_outbox_hdr hdr;
398 __be32 num_entries;
399 __be32 rsrvd;
400 struct golan_manage_pages_outbox_data data;
401 } __attribute ( ( packed ) );
402
403 struct golan_reg_host_endianess {
404 u8 he;
405 u8 rsvd[15];
406 } __attribute ( ( packed ) );
407
408 struct golan_cmd_prot_block {
409 union {
410 __be64 data[GOLAN_CMD_PAS_CNT];
411 u8 bdata[GOLAN_CMD_DATA_BLOCK_SIZE];
412 };
413 u8 rsvd0[48];
414 __be64 next;
415 __be32 block_num;
416 u8 rsvd1;
417 u8 token;
418 u8 ctrl_sig;
419 u8 sig;
420 } __attribute ( ( packed ) );
421
422 /* MAD IFC structures */
423 #define GOLAN_MAD_SIZE 256
424 #define GOLAN_MAD_IFC_NO_VALIDATION 0x3
425 #define GOLAN_MAD_IFC_RLID_BIT 16
426
427 struct golan_mad_ifc_mbox_in {
428 struct golan_inbox_hdr hdr;
429 __be16 remote_lid;
430 u8 rsvd0;
431 u8 port;
432 u8 rsvd1[4];
433 u8 mad[GOLAN_MAD_SIZE];
434 } __attribute ( ( packed ) );
435
436 struct golan_mad_ifc_mbox_out {
437 struct golan_outbox_hdr hdr;
438 u8 rsvd[8];
439 u8 mad[GOLAN_MAD_SIZE];
440 } __attribute ( ( packed ) );
441
442 /* UAR Structures */
443 struct golan_alloc_uar_mbox_in {
444 struct golan_inbox_hdr hdr;
445 u8 rsvd[8];
446 } __attribute ( ( packed ) );
447
448 struct golan_alloc_uar_mbox_out {
449 struct golan_outbox_hdr hdr;
450 __be32 uarn;
451 u8 rsvd[4];
452 } __attribute ( ( packed ) );
453
454 struct golan_free_uar_mbox_in {
455 struct golan_inbox_hdr hdr;
456 __be32 uarn;
457 u8 rsvd[4];
458 } __attribute ( ( packed ) );
459
460 struct golan_free_uar_mbox_out {
461 struct golan_outbox_hdr hdr;
462 u8 rsvd[8];
463 } __attribute ( ( packed ) );
464
465 /* Event Queue Structures */
466 enum {
467 GOLAN_EQ_STATE_ARMED = 0x9,
468 GOLAN_EQ_STATE_FIRED = 0xa,
469 GOLAN_EQ_STATE_ALWAYS_ARMED = 0xb,
470 };
471
472
473 struct golan_eq_context {
474 u8 status;
475 u8 ec_oi;
476 u8 st;
477 u8 rsvd2[7];
478 __be16 page_pffset;
479 __be32 log_sz_usr_page;
480 u8 rsvd3[7];
481 u8 intr;
482 u8 log_page_size;
483 u8 rsvd4[15];
484 __be32 consumer_counter;
485 __be32 produser_counter;
486 u8 rsvd5[16];
487 } __attribute ( ( packed ) );
488
489 struct golan_create_eq_mbox_in_data {
490 struct golan_eq_context ctx;
491 u8 rsvd2[8];
492 __be64 events_mask;
493 u8 rsvd3[176];
494 __be64 pas[0];
495 } __attribute ( ( packed ) );
496
497 struct golan_create_eq_mbox_in {
498 struct golan_inbox_hdr hdr;
499 u8 rsvd0[3];
500 u8 input_eqn;
501 u8 rsvd1[4];
502 struct golan_create_eq_mbox_in_data data;
503 } __attribute ( ( packed ) );
504
505 struct golan_create_eq_mbox_out {
506 struct golan_outbox_hdr hdr;
507 u8 rsvd0[3];
508 u8 eq_number;
509 u8 rsvd1[4];
510 } __attribute ( ( packed ) );
511
512 struct golan_destroy_eq_mbox_in {
513 struct golan_inbox_hdr hdr;
514 u8 rsvd0[3];
515 u8 eqn;
516 u8 rsvd1[4];
517 } __attribute ( ( packed ) );
518
519 struct golan_destroy_eq_mbox_out {
520 struct golan_outbox_hdr hdr;
521 u8 rsvd[8];
522 } __attribute ( ( packed ) );
523
524 /***********************************************/
525 /************** Query Vport ****************/
526 struct golan_query_hca_vport_context_inbox {
527 struct golan_inbox_hdr hdr;
528 __be16 other_vport : 1;
529 __be16 rsvd1 : 7;
530 __be16 port_num : 4;
531 __be16 rsvd2 : 4;
532 __be16 vport_number;
533 u8 rsvd[4];
534 } __attribute ( ( packed ) );
535
536 struct golan_query_hca_vport_context_data {
537 __be32 field_select;
538 __be32 rsvd1[7];
539 //****
540 __be16 sm_virt_aware : 1;
541 __be16 has_smi : 1;
542 __be16 has_raw : 1;
543 __be16 grh_required : 1;
544 __be16 rsvd2 : 12;
545 u8 port_physical_state : 4;
546 u8 vport_state_policy : 4;
547 u8 port_state : 4;
548 u8 vport_state : 4;
549 //****
550 u8 rsvd3[4];
551 //****
552 __be32 system_image_guid[2];
553 //****
554 __be32 port_guid[2];
555 //****
556 __be32 node_guid[2];
557 //****
558 __be32 cap_mask1;
559 __be32 cap_mask1_field_select;
560 __be32 cap_mask2;
561 __be32 cap_mask2_field_select;
562 u8 rsvd4[16];
563 __be16 lid;
564 u8 rsvd5 : 4;
565 u8 init_type_reply : 4;
566 u8 lmc : 3;
567 u8 subnet_timeout : 5;
568 __be16 sm_lid;
569 u8 sm_sl : 4;
570 u8 rsvd6 : 4;
571 u8 rsvd7;
572 __be16 qkey_violation_counter;
573 __be16 pkey_violation_counter;
574 u8 rsvd8[100];
575 } __attribute ( ( packed ) );
576
577 struct golan_query_hca_vport_context_outbox {
578 struct golan_outbox_hdr hdr;
579 u8 rsvd[8];
580 struct golan_query_hca_vport_context_data context_data;
581 } __attribute ( ( packed ) );
582
583 struct golan_query_hca_vport_gid_inbox {
584 struct golan_inbox_hdr hdr;
585 u8 other_vport : 1;
586 u8 rsvd1 : 7;
587 u8 port_num : 4;
588 u8 rsvd2 : 4;
589 __be16 vport_number;
590 __be16 rsvd3;
591 __be16 gid_index;
592 } __attribute ( ( packed ) );
593
594 struct golan_query_hca_vport_gid_outbox {
595 struct golan_outbox_hdr hdr;
596 u8 rsvd0[4];
597 __be16 gids_num;
598 u8 rsvd1[2];
599 __be32 gid0[4];
600 } __attribute ( ( packed ) );
601
602 struct golan_query_hca_vport_pkey_inbox {
603 struct golan_inbox_hdr hdr;
604 u8 other_vport : 1;
605 u8 rsvd1 : 7;
606 u8 port_num : 4;
607 u8 rsvd2 : 4;
608 __be16 vport_number;
609 __be16 rsvd3;
610 __be16 pkey_index;
611 } __attribute ( ( packed ) );
612
613 struct golan_query_hca_vport_pkey_data {
614 __be16 rsvd1;
615 __be16 pkey0;
616 } __attribute ( ( packed ) );
617
618 struct golan_query_hca_vport_pkey_outbox {
619 struct golan_outbox_hdr hdr;
620 u8 rsvd[8];
621 struct golan_query_hca_vport_pkey_data *pkey_data;
622 } __attribute ( ( packed ) );
623
624 struct golan_eqe_comp {
625 __be32 reserved[6];
626 __be32 cqn;
627 } __attribute ( ( packed ) );
628
629 struct golan_eqe_qp_srq {
630 __be32 reserved[6];
631 __be32 qp_srq_n;
632 } __attribute ( ( packed ) );
633
634 struct golan_eqe_cq_err {
635 __be32 cqn;
636 u8 reserved1[7];
637 u8 syndrome;
638 } __attribute ( ( packed ) );
639
640 struct golan_eqe_dropped_packet {
641 };
642
643 struct golan_eqe_port_state {
644 u8 reserved0[8];
645 u8 port;
646 } __attribute ( ( packed ) );
647
648 struct golan_eqe_gpio {
649 __be32 reserved0[2];
650 __be64 gpio_event;
651 } __attribute ( ( packed ) );
652
653 struct golan_eqe_congestion {
654 u8 type;
655 u8 rsvd0;
656 u8 congestion_level;
657 } __attribute ( ( packed ) );
658
659 struct golan_eqe_stall_vl {
660 u8 rsvd0[3];
661 u8 port_vl;
662 } __attribute ( ( packed ) );
663
664 struct golan_eqe_cmd {
665 __be32 vector;
666 __be32 rsvd[6];
667 } __attribute ( ( packed ) );
668
669 struct golan_eqe_page_req {
670 u8 rsvd0[2];
671 __be16 func_id;
672 u8 rsvd1[2];
673 __be16 num_pages;
674 __be32 rsvd2[5];
675 } __attribute ( ( packed ) );
676
677 union ev_data {
678 __be32 raw[7];
679 struct golan_eqe_cmd cmd;
680 struct golan_eqe_comp comp;
681 struct golan_eqe_qp_srq qp_srq;
682 struct golan_eqe_cq_err cq_err;
683 struct golan_eqe_dropped_packet dp;
684 struct golan_eqe_port_state port;
685 struct golan_eqe_gpio gpio;
686 struct golan_eqe_congestion cong;
687 struct golan_eqe_stall_vl stall_vl;
688 struct golan_eqe_page_req req_pages;
689 } __attribute__ ((packed));
690
691 struct golan_eqe {
692 u8 rsvd0;
693 u8 type;
694 u8 rsvd1;
695 u8 sub_type;
696 __be32 rsvd2[7];
697 union ev_data data;
698 __be16 rsvd3;
699 u8 signature;
700 u8 owner;
701 } __attribute__ ((packed));
702
703 /* Protection Domain Structures */
704 struct golan_alloc_pd_mbox_in {
705 struct golan_inbox_hdr hdr;
706 u8 rsvd[8];
707 } __attribute ( ( packed ) );
708
709 struct golan_alloc_pd_mbox_out {
710 struct golan_outbox_hdr hdr;
711 __be32 pdn;
712 u8 rsvd[4];
713 } __attribute ( ( packed ) );
714
715 struct golan_dealloc_pd_mbox_in {
716 struct golan_inbox_hdr hdr;
717 __be32 pdn;
718 u8 rsvd[4];
719 } __attribute ( ( packed ) );
720
721 struct golan_dealloc_pd_mbox_out {
722 struct golan_outbox_hdr hdr;
723 u8 rsvd[8];
724 } __attribute ( ( packed ) );
725
726 /* Memory key structures */
727 #define GOLAN_IB_ACCESS_LOCAL_READ (1 << 2)
728 #define GOLAN_IB_ACCESS_LOCAL_WRITE (1 << 3)
729 #define GOLAN_MKEY_LEN64 (1 << 31)
730 #define GOLAN_CREATE_MKEY_SEG_QPN_BIT 8
731
732 struct golan_mkey_seg {
733 /*
734 * This is a two bit field occupying bits 31-30.
735 * bit 31 is always 0,
736 * bit 30 is zero for regular MRs and 1 (e.g free) for UMRs that do not have tanslation
737 */
738 u8 status;
739 u8 pcie_control;
740 u8 flags;
741 u8 version;
742 __be32 qpn_mkey7_0;
743 u8 rsvd1[4];
744 __be32 flags_pd;
745 __be64 start_addr;
746 __be64 len;
747 __be32 bsfs_octo_size;
748 u8 rsvd2[16];
749 __be32 xlt_oct_size;
750 u8 rsvd3[3];
751 u8 log2_page_size;
752 u8 rsvd4[4];
753 } __attribute ( ( packed ) );
754
755 struct golan_create_mkey_mbox_in_data {
756 struct golan_mkey_seg seg;
757 u8 rsvd1[16];
758 __be32 xlat_oct_act_size;
759 __be32 bsf_coto_act_size;
760 u8 rsvd2[168];
761 __be64 pas[0];
762 } __attribute ( ( packed ) );
763
764 struct golan_create_mkey_mbox_in {
765 struct golan_inbox_hdr hdr;
766 __be32 input_mkey_index;
767 u8 rsvd0[4];
768 struct golan_create_mkey_mbox_in_data data;
769 } __attribute ( ( packed ) );
770
771 struct golan_create_mkey_mbox_out {
772 struct golan_outbox_hdr hdr;
773 __be32 mkey;
774 u8 rsvd[4];
775 } __attribute ( ( packed ) );
776
777 struct golan_destroy_mkey_mbox_in {
778 struct golan_inbox_hdr hdr;
779 __be32 mkey;
780 u8 rsvd[4];
781 } __attribute ( ( packed ) );
782
783 struct golan_destroy_mkey_mbox_out {
784 struct golan_outbox_hdr hdr;
785 u8 rsvd[8];
786 } __attribute ( ( packed ) );
787
788 /* Completion Queue Structures */
789 enum {
790 GOLAN_CQ_STATE_ARMED = 9,
791 GOLAN_CQ_STATE_ALWAYS_ARMED = 0xb,
792 GOLAN_CQ_STATE_FIRED = 0xa
793 };
794
795 enum {
796 GOLAN_CQE_REQ = 0,
797 GOLAN_CQE_RESP_WR_IMM = 1,
798 GOLAN_CQE_RESP_SEND = 2,
799 GOLAN_CQE_RESP_SEND_IMM = 3,
800 GOLAN_CQE_RESP_SEND_INV = 4,
801 GOLAN_CQE_RESIZE_CQ = 0xff, /* TBD */
802 GOLAN_CQE_REQ_ERR = 13,
803 GOLAN_CQE_RESP_ERR = 14
804 };
805
806 struct golan_cq_context {
807 u8 status;
808 u8 cqe_sz_flags;
809 u8 st;
810 u8 rsvd3;
811 u8 rsvd4[6];
812 __be16 page_offset;
813 __be32 log_sz_usr_page;
814 __be16 cq_period;
815 __be16 cq_max_count;
816 __be16 rsvd20;
817 __be16 c_eqn;
818 u8 log_pg_sz;
819 u8 rsvd25[7];
820 __be32 last_notified_index;
821 __be32 solicit_producer_index;
822 __be32 consumer_counter;
823 __be32 producer_counter;
824 u8 rsvd48[8];
825 __be64 db_record_addr;
826 } __attribute ( ( packed ) );
827
828
829 struct golan_create_cq_mbox_in_data {
830 struct golan_cq_context ctx;
831 u8 rsvd6[192];
832 __be64 pas[0];
833 } __attribute ( ( packed ) );
834
835 struct golan_create_cq_mbox_in {
836 struct golan_inbox_hdr hdr;
837 __be32 input_cqn;
838 u8 rsvdx[4];
839 struct golan_create_cq_mbox_in_data data;
840 } __attribute ( ( packed ) );
841
842 struct golan_create_cq_mbox_out {
843 struct golan_outbox_hdr hdr;
844 __be32 cqn;
845 u8 rsvd0[4];
846 } __attribute ( ( packed ) );
847
848 struct golan_destroy_cq_mbox_in {
849 struct golan_inbox_hdr hdr;
850 __be32 cqn;
851 u8 rsvd0[4];
852 } __attribute ( ( packed ) );
853
854 struct golan_destroy_cq_mbox_out {
855 struct golan_outbox_hdr hdr;
856 u8 rsvd0[8];
857 } __attribute ( ( packed ) );
858
859 struct golan_err_cqe {
860 u8 rsvd0[32];
861 __be32 srqn;
862 u8 rsvd1[16];
863 u8 hw_syndrom;
864 u8 rsvd2;
865 u8 vendor_err_synd;
866 u8 syndrome;
867 __be32 s_wqe_opcode_qpn;
868 __be16 wqe_counter;
869 u8 signature;
870 u8 op_own;
871 } __attribute ( ( packed ) );
872
873 struct golan_cqe64 {
874 u8 rsvd0[17];
875 u8 ml_path;
876 u8 rsvd20[4];
877 __be16 slid;
878 __be32 flags_rqpn;
879 u8 rsvd28[4];
880 __be32 srqn;
881 __be32 imm_inval_pkey;
882 u8 rsvd40[4];
883 __be32 byte_cnt;
884 __be64 timestamp;
885 __be32 sop_drop_qpn;
886 __be16 wqe_counter;
887 u8 signature;
888 u8 op_own;
889 } __attribute ( ( packed ) );
890
891 /* Queue Pair Structures */
892 #define GOLAN_QP_CTX_ST_BIT 16
893 #define GOLAN_QP_CTX_PM_STATE_BIT 11
894 #define GOLAN_QP_CTX_FRE_BIT 11
895 #define GOLAN_QP_CTX_RLKY_BIT 4
896 #define GOLAN_QP_CTX_RQ_SIZE_BIT 3
897 #define GOLAN_QP_CTX_SQ_SIZE_BIT 11
898 #define GOLAN_QP_CTX_MTU_BIT 5
899 #define GOLAN_QP_CTX_ACK_REQ_FREQ_BIT 28
900
901 enum {
902 GOLAN_QP_CTX_DONT_USE_RSRVD_LKEY = 0,
903 GOLAN_QP_CTX_USE_RSRVD_LKEY = 1
904 };
905
906 enum {
907 GOLAN_IB_ACK_REQ_FREQ = 8,
908 };
909
910 enum golan_qp_optpar {
911 GOLAN_QP_PARAM_ALT_ADDR_PATH = 1 << 0,
912 GOLAN_QP_PARAM_RRE = 1 << 1,
913 GOLAN_QP_PARAM_RAE = 1 << 2,
914 GOLAN_QP_PARAM_RWE = 1 << 3,
915 GOLAN_QP_PARAM_PKEY_INDEX = 1 << 4,
916 GOLAN_QP_PARAM_Q_KEY = 1 << 5,
917 GOLAN_QP_PARAM_RNR_TIMEOUT = 1 << 6,
918 GOLAN_QP_PARAM_PRIMARY_ADDR_PATH = 1 << 7,
919 GOLAN_QP_PARAM_SRA_MAX = 1 << 8,
920 GOLAN_QP_PARAM_RRA_MAX = 1 << 9,
921 GOLAN_QP_PARAM_PM_STATE = 1 << 10,
922 GOLAN_QP_PARAM_RETRY_COUNT = 1 << 12,
923 GOLAN_QP_PARAM_RNR_RETRY = 1 << 13,
924 GOLAN_QP_PARAM_ACK_TIMEOUT = 1 << 14,
925 GOLAN_QP_PARAM_PRI_PORT = 1 << 16,
926 GOLAN_QP_PARAM_SRQN = 1 << 18,
927 GOLAN_QP_PARAM_CQN_RCV = 1 << 19,
928 GOLAN_QP_PARAM_DC_HS = 1 << 20,
929 GOLAN_QP_PARAM_DC_KEY = 1 << 21
930 };
931
932 #define GOLAN_QP_PARAMS_INIT2RTR_MASK (GOLAN_QP_PARAM_PKEY_INDEX |\
933 GOLAN_QP_PARAM_Q_KEY |\
934 GOLAN_QP_PARAM_RWE |\
935 GOLAN_QP_PARAM_RRE)
936
937 #define GOLAN_QP_PARAMS_RTR2RTS_MASK (GOLAN_QP_PARAM_PM_STATE |\
938 GOLAN_QP_PARAM_RNR_TIMEOUT |\
939 GOLAN_QP_PARAM_Q_KEY |\
940 GOLAN_QP_PARAM_RWE |\
941 GOLAN_QP_PARAM_RRE)
942
943
944 enum {
945 GOLAN_QP_ST_RC = 0x0,
946 GOLAN_QP_ST_UC = 0x1,
947 GOLAN_QP_ST_UD = 0x2,
948 GOLAN_QP_ST_XRC = 0x3,
949 GOLAN_QP_ST_MLX = 0x4,
950 GOLAN_QP_ST_DC = 0x5,
951 GOLAN_QP_ST_QP0 = 0x7,
952 GOLAN_QP_ST_QP1 = 0x8,
953 GOLAN_QP_ST_RAW_ETHERTYPE = 0x9,
954 GOLAN_QP_ST_RAW_IPV6 = 0xa,
955 GOLAN_QP_ST_SNIFFER = 0xb,
956 GOLAN_QP_ST_SYNC_UMR = 0xe,
957 GOLAN_QP_ST_PTP_1588 = 0xd,
958 GOLAN_QP_ST_REG_UMR = 0xc,
959 GOLAN_QP_ST_MAX
960 };
961
962 enum {
963 GOLAN_QP_PM_MIGRATED = 0x3,
964 GOLAN_QP_PM_ARMED = 0x0,
965 GOLAN_QP_PM_REARM = 0x1
966 };
967
968 enum {
969 GOLAN_QP_LAT_SENSITIVE = 1 << 28,
970 GOLAN_QP_ENABLE_SIG = 1 << 31
971 };
972
973
974 struct golan_qp_db {
975 u8 rsvd0[2];
976 __be16 recv_db;
977 u8 rsvd1[2];
978 __be16 send_db;
979 } __attribute ( ( packed ) );
980
981 enum {
982 GOLAN_WQE_CTRL_CQ_UPDATE = 2 << 2, /*Wissam, wtf?*/
983 GOLAN_WQE_CTRL_SOLICITED = 1 << 1
984 };
985
986 struct golan_wqe_ctrl_seg {
987 __be32 opmod_idx_opcode;
988 __be32 qpn_ds;
989 u8 signature;
990 u8 rsvd[2];
991 u8 fm_ce_se;
992 __be32 imm;
993 } __attribute ( ( packed ) );
994
995 struct golan_av {
996 union {
997 struct {
998 __be32 qkey;
999 __be32 reserved;
1000 } qkey;
1001 __be64 dc_key;
1002 } key;
1003 __be32 dqp_dct;
1004 u8 stat_rate_sl;
1005 u8 fl_mlid;
1006 __be16 rlid;
1007 u8 reserved0[10];
1008 u8 tclass;
1009 u8 hop_limit;
1010 __be32 grh_gid_fl;
1011 u8 rgid[16];
1012 } __attribute ( ( packed ) );
1013
1014 struct golan_wqe_data_seg {
1015 __be32 byte_count;
1016 __be32 lkey;
1017 __be64 addr;
1018 } __attribute ( ( packed ) );
1019
1020 struct golan_wqe_signature_seg {
1021 u8 rsvd0[4];
1022 u8 signature;
1023 u8 rsvd1[11];
1024 } __attribute ( ( packed ) );
1025
1026 struct golan_wqe_inline_seg {
1027 __be32 byte_count;
1028 } __attribute ( ( packed ) );
1029
1030 struct golan_qp_path {
1031 u8 fl;
1032 u8 rsvd3;
1033 u8 free_ar;
1034 u8 pkey_index;
1035 u8 rsvd0;
1036 u8 grh_mlid;
1037 __be16 rlid;
1038 u8 ackto_lt;
1039 u8 mgid_index;
1040 u8 static_rate;
1041 u8 hop_limit;
1042 __be32 tclass_flowlabel;
1043 u8 rgid[16];
1044 u8 rsvd1[4];
1045 u8 sl;
1046 u8 port;
1047 u8 rsvd2[6];
1048 } __attribute ( ( packed ) );
1049
1050 struct golan_qp_context {
1051 __be32 flags;
1052 __be32 flags_pd;
1053 u8 mtu_msgmax;
1054 u8 rq_size_stride;
1055 __be16 sq_crq_size;
1056 __be32 qp_counter_set_usr_page;
1057 __be32 wire_qpn;
1058 __be32 log_pg_sz_remote_qpn;
1059 struct golan_qp_path pri_path;
1060 struct golan_qp_path alt_path;
1061 __be32 params1;
1062 u8 reserved2[4];
1063 __be32 next_send_psn;
1064 __be32 cqn_send;
1065 u8 reserved3[8];
1066 __be32 last_acked_psn;
1067 __be32 ssn;
1068 __be32 params2;
1069 __be32 rnr_nextrecvpsn;
1070 __be32 xrcd;
1071 __be32 cqn_recv;
1072 __be64 db_rec_addr;
1073 __be32 qkey;
1074 __be32 rq_type_srqn;
1075 __be32 rmsn;
1076 __be16 hw_sq_wqe_counter;
1077 __be16 sw_sq_wqe_counter;
1078 __be16 hw_rcyclic_byte_counter;
1079 __be16 hw_rq_counter;
1080 __be16 sw_rcyclic_byte_counter;
1081 __be16 sw_rq_counter;
1082 u8 rsvd0[5];
1083 u8 cgs;
1084 u8 cs_req;
1085 u8 cs_res;
1086 __be64 dc_access_key;
1087 u8 rsvd1[24];
1088 } __attribute ( ( packed ) );
1089
1090 struct golan_create_qp_mbox_in_data {
1091 __be32 opt_param_mask;
1092 u8 rsvd1[4];
1093 struct golan_qp_context ctx;
1094 u8 rsvd3[16];
1095 __be64 pas[0];
1096 } __attribute ( ( packed ) );
1097
1098 struct golan_create_qp_mbox_in {
1099 struct golan_inbox_hdr hdr;
1100 __be32 input_qpn;
1101 u8 rsvd0[4];
1102 struct golan_create_qp_mbox_in_data data;
1103 } __attribute ( ( packed ) );
1104
1105 struct golan_create_qp_mbox_out {
1106 struct golan_outbox_hdr hdr;
1107 __be32 qpn;
1108 u8 rsvd0[4];
1109 } __attribute ( ( packed ) );
1110
1111 struct golan_destroy_qp_mbox_in {
1112 struct golan_inbox_hdr hdr;
1113 __be32 qpn;
1114 u8 rsvd0[4];
1115 } __attribute ( ( packed ) );
1116
1117 struct golan_destroy_qp_mbox_out {
1118 struct golan_outbox_hdr hdr;
1119 u8 rsvd0[8];
1120 } __attribute ( ( packed ) );
1121
1122 struct golan_modify_qp_mbox_in_data {
1123 __be32 optparam;
1124 u8 rsvd0[4];
1125 struct golan_qp_context ctx;
1126 } __attribute ( ( packed ) );
1127
1128 struct golan_modify_qp_mbox_in {
1129 struct golan_inbox_hdr hdr;
1130 __be32 qpn;
1131 u8 rsvd1[4];
1132 struct golan_modify_qp_mbox_in_data data;
1133 } __attribute ( ( packed ) );
1134
1135 struct golan_modify_qp_mbox_out {
1136 struct golan_outbox_hdr hdr;
1137 u8 rsvd0[8];
1138 } __attribute ( ( packed ) );
1139
1140 struct golan_attach_mcg_mbox_in {
1141 struct golan_inbox_hdr hdr;
1142 __be32 qpn;
1143 __be32 rsvd;
1144 u8 gid[16];
1145 } __attribute ( ( packed ) );
1146
1147 struct golan_attach_mcg_mbox_out {
1148 struct golan_outbox_hdr hdr;
1149 u8 rsvf[8];
1150 } __attribute ( ( packed ) );
1151
1152 struct golan_detach_mcg_mbox_in {
1153 struct golan_inbox_hdr hdr;
1154 __be32 qpn;
1155 __be32 rsvd;
1156 u8 gid[16];
1157 } __attribute ( ( packed ) );
1158
1159 struct golan_detach_mcg_mbox_out {
1160 struct golan_outbox_hdr hdr;
1161 u8 rsvf[8];
1162 } __attribute ( ( packed ) );
1163
1164
1165 #define MAILBOX_SIZE sizeof(struct golan_cmd_prot_block)
1166
1167 #endif /* __CIB_PRM__ */