[efi] Implement the EFI_PXE_BASE_CODE_PROTOCOL
[ipxe.git] / src / drivers / infiniband / hermon.h
1 #ifndef _HERMON_H
2 #define _HERMON_H
3
4 /** @file
5 *
6 * Mellanox Hermon Infiniband HCA driver
7 *
8 */
9
10 FILE_LICENCE ( GPL2_OR_LATER );
11
12 #include <stdint.h>
13 #include <ipxe/uaccess.h>
14 #include <ipxe/ib_packet.h>
15 #include <ipxe/bofm.h>
16 #include <ipxe/nvsvpd.h>
17 #include <ipxe/nvo.h>
18 #include "mlx_bitops.h"
19 #include "MT25408_PRM.h"
20
21 /*
22 * Hardware constants
23 *
24 */
25
26 /* Ports in existence */
27 #define HERMON_MAX_PORTS 2
28 #define HERMON_PORT_BASE 1
29
30 /* PCI BARs */
31 #define HERMON_PCI_CONFIG_BAR PCI_BASE_ADDRESS_0
32 #define HERMON_PCI_CONFIG_BAR_SIZE 0x100000
33 #define HERMON_PCI_UAR_BAR PCI_BASE_ADDRESS_2
34
35 /* Device reset */
36 #define HERMON_RESET_OFFSET 0x0f0010
37 #define HERMON_RESET_MAGIC 0x01000000UL
38 #define HERMON_RESET_WAIT_TIME_MS 1000
39
40 /* Work queue entry and completion queue entry opcodes */
41 #define HERMON_OPCODE_NOP 0x00
42 #define HERMON_OPCODE_SEND 0x0a
43 #define HERMON_OPCODE_RECV_ERROR 0xfe
44 #define HERMON_OPCODE_SEND_ERROR 0xff
45
46 /* HCA command register opcodes */
47 #define HERMON_HCR_QUERY_DEV_CAP 0x0003
48 #define HERMON_HCR_QUERY_FW 0x0004
49 #define HERMON_HCR_INIT_HCA 0x0007
50 #define HERMON_HCR_CLOSE_HCA 0x0008
51 #define HERMON_HCR_INIT_PORT 0x0009
52 #define HERMON_HCR_CLOSE_PORT 0x000a
53 #define HERMON_HCR_SET_PORT 0x000c
54 #define HERMON_HCR_SW2HW_MPT 0x000d
55 #define HERMON_HCR_WRITE_MTT 0x0011
56 #define HERMON_HCR_MAP_EQ 0x0012
57 #define HERMON_HCR_SW2HW_EQ 0x0013
58 #define HERMON_HCR_HW2SW_EQ 0x0014
59 #define HERMON_HCR_QUERY_EQ 0x0015
60 #define HERMON_HCR_SW2HW_CQ 0x0016
61 #define HERMON_HCR_HW2SW_CQ 0x0017
62 #define HERMON_HCR_QUERY_CQ 0x0018
63 #define HERMON_HCR_RST2INIT_QP 0x0019
64 #define HERMON_HCR_INIT2RTR_QP 0x001a
65 #define HERMON_HCR_RTR2RTS_QP 0x001b
66 #define HERMON_HCR_RTS2RTS_QP 0x001c
67 #define HERMON_HCR_2RST_QP 0x0021
68 #define HERMON_HCR_QUERY_QP 0x0022
69 #define HERMON_HCR_CONF_SPECIAL_QP 0x0023
70 #define HERMON_HCR_MAD_IFC 0x0024
71 #define HERMON_HCR_READ_MCG 0x0025
72 #define HERMON_HCR_WRITE_MCG 0x0026
73 #define HERMON_HCR_MGID_HASH 0x0027
74 #define HERMON_HCR_MOD_STAT_CFG 0x0034
75 #define HERMON_HCR_QUERY_PORT 0x0043
76 #define HERMON_HCR_SENSE_PORT 0x004d
77 #define HERMON_HCR_RUN_FW 0x0ff6
78 #define HERMON_HCR_DISABLE_LAM 0x0ff7
79 #define HERMON_HCR_ENABLE_LAM 0x0ff8
80 #define HERMON_HCR_UNMAP_ICM 0x0ff9
81 #define HERMON_HCR_MAP_ICM 0x0ffa
82 #define HERMON_HCR_UNMAP_ICM_AUX 0x0ffb
83 #define HERMON_HCR_MAP_ICM_AUX 0x0ffc
84 #define HERMON_HCR_SET_ICM_SIZE 0x0ffd
85 #define HERMON_HCR_UNMAP_FA 0x0ffe
86 #define HERMON_HCR_MAP_FA 0x0fff
87
88 /* Service types */
89 #define HERMON_ST_RC 0x00
90 #define HERMON_ST_UD 0x03
91 #define HERMON_ST_MLX 0x07
92
93 /* Port types */
94 #define HERMON_PORT_TYPE_UNKNOWN 0
95 #define HERMON_PORT_TYPE_IB 1
96 #define HERMON_PORT_TYPE_ETH 2
97
98 /* MTUs */
99 #define HERMON_MTU_2048 0x04
100 #define HERMON_MTU_ETH 0x07
101
102 #define HERMON_INVALID_LKEY 0x00000100UL
103
104 #define HERMON_PAGE_SIZE ( ( size_t ) 4096 )
105
106 #define HERMON_DB_POST_SND_OFFSET 0x14
107 #define HERMON_DB_EQ_OFFSET(_eqn) \
108 ( 0x800 + HERMON_PAGE_SIZE * ( (_eqn) / 4 ) + 0x08 * ( (_eqn) % 4 ) )
109
110 #define HERMON_QP_OPT_PARAM_PM_STATE 0x00000400UL
111 #define HERMON_QP_OPT_PARAM_QKEY 0x00000020UL
112 #define HERMON_QP_OPT_PARAM_ALT_PATH 0x00000001UL
113
114 #define HERMON_MAP_EQ ( 0UL << 31 )
115 #define HERMON_UNMAP_EQ ( 1UL << 31 )
116
117 #define HERMON_SET_PORT_GENERAL_PARAM 0x0000
118 #define HERMON_SET_PORT_RECEIVE_QP 0x0100
119 #define HERMON_SET_PORT_MAC_TABLE 0x0200
120 #define HERMON_SET_PORT_VLAN_TABLE 0x0300
121 #define HERMON_SET_PORT_PRIORITY_TABLE 0x0400
122 #define HERMON_SET_PORT_GID_TABLE 0x0500
123
124 #define HERMON_EV_PORT_STATE_CHANGE 0x09
125
126 #define HERMON_SCHED_QP0 0x3f
127 #define HERMON_SCHED_DEFAULT 0x83
128
129 #define HERMON_LOG_MULTICAST_HASH_SIZE 7
130
131 #define HERMON_PM_STATE_ARMED 0x00
132 #define HERMON_PM_STATE_REARM 0x01
133 #define HERMON_PM_STATE_MIGRATED 0x03
134
135 #define HERMON_RETRY_MAX 0x07
136
137 #define HERMON_MOD_STAT_CFG_SET 0x01
138 #define HERMON_MOD_STAT_CFG_QUERY 0x03
139
140 #define HERMON_VPD_FIELD( port ) \
141 PCI_VPD_FIELD ( PCI_VPD_TAG_RW, 'V', ( '5' + (port) - 1 ) )
142
143 /*
144 * Datatypes that seem to be missing from the autogenerated documentation
145 *
146 */
147 struct hermonprm_mgm_hash_st {
148 pseudo_bit_t reserved0[0x00020];
149 /* -------------- */
150 pseudo_bit_t hash[0x00010];
151 pseudo_bit_t reserved1[0x00010];
152 } __attribute__ (( packed ));
153
154 struct hermonprm_mcg_entry_st {
155 struct hermonprm_mcg_hdr_st hdr;
156 struct hermonprm_mcg_qp_dw_st qp[8];
157 } __attribute__ (( packed ));
158
159 struct hermonprm_cq_db_record_st {
160 pseudo_bit_t update_ci[0x00018];
161 pseudo_bit_t reserved0[0x00008];
162 /* -------------- */
163 pseudo_bit_t arm_ci[0x00018];
164 pseudo_bit_t cmd[0x00003];
165 pseudo_bit_t reserved1[0x00001];
166 pseudo_bit_t cmd_sn[0x00002];
167 pseudo_bit_t reserved2[0x00002];
168 } __attribute__ (( packed ));
169
170 struct hermonprm_send_db_register_st {
171 pseudo_bit_t reserved[0x00008];
172 pseudo_bit_t qn[0x00018];
173 } __attribute__ (( packed ));
174
175 struct hermonprm_event_db_register_st {
176 pseudo_bit_t ci[0x00018];
177 pseudo_bit_t reserver[0x00007];
178 pseudo_bit_t a[0x00001];
179 } __attribute__ (( packed ));
180
181 struct hermonprm_scalar_parameter_st {
182 pseudo_bit_t value_hi[0x00020];
183 /* -------------- */
184 pseudo_bit_t value[0x00020];
185 } __attribute__ (( packed ));
186
187 struct hermonprm_event_mask_st {
188 pseudo_bit_t reserved0[0x00020];
189 /* -------------- */
190 pseudo_bit_t completion[0x00001];
191 pseudo_bit_t path_migration_succeeded[0x00001];
192 pseudo_bit_t communication_established[0x00001];
193 pseudo_bit_t send_queue_drained[0x00001];
194 pseudo_bit_t cq_error[0x00001];
195 pseudo_bit_t wq_catastrophe[0x00001];
196 pseudo_bit_t qpc_catastrophe[0x00001];
197 pseudo_bit_t path_migration_failed[0x00001];
198 pseudo_bit_t internal_error[0x00001];
199 pseudo_bit_t port_state_change[0x00001];
200 pseudo_bit_t command_done[0x00001];
201 pseudo_bit_t fexch_error[0x00001];
202 pseudo_bit_t reserved1[0x00004];
203 pseudo_bit_t wq_invalid_request[0x00001];
204 pseudo_bit_t wq_access_violation[0x00001];
205 pseudo_bit_t srq_catastrophe[0x00001];
206 pseudo_bit_t srq_last_wqe[0x00001];
207 pseudo_bit_t srq_rq_limit[0x00001];
208 pseudo_bit_t gpio[0x00001];
209 pseudo_bit_t clientreregister[0x00001];
210 pseudo_bit_t reserved2[0x00009];
211 } __attribute__ (( packed ));
212
213 struct hermonprm_port_state_change_event_st {
214 pseudo_bit_t reserved[0x00020];
215 /* -------------- */
216 struct hermonprm_port_state_change_st data;
217 } __attribute__ (( packed ));
218
219 struct hermonprm_sense_port_st {
220 pseudo_bit_t reserved0[0x00020];
221 /* -------------- */
222 pseudo_bit_t port_type[0x00002];
223 pseudo_bit_t reserved1[0x0001e];
224 } __attribute__ (( packed ));
225
226 struct hermonprm_set_port_ib_st {
227 pseudo_bit_t rqk[0x00001];
228 pseudo_bit_t rcm[0x00001];
229 pseudo_bit_t reserved0[0x00002];
230 pseudo_bit_t vl_cap[0x00004];
231 pseudo_bit_t reserved1[0x00004];
232 pseudo_bit_t mtu_cap[0x00004];
233 pseudo_bit_t g0[0x00001];
234 pseudo_bit_t ng[0x00001];
235 pseudo_bit_t sig[0x00001];
236 pseudo_bit_t mg[0x00001];
237 pseudo_bit_t mp[0x00001];
238 pseudo_bit_t mvc[0x00001];
239 pseudo_bit_t mmc[0x00001];
240 pseudo_bit_t reserved2[0x00004];
241 pseudo_bit_t lws[0x00001];
242 pseudo_bit_t lss[0x00001];
243 pseudo_bit_t reserved3[0x00003];
244 /* -------------- */
245 pseudo_bit_t capability_mask[0x00020];
246 /* -------------- */
247 pseudo_bit_t system_image_guid_h[0x00020];
248 /* -------------- */
249 pseudo_bit_t system_image_guid_l[0x00020];
250 /* -------------- */
251 pseudo_bit_t guid0_h[0x00020];
252 /* -------------- */
253 pseudo_bit_t guid0_l[0x00020];
254 /* -------------- */
255 pseudo_bit_t node_guid_h[0x00020];
256 /* -------------- */
257 pseudo_bit_t node_guid_l[0x00020];
258 /* -------------- */
259 pseudo_bit_t egress_sniff_qpn[0x00018];
260 pseudo_bit_t egress_sniff_mode[0x00002];
261 pseudo_bit_t reserved4[0x00006];
262 /* -------------- */
263 pseudo_bit_t ingress_sniff_qpn[0x00018];
264 pseudo_bit_t ingress_sniff_mode[0x00002];
265 pseudo_bit_t reserved5[0x00006];
266 /* -------------- */
267 pseudo_bit_t max_gid[0x00010];
268 pseudo_bit_t max_pkey[0x00010];
269 /* -------------- */
270 pseudo_bit_t reserved6[0x00020];
271 /* -------------- */
272 pseudo_bit_t reserved7[0x00020];
273 /* -------------- */
274 pseudo_bit_t reserved8[0x00020];
275 /* -------------- */
276 pseudo_bit_t reserved9[0x00020];
277 /* -------------- */
278 pseudo_bit_t reserved10[0x00020];
279 /* -------------- */
280 pseudo_bit_t reserved11[0x00020];
281 /* -------------- */
282 pseudo_bit_t reserved12[0x00020];
283 /* -------------- */
284 pseudo_bit_t reserved13[0x00020];
285 /* -------------- */
286 pseudo_bit_t reserved14[0x00020];
287 /* -------------- */
288 pseudo_bit_t reserved15[0x00020];
289 /* -------------- */
290 pseudo_bit_t reserved16[0x00020];
291 /* -------------- */
292 pseudo_bit_t reserved17[0x00020];
293 /* -------------- */
294 pseudo_bit_t reserved18[0x00020];
295 /* -------------- */
296 pseudo_bit_t reserved19[0x00020];
297 /* -------------- */
298 pseudo_bit_t reserved20[0x00020];
299 /* -------------- */
300 pseudo_bit_t reserved21[0x00020];
301 /* -------------- */
302 pseudo_bit_t reserved22[0x00020];
303 /* -------------- */
304 pseudo_bit_t link_width_supported[0x00004];
305 pseudo_bit_t link_speed_supported[0x00004];
306 pseudo_bit_t reserved23[0x00018];
307 /* -------------- */
308 } __attribute__ (( packed ));
309
310 struct hermonprm_query_port_cap_st {
311 pseudo_bit_t eth_mtu[0x00010];
312 pseudo_bit_t ib_mtu[0x00004];
313 pseudo_bit_t reserved0[0x00004];
314 pseudo_bit_t ib[0x00001];
315 pseudo_bit_t eth[0x00001];
316 pseudo_bit_t reserved1[0x00005];
317 pseudo_bit_t link_state[0x00001];
318 /* -------------- */
319 pseudo_bit_t log_max_pkey[0x00004];
320 pseudo_bit_t log_max_gid[0x00004];
321 pseudo_bit_t ib_port_width[0x00004];
322 pseudo_bit_t reserved2[0x00004];
323 pseudo_bit_t eth_link_speed[0x00004];
324 pseudo_bit_t reserved3[0x00004];
325 pseudo_bit_t ib_link_speed[0x00004];
326 pseudo_bit_t reserved4[0x00004];
327 /* -------------- */
328 pseudo_bit_t max_vl_ib[0x00004];
329 pseudo_bit_t reserved5[0x00004];
330 pseudo_bit_t log_max_mac[0x00004];
331 pseudo_bit_t log_max_vlan[0x00004];
332 pseudo_bit_t reserved6[0x00010];
333 /* -------------- */
334 pseudo_bit_t reserved7[0x00020];
335 /* -------------- */
336 pseudo_bit_t mac_47_32[0x00010];
337 pseudo_bit_t reserved8[0x00010];
338 /* -------------- */
339 pseudo_bit_t mac_31_0[0x00020];
340 /* -------------- */
341 pseudo_bit_t vendor_oui[0x00018];
342 pseudo_bit_t transceiver_type[0x00008];
343 /* -------------- */
344 pseudo_bit_t reserved9[0x00010];
345 pseudo_bit_t wavelength[0x00010];
346 /* -------------- */
347 pseudo_bit_t transceiver_code_hi[0x00020];
348 /* -------------- */
349 pseudo_bit_t transceiver_code_lo[0x00020];
350 /* -------------- */
351 pseudo_bit_t reserved10[0x000c0];
352 } __attribute__ (( packed ));
353
354 struct hermonprm_set_port_general_context_st {
355 pseudo_bit_t v_mtu[0x00001];
356 pseudo_bit_t v_pprx[0x00001];
357 pseudo_bit_t v_pptx[0x00001];
358 pseudo_bit_t reserved0[0x0001d];
359 /* -------------- */
360 pseudo_bit_t mtu[0x00010];
361 pseudo_bit_t reserved1[0x00010];
362 /* -------------- */
363 pseudo_bit_t reserved2[0x00010];
364 pseudo_bit_t pfctx[0x00008];
365 pseudo_bit_t reserved3[0x00007];
366 pseudo_bit_t pptx[0x00001];
367 /* -------------- */
368 pseudo_bit_t reserved4[0x00010];
369 pseudo_bit_t pfcrx[0x00008];
370 pseudo_bit_t reserved5[0x00007];
371 pseudo_bit_t pprx[0x00001];
372 /* -------------- */
373 } __attribute__ (( packed ));
374
375 struct hermonprm_set_port_rqp_calc_st {
376 pseudo_bit_t base_qpn[0x00018];
377 pseudo_bit_t reserved0[0x00008];
378 /* -------------- */
379 pseudo_bit_t n_p[0x00002];
380 pseudo_bit_t reserved1[0x00006];
381 pseudo_bit_t n_v[0x00003];
382 pseudo_bit_t reserved2[0x00005];
383 pseudo_bit_t n_m[0x00004];
384 pseudo_bit_t reserved3[0x0000c];
385 /* -------------- */
386 pseudo_bit_t mac_miss_index[0x00008];
387 pseudo_bit_t reserved4[0x00018];
388 /* -------------- */
389 pseudo_bit_t vlan_miss_index[0x00007];
390 pseudo_bit_t reserved5[0x00008];
391 pseudo_bit_t intra_miss[0x00001];
392 pseudo_bit_t no_vlan_index[0x00007];
393 pseudo_bit_t reserved6[0x00008];
394 pseudo_bit_t intra_no_vlan[0x00001];
395 /* -------------- */
396 pseudo_bit_t no_vlan_prio[0x00003];
397 pseudo_bit_t reserved7[0x0001d];
398 /* -------------- */
399 pseudo_bit_t promisc_qpn[0x00018];
400 pseudo_bit_t reserved8[0x00007];
401 pseudo_bit_t en_uc_promisc[0x00001];
402 /* -------------- */
403 pseudo_bit_t def_mcast_qpn[0x00018];
404 pseudo_bit_t reserved9[0x00005];
405 pseudo_bit_t mc_by_vlan[0x00001];
406 pseudo_bit_t mc_promisc_mode[0x00002];
407 /* -------------- */
408 pseudo_bit_t reserved10[0x00020];
409 /* -------------- */
410 } __attribute__ (( packed ));
411
412 struct hermonprm_set_port_mac_table_st {
413 pseudo_bit_t mac_h[0x00010];
414 pseudo_bit_t reserved0[0x0000f];
415 pseudo_bit_t v[0x00001];
416 /* -------------- */
417 pseudo_bit_t mac_l[0x00020];
418 /* -------------- */
419 } __attribute__ (( packed ));
420
421 struct hermonprm_set_port_vlan_st {
422 pseudo_bit_t vlan_id[0x0000c];
423 pseudo_bit_t reserved0[0x00012];
424 pseudo_bit_t intra[0x00001];
425 pseudo_bit_t v[0x00001];
426 /* -------------- */
427 } __attribute__ (( packed ));
428
429 struct hermonprm_mod_stat_cfg_input_mod_st {
430 pseudo_bit_t offset[0x00008];
431 pseudo_bit_t portnum[0x00008];
432 pseudo_bit_t xnum[0x00004];
433 pseudo_bit_t linkspeed[0x00003];
434 pseudo_bit_t autoneg[0x00001];
435 pseudo_bit_t reserved[0x00004];
436 pseudo_bit_t setup_mode[0x00004];
437 } __attribute__ (( packed ));
438
439 /*
440 * Wrapper structures for hardware datatypes
441 *
442 */
443
444 struct MLX_DECLARE_STRUCT ( hermonprm_completion_queue_context );
445 struct MLX_DECLARE_STRUCT ( hermonprm_completion_queue_entry );
446 struct MLX_DECLARE_STRUCT ( hermonprm_completion_with_error );
447 struct MLX_DECLARE_STRUCT ( hermonprm_cq_db_record );
448 struct MLX_DECLARE_STRUCT ( hermonprm_eqc );
449 struct MLX_DECLARE_STRUCT ( hermonprm_event_db_register );
450 struct MLX_DECLARE_STRUCT ( hermonprm_event_mask );
451 struct MLX_DECLARE_STRUCT ( hermonprm_event_queue_entry );
452 struct MLX_DECLARE_STRUCT ( hermonprm_hca_command_register );
453 struct MLX_DECLARE_STRUCT ( hermonprm_init_hca );
454 struct MLX_DECLARE_STRUCT ( hermonprm_mad_ifc );
455 struct MLX_DECLARE_STRUCT ( hermonprm_mcg_entry );
456 struct MLX_DECLARE_STRUCT ( hermonprm_mgm_hash );
457 struct MLX_DECLARE_STRUCT ( hermonprm_mod_stat_cfg );
458 struct MLX_DECLARE_STRUCT ( hermonprm_mod_stat_cfg_input_mod );
459 struct MLX_DECLARE_STRUCT ( hermonprm_mpt );
460 struct MLX_DECLARE_STRUCT ( hermonprm_mtt );
461 struct MLX_DECLARE_STRUCT ( hermonprm_port_state_change_event );
462 struct MLX_DECLARE_STRUCT ( hermonprm_qp_db_record );
463 struct MLX_DECLARE_STRUCT ( hermonprm_qp_ee_state_transitions );
464 struct MLX_DECLARE_STRUCT ( hermonprm_query_dev_cap );
465 struct MLX_DECLARE_STRUCT ( hermonprm_query_fw );
466 struct MLX_DECLARE_STRUCT ( hermonprm_query_port_cap );
467 struct MLX_DECLARE_STRUCT ( hermonprm_queue_pair_ee_context_entry );
468 struct MLX_DECLARE_STRUCT ( hermonprm_scalar_parameter );
469 struct MLX_DECLARE_STRUCT ( hermonprm_sense_port );
470 struct MLX_DECLARE_STRUCT ( hermonprm_send_db_register );
471 struct MLX_DECLARE_STRUCT ( hermonprm_set_port_ib );
472 struct MLX_DECLARE_STRUCT ( hermonprm_set_port_general_context );
473 struct MLX_DECLARE_STRUCT ( hermonprm_set_port_mac_table );
474 struct MLX_DECLARE_STRUCT ( hermonprm_set_port_rqp_calc );
475 struct MLX_DECLARE_STRUCT ( hermonprm_set_port_vlan );
476 struct MLX_DECLARE_STRUCT ( hermonprm_ud_address_vector );
477 struct MLX_DECLARE_STRUCT ( hermonprm_virtual_physical_mapping );
478 struct MLX_DECLARE_STRUCT ( hermonprm_wqe_segment_ctrl_mlx );
479 struct MLX_DECLARE_STRUCT ( hermonprm_wqe_segment_ctrl_send );
480 struct MLX_DECLARE_STRUCT ( hermonprm_wqe_segment_data_ptr );
481 struct MLX_DECLARE_STRUCT ( hermonprm_wqe_segment_ud );
482
483 /*
484 * Composite hardware datatypes
485 *
486 */
487
488 struct hermonprm_write_mtt {
489 struct hermonprm_scalar_parameter mtt_base_addr;
490 struct hermonprm_scalar_parameter reserved;
491 struct hermonprm_mtt mtt;
492 } __attribute__ (( packed ));
493
494 #define HERMON_MAX_GATHER 2
495
496 struct hermonprm_ud_send_wqe {
497 struct hermonprm_wqe_segment_ctrl_send ctrl;
498 struct hermonprm_wqe_segment_ud ud;
499 struct hermonprm_wqe_segment_data_ptr data[HERMON_MAX_GATHER];
500 } __attribute__ (( packed ));
501
502 struct hermonprm_mlx_send_wqe {
503 struct hermonprm_wqe_segment_ctrl_mlx ctrl;
504 struct hermonprm_wqe_segment_data_ptr data[HERMON_MAX_GATHER];
505 uint8_t headers[IB_MAX_HEADER_SIZE];
506 } __attribute__ (( packed ));
507
508 struct hermonprm_rc_send_wqe {
509 struct hermonprm_wqe_segment_ctrl_send ctrl;
510 struct hermonprm_wqe_segment_data_ptr data[HERMON_MAX_GATHER];
511 } __attribute__ (( packed ));
512
513 struct hermonprm_eth_send_wqe {
514 struct hermonprm_wqe_segment_ctrl_send ctrl;
515 struct hermonprm_wqe_segment_data_ptr data[HERMON_MAX_GATHER];
516 } __attribute__ (( packed ));
517
518 #define HERMON_MAX_SCATTER 1
519
520 struct hermonprm_recv_wqe {
521 struct hermonprm_wqe_segment_data_ptr data[HERMON_MAX_SCATTER];
522 } __attribute__ (( packed ));
523
524 union hermonprm_completion_entry {
525 struct hermonprm_completion_queue_entry normal;
526 struct hermonprm_completion_with_error error;
527 } __attribute__ (( packed ));
528
529 union hermonprm_event_entry {
530 struct hermonprm_event_queue_entry generic;
531 struct hermonprm_port_state_change_event port_state_change;
532 } __attribute__ (( packed ));
533
534 union hermonprm_doorbell_register {
535 struct hermonprm_send_db_register send;
536 struct hermonprm_event_db_register event;
537 uint32_t dword[1];
538 } __attribute__ (( packed ));
539
540 union hermonprm_mad {
541 struct hermonprm_mad_ifc ifc;
542 union ib_mad mad;
543 } __attribute__ (( packed ));
544
545 union hermonprm_set_port {
546 struct hermonprm_set_port_ib ib;
547 struct hermonprm_set_port_general_context general;
548 struct hermonprm_set_port_rqp_calc rqp_calc;
549 struct hermonprm_set_port_mac_table mac_table[128];
550 struct hermonprm_set_port_vlan vlan;
551 } __attribute__ (( packed ));
552
553 /*
554 * iPXE-specific definitions
555 *
556 */
557
558 /** Hermon device capabilitiess */
559 struct hermon_dev_cap {
560 /** CMPT entry size */
561 size_t cmpt_entry_size;
562 /** Number of reserved QPs */
563 unsigned int reserved_qps;
564 /** QP context entry size */
565 size_t qpc_entry_size;
566 /** Alternate path context entry size */
567 size_t altc_entry_size;
568 /** Auxiliary context entry size */
569 size_t auxc_entry_size;
570 /** Number of reserved SRQs */
571 unsigned int reserved_srqs;
572 /** SRQ context entry size */
573 size_t srqc_entry_size;
574 /** Number of reserved CQs */
575 unsigned int reserved_cqs;
576 /** CQ context entry size */
577 size_t cqc_entry_size;
578 /** Number of reserved EQs */
579 unsigned int reserved_eqs;
580 /** EQ context entry size */
581 size_t eqc_entry_size;
582 /** Number of reserved MTTs */
583 unsigned int reserved_mtts;
584 /** MTT entry size */
585 size_t mtt_entry_size;
586 /** Number of reserved MRWs */
587 unsigned int reserved_mrws;
588 /** DMPT entry size */
589 size_t dmpt_entry_size;
590 /** Number of reserved UARs */
591 unsigned int reserved_uars;
592 /** Number of ports */
593 unsigned int num_ports;
594 /** Dual-port different protocol */
595 int dpdp;
596 };
597
598 /** Number of cMPT entries of each type */
599 #define HERMON_CMPT_MAX_ENTRIES ( 1 << 24 )
600
601 /** Hermon ICM memory map entry */
602 struct hermon_icm_map {
603 /** Offset (virtual address within ICM) */
604 uint64_t offset;
605 /** Length */
606 size_t len;
607 };
608
609 /** Discontiguous regions within Hermon ICM */
610 enum hermon_icm_map_regions {
611 HERMON_ICM_QP_CMPT = 0,
612 HERMON_ICM_SRQ_CMPT,
613 HERMON_ICM_CQ_CMPT,
614 HERMON_ICM_EQ_CMPT,
615 HERMON_ICM_OTHER,
616 HERMON_ICM_NUM_REGIONS
617 };
618
619 /** UAR page for doorbell accesses
620 *
621 * Pages 0-127 are reserved for event queue doorbells only, so we use
622 * page 128.
623 */
624 #define HERMON_UAR_NON_EQ_PAGE 128
625
626 /** Maximum number of allocatable MTT entries
627 *
628 * This is a policy decision, not a device limit.
629 */
630 #define HERMON_MAX_MTTS 64
631
632 /** A Hermon MTT descriptor */
633 struct hermon_mtt {
634 /** MTT offset */
635 unsigned int mtt_offset;
636 /** Number of pages */
637 unsigned int num_pages;
638 /** MTT base address */
639 unsigned int mtt_base_addr;
640 /** Offset within page */
641 unsigned int page_offset;
642 };
643
644 /** Alignment of Hermon send work queue entries */
645 #define HERMON_SEND_WQE_ALIGN 128
646
647 /** A Hermon send work queue entry */
648 union hermon_send_wqe {
649 struct hermonprm_wqe_segment_ctrl_send ctrl;
650 struct hermonprm_ud_send_wqe ud;
651 struct hermonprm_mlx_send_wqe mlx;
652 struct hermonprm_rc_send_wqe rc;
653 struct hermonprm_eth_send_wqe eth;
654 uint8_t force_align[HERMON_SEND_WQE_ALIGN];
655 } __attribute__ (( packed ));
656
657 /** A Hermon send work queue */
658 struct hermon_send_work_queue {
659 /** Number of work queue entries, including headroom
660 *
661 * Hermon requires us to leave unused space within the send
662 * WQ, so we create a send WQ with more entries than are
663 * requested in the create_qp() call.
664 */
665 unsigned int num_wqes;
666 /** Work queue entries */
667 union hermon_send_wqe *wqe;
668 /** Size of work queue */
669 size_t wqe_size;
670 /** Doorbell register */
671 void *doorbell;
672 };
673
674 /** Alignment of Hermon receive work queue entries */
675 #define HERMON_RECV_WQE_ALIGN 16
676
677 /** A Hermon receive work queue entry */
678 union hermon_recv_wqe {
679 struct hermonprm_recv_wqe recv;
680 uint8_t force_align[HERMON_RECV_WQE_ALIGN];
681 } __attribute__ (( packed ));
682
683 /** A Hermon receive work queue */
684 struct hermon_recv_work_queue {
685 /** Work queue entries */
686 union hermon_recv_wqe *wqe;
687 /** Size of work queue */
688 size_t wqe_size;
689 /** Doorbell record */
690 struct hermonprm_qp_db_record *doorbell;
691 };
692
693 /** Number of special queue pairs */
694 #define HERMON_NUM_SPECIAL_QPS 8
695
696 /** Number of queue pairs reserved for the "special QP" block
697 *
698 * The special QPs must be within a contiguous block aligned on its
699 * own size.
700 */
701 #define HERMON_RSVD_SPECIAL_QPS ( ( HERMON_NUM_SPECIAL_QPS << 1 ) - 1 )
702
703 /** Maximum number of allocatable queue pairs
704 *
705 * This is a policy decision, not a device limit.
706 */
707 #define HERMON_MAX_QPS 8
708
709 /** Queue pair number randomisation mask */
710 #define HERMON_QPN_RANDOM_MASK 0xfff000
711
712 /** Hermon queue pair state */
713 enum hermon_queue_pair_state {
714 HERMON_QP_ST_RST = 0,
715 HERMON_QP_ST_INIT,
716 HERMON_QP_ST_RTR,
717 HERMON_QP_ST_RTS,
718 };
719
720 /** A Hermon queue pair */
721 struct hermon_queue_pair {
722 /** Work queue buffer */
723 void *wqe;
724 /** Size of work queue buffer */
725 size_t wqe_size;
726 /** MTT descriptor */
727 struct hermon_mtt mtt;
728 /** Send work queue */
729 struct hermon_send_work_queue send;
730 /** Receive work queue */
731 struct hermon_recv_work_queue recv;
732 /** Queue state */
733 enum hermon_queue_pair_state state;
734 };
735
736 /** Maximum number of allocatable completion queues
737 *
738 * This is a policy decision, not a device limit.
739 */
740 #define HERMON_MAX_CQS 8
741
742 /** A Hermon completion queue */
743 struct hermon_completion_queue {
744 /** Completion queue entries */
745 union hermonprm_completion_entry *cqe;
746 /** Size of completion queue */
747 size_t cqe_size;
748 /** MTT descriptor */
749 struct hermon_mtt mtt;
750 /** Doorbell record */
751 struct hermonprm_cq_db_record *doorbell;
752 };
753
754 /** Maximum number of allocatable event queues
755 *
756 * This is a policy decision, not a device limit.
757 */
758 #define HERMON_MAX_EQS 8
759
760 /** A Hermon event queue */
761 struct hermon_event_queue {
762 /** Event queue entries */
763 union hermonprm_event_entry *eqe;
764 /** Size of event queue */
765 size_t eqe_size;
766 /** MTT descriptor */
767 struct hermon_mtt mtt;
768 /** Event queue number */
769 unsigned long eqn;
770 /** Next event queue entry index */
771 unsigned long next_idx;
772 /** Doorbell register */
773 void *doorbell;
774 };
775
776 /** Number of event queue entries
777 *
778 * This is a policy decision.
779 */
780 #define HERMON_NUM_EQES 8
781
782 /** A Hermon resource bitmask */
783 typedef uint32_t hermon_bitmask_t;
784
785 /** Size of a hermon resource bitmask */
786 #define HERMON_BITMASK_SIZE(max_entries) \
787 ( ( (max_entries) + ( 8 * sizeof ( hermon_bitmask_t ) ) - 1 ) / \
788 ( 8 * sizeof ( hermon_bitmask_t ) ) )
789
790 struct hermon;
791 struct hermon_port;
792
793 /** A Hermon port type */
794 struct hermon_port_type {
795 /** Register port
796 *
797 * @v hermon Hermon device
798 * @v port Hermon port
799 * @ret rc Return status code
800 */
801 int ( * register_dev ) ( struct hermon *hermon,
802 struct hermon_port *port );
803 /** Port state changed
804 *
805 * @v hermon Hermon device
806 * @v port Hermon port
807 * @v link_up Link is up
808 */
809 void ( * state_change ) ( struct hermon *hermon,
810 struct hermon_port *port,
811 int link_up );
812 /** Unregister port
813 *
814 * @v hermon Hermon device
815 * @v port Hermon port
816 */
817 void ( * unregister_dev ) ( struct hermon *hermon,
818 struct hermon_port *port );
819 };
820
821 /** A Hermon port */
822 struct hermon_port {
823 /** Infiniband device */
824 struct ib_device *ibdev;
825 /** Network device */
826 struct net_device *netdev;
827 /** Ethernet completion queue */
828 struct ib_completion_queue *eth_cq;
829 /** Ethernet queue pair */
830 struct ib_queue_pair *eth_qp;
831 /** Port type */
832 struct hermon_port_type *type;
833 /** Non-volatile option storage */
834 struct nvo_block nvo;
835 };
836
837 /** A Hermon device */
838 struct hermon {
839 /** PCI device */
840 struct pci_device *pci;
841 /** PCI configuration registers */
842 void *config;
843 /** PCI user Access Region */
844 void *uar;
845
846 /** Command toggle */
847 unsigned int toggle;
848 /** Command input mailbox */
849 void *mailbox_in;
850 /** Command output mailbox */
851 void *mailbox_out;
852
853 /** Device open request counter */
854 unsigned int open_count;
855
856 /** Firmware size */
857 size_t firmware_len;
858 /** Firmware area in external memory
859 *
860 * This is allocated when first needed, and freed only on
861 * final teardown, in order to avoid memory map changes at
862 * runtime.
863 */
864 userptr_t firmware_area;
865 /** ICM map */
866 struct hermon_icm_map icm_map[HERMON_ICM_NUM_REGIONS];
867 /** ICM size */
868 size_t icm_len;
869 /** ICM AUX size */
870 size_t icm_aux_len;
871 /** ICM area
872 *
873 * This is allocated when first needed, and freed only on
874 * final teardown, in order to avoid memory map changes at
875 * runtime.
876 */
877 userptr_t icm;
878
879 /** Event queue */
880 struct hermon_event_queue eq;
881 /** Unrestricted LKey
882 *
883 * Used to get unrestricted memory access.
884 */
885 unsigned long lkey;
886
887 /** Completion queue in-use bitmask */
888 hermon_bitmask_t cq_inuse[ HERMON_BITMASK_SIZE ( HERMON_MAX_CQS ) ];
889 /** Queue pair in-use bitmask */
890 hermon_bitmask_t qp_inuse[ HERMON_BITMASK_SIZE ( HERMON_MAX_QPS ) ];
891 /** MTT entry in-use bitmask */
892 hermon_bitmask_t mtt_inuse[ HERMON_BITMASK_SIZE ( HERMON_MAX_MTTS ) ];
893
894 /** Device capabilities */
895 struct hermon_dev_cap cap;
896 /** Special QPN base */
897 unsigned long special_qpn_base;
898 /** QPN base */
899 unsigned long qpn_base;
900
901 /** Non-volatile storage in PCI VPD */
902 struct nvs_vpd_device nvsvpd;
903
904 /** Ports */
905 struct hermon_port port[HERMON_MAX_PORTS];
906
907 /** BOFM device */
908 struct bofm_device bofm;
909 };
910
911 /** Global protection domain */
912 #define HERMON_GLOBAL_PD 0x123456
913
914 /** Memory key prefix */
915 #define HERMON_MKEY_PREFIX 0x77000000UL
916
917 /*
918 * HCA commands
919 *
920 */
921
922 #define HERMON_HCR_BASE 0x80680
923 #define HERMON_HCR_REG(x) ( HERMON_HCR_BASE + 4 * (x) )
924 #define HERMON_HCR_MAX_WAIT_MS 2000
925 #define HERMON_MBOX_ALIGN 4096
926 #define HERMON_MBOX_SIZE 1024
927
928 /* HCA command is split into
929 *
930 * bits 11:0 Opcode
931 * bit 12 Input uses mailbox
932 * bit 13 Output uses mailbox
933 * bits 22:14 Input parameter length (in dwords)
934 * bits 31:23 Output parameter length (in dwords)
935 *
936 * Encoding the information in this way allows us to cut out several
937 * parameters to the hermon_command() call.
938 */
939 #define HERMON_HCR_IN_MBOX 0x00001000UL
940 #define HERMON_HCR_OUT_MBOX 0x00002000UL
941 #define HERMON_HCR_OPCODE( _command ) ( (_command) & 0xfff )
942 #define HERMON_HCR_IN_LEN( _command ) ( ( (_command) >> 12 ) & 0x7fc )
943 #define HERMON_HCR_OUT_LEN( _command ) ( ( (_command) >> 21 ) & 0x7fc )
944
945 /** Build HCR command from component parts */
946 #define HERMON_HCR_INOUT_CMD( _opcode, _in_mbox, _in_len, \
947 _out_mbox, _out_len ) \
948 ( (_opcode) | \
949 ( (_in_mbox) ? HERMON_HCR_IN_MBOX : 0 ) | \
950 ( ( (_in_len) / 4 ) << 14 ) | \
951 ( (_out_mbox) ? HERMON_HCR_OUT_MBOX : 0 ) | \
952 ( ( (_out_len) / 4 ) << 23 ) )
953
954 #define HERMON_HCR_IN_CMD( _opcode, _in_mbox, _in_len ) \
955 HERMON_HCR_INOUT_CMD ( _opcode, _in_mbox, _in_len, 0, 0 )
956
957 #define HERMON_HCR_OUT_CMD( _opcode, _out_mbox, _out_len ) \
958 HERMON_HCR_INOUT_CMD ( _opcode, 0, 0, _out_mbox, _out_len )
959
960 #define HERMON_HCR_VOID_CMD( _opcode ) \
961 HERMON_HCR_INOUT_CMD ( _opcode, 0, 0, 0, 0 )
962
963 #endif /* _HERMON_H */