git://git.qemu.org / ipxe.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
[efi] Implement the EFI_PXE_BASE_CODE_PROTOCOL
[ipxe.git] / src / drivers / infiniband / linda.c
1 /*
2 * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of the
7 * License, or any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
17 * 02110-1301, USA.
18 *
19 * You can also choose to distribute this program under the terms of
20 * the Unmodified Binary Distribution Licence (as given in the file
21 * COPYING.UBDL), provided that you have satisfied its requirements.
22 */
23
24 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
25
26 #include <stdint.h>
27 #include <stdlib.h>
28 #include <errno.h>
29 #include <unistd.h>
30 #include <assert.h>
31 #include <ipxe/io.h>
32 #include <ipxe/pci.h>
33 #include <ipxe/infiniband.h>
34 #include <ipxe/i2c.h>
35 #include <ipxe/bitbash.h>
36 #include <ipxe/malloc.h>
37 #include <ipxe/iobuf.h>
38 #include "linda.h"
39
40 /**
41 * @file
42 *
43 * QLogic Linda Infiniband HCA
44 *
45 */
46
47 /** A Linda send work queue */
48 struct linda_send_work_queue {
49 /** Send buffer usage */
50 uint8_t *send_buf;
51 /** Producer index */
52 unsigned int prod;
53 /** Consumer index */
54 unsigned int cons;
55 };
56
57 /** A Linda receive work queue */
58 struct linda_recv_work_queue {
59 /** Receive header ring */
60 void *header;
61 /** Receive header producer offset (written by hardware) */
62 struct QIB_7220_scalar header_prod;
63 /** Receive header consumer offset */
64 unsigned int header_cons;
65 /** Offset within register space of the eager array */
66 unsigned long eager_array;
67 /** Number of entries in eager array */
68 unsigned int eager_entries;
69 /** Eager array producer index */
70 unsigned int eager_prod;
71 /** Eager array consumer index */
72 unsigned int eager_cons;
73 };
74
75 /** A Linda HCA */
76 struct linda {
77 /** Registers */
78 void *regs;
79
80 /** In-use contexts */
81 uint8_t used_ctx[LINDA_NUM_CONTEXTS];
82 /** Send work queues */
83 struct linda_send_work_queue send_wq[LINDA_NUM_CONTEXTS];
84 /** Receive work queues */
85 struct linda_recv_work_queue recv_wq[LINDA_NUM_CONTEXTS];
86
87 /** Offset within register space of the first send buffer */
88 unsigned long send_buffer_base;
89 /** Send buffer availability (reported by hardware) */
90 struct QIB_7220_SendBufAvail *sendbufavail;
91 /** Send buffer availability (maintained by software) */
92 uint8_t send_buf[LINDA_MAX_SEND_BUFS];
93 /** Send buffer availability producer counter */
94 unsigned int send_buf_prod;
95 /** Send buffer availability consumer counter */
96 unsigned int send_buf_cons;
97 /** Number of reserved send buffers (across all QPs) */
98 unsigned int reserved_send_bufs;
99
100 /** I2C bit-bashing interface */
101 struct i2c_bit_basher i2c;
102 /** I2C serial EEPROM */
103 struct i2c_device eeprom;
104 };
105
106 /***************************************************************************
107 *
108 * Linda register access
109 *
110 ***************************************************************************
111 *
112 * This card requires atomic 64-bit accesses. Strange things happen
113 * if you try to use 32-bit accesses; sometimes they work, sometimes
114 * they don't, sometimes you get random data.
115 *
116 * These accessors use the "movq" MMX instruction, and so won't work
117 * on really old Pentiums (which won't have PCIe anyway, so this is
118 * something of a moot point).
119 */
120
121 /**
122 * Read Linda qword register
123 *
124 * @v linda Linda device
125 * @v dwords Register buffer to read into
126 * @v offset Register offset
127 */
128 static void linda_readq ( struct linda *linda, uint32_t *dwords,
129 unsigned long offset ) {
130 void *addr = ( linda->regs + offset );
131
132 __asm__ __volatile__ ( "movq (%1), %%mm0\n\t"
133 "movq %%mm0, (%0)\n\t"
134 : : "r" ( dwords ), "r" ( addr ) : "memory" );
135
136 DBGIO ( "[%08lx] => %08x%08x\n",
137 virt_to_phys ( addr ), dwords[1], dwords[0] );
138 }
139 #define linda_readq( _linda, _ptr, _offset ) \
140 linda_readq ( (_linda), (_ptr)->u.dwords, (_offset) )
141 #define linda_readq_array8b( _linda, _ptr, _offset, _idx ) \
142 linda_readq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 8 ) ) )
143 #define linda_readq_array64k( _linda, _ptr, _offset, _idx ) \
144 linda_readq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 65536 ) ) )
145
146 /**
147 * Write Linda qword register
148 *
149 * @v linda Linda device
150 * @v dwords Register buffer to write
151 * @v offset Register offset
152 */
153 static void linda_writeq ( struct linda *linda, const uint32_t *dwords,
154 unsigned long offset ) {
155 void *addr = ( linda->regs + offset );
156
157 DBGIO ( "[%08lx] <= %08x%08x\n",
158 virt_to_phys ( addr ), dwords[1], dwords[0] );
159
160 __asm__ __volatile__ ( "movq (%0), %%mm0\n\t"
161 "movq %%mm0, (%1)\n\t"
162 : : "r" ( dwords ), "r" ( addr ) : "memory" );
163 }
164 #define linda_writeq( _linda, _ptr, _offset ) \
165 linda_writeq ( (_linda), (_ptr)->u.dwords, (_offset) )
166 #define linda_writeq_array8b( _linda, _ptr, _offset, _idx ) \
167 linda_writeq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 8 ) ) )
168 #define linda_writeq_array64k( _linda, _ptr, _offset, _idx ) \
169 linda_writeq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 65536 ) ) )
170
171 /**
172 * Write Linda dword register
173 *
174 * @v linda Linda device
175 * @v dword Value to write
176 * @v offset Register offset
177 */
178 static void linda_writel ( struct linda *linda, uint32_t dword,
179 unsigned long offset ) {
180 writel ( dword, ( linda->regs + offset ) );
181 }
182
183 /***************************************************************************
184 *
185 * Link state management
186 *
187 ***************************************************************************
188 */
189
190 /**
191 * Textual representation of link state
192 *
193 * @v link_state Link state
194 * @ret link_text Link state text
195 */
196 static const char * linda_link_state_text ( unsigned int link_state ) {
197 switch ( link_state ) {
198 case LINDA_LINK_STATE_DOWN: return "DOWN";
199 case LINDA_LINK_STATE_INIT: return "INIT";
200 case LINDA_LINK_STATE_ARM: return "ARM";
201 case LINDA_LINK_STATE_ACTIVE: return "ACTIVE";
202 case LINDA_LINK_STATE_ACT_DEFER:return "ACT_DEFER";
203 default: return "UNKNOWN";
204 }
205 }
206
207 /**
208 * Handle link state change
209 *
210 * @v linda Linda device
211 */
212 static void linda_link_state_changed ( struct ib_device *ibdev ) {
213 struct linda *linda = ib_get_drvdata ( ibdev );
214 struct QIB_7220_IBCStatus ibcstatus;
215 struct QIB_7220_EXTCtrl extctrl;
216 unsigned int link_state;
217 unsigned int link_width;
218 unsigned int link_speed;
219
220 /* Read link state */
221 linda_readq ( linda, &ibcstatus, QIB_7220_IBCStatus_offset );
222 link_state = BIT_GET ( &ibcstatus, LinkState );
223 link_width = BIT_GET ( &ibcstatus, LinkWidthActive );
224 link_speed = BIT_GET ( &ibcstatus, LinkSpeedActive );
225 DBGC ( linda, "Linda %p link state %s (%s %s)\n", linda,
226 linda_link_state_text ( link_state ),
227 ( link_speed ? "DDR" : "SDR" ), ( link_width ? "x4" : "x1" ) );
228
229 /* Set LEDs according to link state */
230 linda_readq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
231 BIT_SET ( &extctrl, LEDPriPortGreenOn,
232 ( ( link_state >= LINDA_LINK_STATE_INIT ) ? 1 : 0 ) );
233 BIT_SET ( &extctrl, LEDPriPortYellowOn,
234 ( ( link_state >= LINDA_LINK_STATE_ACTIVE ) ? 1 : 0 ) );
235 linda_writeq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
236
237 /* Notify Infiniband core of link state change */
238 ibdev->port_state = ( link_state + 1 );
239 ibdev->link_width_active =
240 ( link_width ? IB_LINK_WIDTH_4X : IB_LINK_WIDTH_1X );
241 ibdev->link_speed_active =
242 ( link_speed ? IB_LINK_SPEED_DDR : IB_LINK_SPEED_SDR );
243 ib_link_state_changed ( ibdev );
244 }
245
246 /**
247 * Wait for link state change to take effect
248 *
249 * @v linda Linda device
250 * @v new_link_state Expected link state
251 * @ret rc Return status code
252 */
253 static int linda_link_state_check ( struct linda *linda,
254 unsigned int new_link_state ) {
255 struct QIB_7220_IBCStatus ibcstatus;
256 unsigned int link_state;
257 unsigned int i;
258
259 for ( i = 0 ; i < LINDA_LINK_STATE_MAX_WAIT_US ; i++ ) {
260 linda_readq ( linda, &ibcstatus, QIB_7220_IBCStatus_offset );
261 link_state = BIT_GET ( &ibcstatus, LinkState );
262 if ( link_state == new_link_state )
263 return 0;
264 udelay ( 1 );
265 }
266
267 DBGC ( linda, "Linda %p timed out waiting for link state %s\n",
268 linda, linda_link_state_text ( link_state ) );
269 return -ETIMEDOUT;
270 }
271
272 /**
273 * Set port information
274 *
275 * @v ibdev Infiniband device
276 * @v mad Set port information MAD
277 */
278 static int linda_set_port_info ( struct ib_device *ibdev, union ib_mad *mad ) {
279 struct linda *linda = ib_get_drvdata ( ibdev );
280 struct ib_port_info *port_info = &mad->smp.smp_data.port_info;
281 struct QIB_7220_IBCCtrl ibcctrl;
282 unsigned int port_state;
283 unsigned int link_state;
284
285 /* Set new link state */
286 port_state = ( port_info->link_speed_supported__port_state & 0xf );
287 if ( port_state ) {
288 link_state = ( port_state - 1 );
289 DBGC ( linda, "Linda %p set link state to %s (%x)\n", linda,
290 linda_link_state_text ( link_state ), link_state );
291 linda_readq ( linda, &ibcctrl, QIB_7220_IBCCtrl_offset );
292 BIT_SET ( &ibcctrl, LinkCmd, link_state );
293 linda_writeq ( linda, &ibcctrl, QIB_7220_IBCCtrl_offset );
294
295 /* Wait for link state change to take effect. Ignore
296 * errors; the current link state will be returned via
297 * the GetResponse MAD.
298 */
299 linda_link_state_check ( linda, link_state );
300 }
301
302 /* Detect and report link state change */
303 linda_link_state_changed ( ibdev );
304
305 return 0;
306 }
307
308 /**
309 * Set partition key table
310 *
311 * @v ibdev Infiniband device
312 * @v mad Set partition key table MAD
313 */
314 static int linda_set_pkey_table ( struct ib_device *ibdev __unused,
315 union ib_mad *mad __unused ) {
316 /* Nothing to do */
317 return 0;
318 }
319
320 /***************************************************************************
321 *
322 * Context allocation
323 *
324 ***************************************************************************
325 */
326
327 /**
328 * Map context number to QPN
329 *
330 * @v ctx Context index
331 * @ret qpn Queue pair number
332 */
333 static int linda_ctx_to_qpn ( unsigned int ctx ) {
334 /* This mapping is fixed by hardware */
335 return ( ctx * 2 );
336 }
337
338 /**
339 * Map QPN to context number
340 *
341 * @v qpn Queue pair number
342 * @ret ctx Context index
343 */
344 static int linda_qpn_to_ctx ( unsigned int qpn ) {
345 /* This mapping is fixed by hardware */
346 return ( qpn / 2 );
347 }
348
349 /**
350 * Allocate a context
351 *
352 * @v linda Linda device
353 * @ret ctx Context index, or negative error
354 */
355 static int linda_alloc_ctx ( struct linda *linda ) {
356 unsigned int ctx;
357
358 for ( ctx = 0 ; ctx < LINDA_NUM_CONTEXTS ; ctx++ ) {
359
360 if ( ! linda->used_ctx[ctx] ) {
361 linda->used_ctx[ctx ] = 1;
362 DBGC2 ( linda, "Linda %p CTX %d allocated\n",
363 linda, ctx );
364 return ctx;
365 }
366 }
367
368 DBGC ( linda, "Linda %p out of available contexts\n", linda );
369 return -ENOENT;
370 }
371
372 /**
373 * Free a context
374 *
375 * @v linda Linda device
376 * @v ctx Context index
377 */
378 static void linda_free_ctx ( struct linda *linda, unsigned int ctx ) {
379
380 linda->used_ctx[ctx] = 0;
381 DBGC2 ( linda, "Linda %p CTX %d freed\n", linda, ctx );
382 }
383
384 /***************************************************************************
385 *
386 * Send datapath
387 *
388 ***************************************************************************
389 */
390
391 /** Send buffer toggle bit
392 *
393 * We encode send buffers as 7 bits of send buffer index plus a single
394 * bit which should match the "check" bit in the SendBufAvail array.
395 */
396 #define LINDA_SEND_BUF_TOGGLE 0x80
397
398 /**
399 * Allocate a send buffer
400 *
401 * @v linda Linda device
402 * @ret send_buf Send buffer
403 *
404 * You must guarantee that a send buffer is available. This is done
405 * by refusing to allocate more TX WQEs in total than the number of
406 * available send buffers.
407 */
408 static unsigned int linda_alloc_send_buf ( struct linda *linda ) {
409 unsigned int send_buf;
410
411 send_buf = linda->send_buf[linda->send_buf_cons];
412 send_buf ^= LINDA_SEND_BUF_TOGGLE;
413 linda->send_buf_cons = ( ( linda->send_buf_cons + 1 ) %
414 LINDA_MAX_SEND_BUFS );
415 return send_buf;
416 }
417
418 /**
419 * Free a send buffer
420 *
421 * @v linda Linda device
422 * @v send_buf Send buffer
423 */
424 static void linda_free_send_buf ( struct linda *linda,
425 unsigned int send_buf ) {
426 linda->send_buf[linda->send_buf_prod] = send_buf;
427 linda->send_buf_prod = ( ( linda->send_buf_prod + 1 ) %
428 LINDA_MAX_SEND_BUFS );
429 }
430
431 /**
432 * Check to see if send buffer is in use
433 *
434 * @v linda Linda device
435 * @v send_buf Send buffer
436 * @ret in_use Send buffer is in use
437 */
438 static int linda_send_buf_in_use ( struct linda *linda,
439 unsigned int send_buf ) {
440 unsigned int send_idx;
441 unsigned int send_check;
442 unsigned int inusecheck;
443 unsigned int inuse;
444 unsigned int check;
445
446 send_idx = ( send_buf & ~LINDA_SEND_BUF_TOGGLE );
447 send_check = ( !! ( send_buf & LINDA_SEND_BUF_TOGGLE ) );
448 inusecheck = BIT_GET ( linda->sendbufavail, InUseCheck[send_idx] );
449 inuse = ( !! ( inusecheck & 0x02 ) );
450 check = ( !! ( inusecheck & 0x01 ) );
451 return ( inuse || ( check != send_check ) );
452 }
453
454 /**
455 * Calculate starting offset for send buffer
456 *
457 * @v linda Linda device
458 * @v send_buf Send buffer
459 * @ret offset Starting offset
460 */
461 static unsigned long linda_send_buffer_offset ( struct linda *linda,
462 unsigned int send_buf ) {
463 return ( linda->send_buffer_base +
464 ( ( send_buf & ~LINDA_SEND_BUF_TOGGLE ) *
465 LINDA_SEND_BUF_SIZE ) );
466 }
467
468 /**
469 * Create send work queue
470 *
471 * @v linda Linda device
472 * @v qp Queue pair
473 */
474 static int linda_create_send_wq ( struct linda *linda,
475 struct ib_queue_pair *qp ) {
476 struct ib_work_queue *wq = &qp->send;
477 struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
478 int rc;
479
480 /* Reserve send buffers */
481 if ( ( linda->reserved_send_bufs + qp->send.num_wqes ) >
482 LINDA_MAX_SEND_BUFS ) {
483 DBGC ( linda, "Linda %p out of send buffers (have %d, used "
484 "%d, need %d)\n", linda, LINDA_MAX_SEND_BUFS,
485 linda->reserved_send_bufs, qp->send.num_wqes );
486 rc = -ENOBUFS;
487 goto err_reserve_bufs;
488 }
489 linda->reserved_send_bufs += qp->send.num_wqes;
490
491 /* Reset work queue */
492 linda_wq->prod = 0;
493 linda_wq->cons = 0;
494
495 /* Allocate space for send buffer uasge list */
496 linda_wq->send_buf = zalloc ( qp->send.num_wqes *
497 sizeof ( linda_wq->send_buf[0] ) );
498 if ( ! linda_wq->send_buf ) {
499 rc = -ENOBUFS;
500 goto err_alloc_send_buf;
501 }
502
503 return 0;
504
505 free ( linda_wq->send_buf );
506 err_alloc_send_buf:
507 linda->reserved_send_bufs -= qp->send.num_wqes;
508 err_reserve_bufs:
509 return rc;
510 }
511
512 /**
513 * Destroy send work queue
514 *
515 * @v linda Linda device
516 * @v qp Queue pair
517 */
518 static void linda_destroy_send_wq ( struct linda *linda,
519 struct ib_queue_pair *qp ) {
520 struct ib_work_queue *wq = &qp->send;
521 struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
522
523 free ( linda_wq->send_buf );
524 linda->reserved_send_bufs -= qp->send.num_wqes;
525 }
526
527 /**
528 * Initialise send datapath
529 *
530 * @v linda Linda device
531 * @ret rc Return status code
532 */
533 static int linda_init_send ( struct linda *linda ) {
534 struct QIB_7220_SendBufBase sendbufbase;
535 struct QIB_7220_SendBufAvailAddr sendbufavailaddr;
536 struct QIB_7220_SendCtrl sendctrl;
537 unsigned int i;
538 int rc;
539
540 /* Retrieve SendBufBase */
541 linda_readq ( linda, &sendbufbase, QIB_7220_SendBufBase_offset );
542 linda->send_buffer_base = BIT_GET ( &sendbufbase,
543 BaseAddr_SmallPIO );
544 DBGC ( linda, "Linda %p send buffers at %lx\n",
545 linda, linda->send_buffer_base );
546
547 /* Initialise the send_buf[] array */
548 for ( i = 0 ; i < LINDA_MAX_SEND_BUFS ; i++ )
549 linda->send_buf[i] = i;
550
551 /* Allocate space for the SendBufAvail array */
552 linda->sendbufavail = malloc_dma ( sizeof ( *linda->sendbufavail ),
553 LINDA_SENDBUFAVAIL_ALIGN );
554 if ( ! linda->sendbufavail ) {
555 rc = -ENOMEM;
556 goto err_alloc_sendbufavail;
557 }
558 memset ( linda->sendbufavail, 0, sizeof ( linda->sendbufavail ) );
559
560 /* Program SendBufAvailAddr into the hardware */
561 memset ( &sendbufavailaddr, 0, sizeof ( sendbufavailaddr ) );
562 BIT_FILL_1 ( &sendbufavailaddr, SendBufAvailAddr,
563 ( virt_to_bus ( linda->sendbufavail ) >> 6 ) );
564 linda_writeq ( linda, &sendbufavailaddr,
565 QIB_7220_SendBufAvailAddr_offset );
566
567 /* Enable sending and DMA of SendBufAvail */
568 memset ( &sendctrl, 0, sizeof ( sendctrl ) );
569 BIT_FILL_2 ( &sendctrl,
570 SendBufAvailUpd, 1,
571 SPioEnable, 1 );
572 linda_writeq ( linda, &sendctrl, QIB_7220_SendCtrl_offset );
573
574 return 0;
575
576 free_dma ( linda->sendbufavail, sizeof ( *linda->sendbufavail ) );
577 err_alloc_sendbufavail:
578 return rc;
579 }
580
581 /**
582 * Shut down send datapath
583 *
584 * @v linda Linda device
585 */
586 static void linda_fini_send ( struct linda *linda ) {
587 struct QIB_7220_SendCtrl sendctrl;
588
589 /* Disable sending and DMA of SendBufAvail */
590 memset ( &sendctrl, 0, sizeof ( sendctrl ) );
591 linda_writeq ( linda, &sendctrl, QIB_7220_SendCtrl_offset );
592 mb();
593
594 /* Ensure hardware has seen this disable */
595 linda_readq ( linda, &sendctrl, QIB_7220_SendCtrl_offset );
596
597 free_dma ( linda->sendbufavail, sizeof ( *linda->sendbufavail ) );
598 }
599
600 /***************************************************************************
601 *
602 * Receive datapath
603 *
604 ***************************************************************************
605 */
606
607 /**
608 * Create receive work queue
609 *
610 * @v linda Linda device
611 * @v qp Queue pair
612 * @ret rc Return status code
613 */
614 static int linda_create_recv_wq ( struct linda *linda,
615 struct ib_queue_pair *qp ) {
616 struct ib_work_queue *wq = &qp->recv;
617 struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
618 struct QIB_7220_RcvHdrAddr0 rcvhdraddr;
619 struct QIB_7220_RcvHdrTailAddr0 rcvhdrtailaddr;
620 struct QIB_7220_RcvHdrHead0 rcvhdrhead;
621 struct QIB_7220_scalar rcvegrindexhead;
622 struct QIB_7220_RcvCtrl rcvctrl;
623 unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
624 int rc;
625
626 /* Reset context information */
627 memset ( &linda_wq->header_prod, 0,
628 sizeof ( linda_wq->header_prod ) );
629 linda_wq->header_cons = 0;
630 linda_wq->eager_prod = 0;
631 linda_wq->eager_cons = 0;
632
633 /* Allocate receive header buffer */
634 linda_wq->header = malloc_dma ( LINDA_RECV_HEADERS_SIZE,
635 LINDA_RECV_HEADERS_ALIGN );
636 if ( ! linda_wq->header ) {
637 rc = -ENOMEM;
638 goto err_alloc_header;
639 }
640
641 /* Enable context in hardware */
642 memset ( &rcvhdraddr, 0, sizeof ( rcvhdraddr ) );
643 BIT_FILL_1 ( &rcvhdraddr, RcvHdrAddr0,
644 ( virt_to_bus ( linda_wq->header ) >> 2 ) );
645 linda_writeq_array8b ( linda, &rcvhdraddr,
646 QIB_7220_RcvHdrAddr0_offset, ctx );
647 memset ( &rcvhdrtailaddr, 0, sizeof ( rcvhdrtailaddr ) );
648 BIT_FILL_1 ( &rcvhdrtailaddr, RcvHdrTailAddr0,
649 ( virt_to_bus ( &linda_wq->header_prod ) >> 2 ) );
650 linda_writeq_array8b ( linda, &rcvhdrtailaddr,
651 QIB_7220_RcvHdrTailAddr0_offset, ctx );
652 memset ( &rcvhdrhead, 0, sizeof ( rcvhdrhead ) );
653 BIT_FILL_1 ( &rcvhdrhead, counter, 1 );
654 linda_writeq_array64k ( linda, &rcvhdrhead,
655 QIB_7220_RcvHdrHead0_offset, ctx );
656 memset ( &rcvegrindexhead, 0, sizeof ( rcvegrindexhead ) );
657 BIT_FILL_1 ( &rcvegrindexhead, Value, 1 );
658 linda_writeq_array64k ( linda, &rcvegrindexhead,
659 QIB_7220_RcvEgrIndexHead0_offset, ctx );
660 linda_readq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
661 BIT_SET ( &rcvctrl, PortEnable[ctx], 1 );
662 BIT_SET ( &rcvctrl, IntrAvail[ctx], 1 );
663 linda_writeq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
664
665 DBGC ( linda, "Linda %p QPN %ld CTX %d hdrs [%lx,%lx) prod %lx\n",
666 linda, qp->qpn, ctx, virt_to_bus ( linda_wq->header ),
667 ( virt_to_bus ( linda_wq->header ) + LINDA_RECV_HEADERS_SIZE ),
668 virt_to_bus ( &linda_wq->header_prod ) );
669 return 0;
670
671 free_dma ( linda_wq->header, LINDA_RECV_HEADERS_SIZE );
672 err_alloc_header:
673 return rc;
674 }
675
676 /**
677 * Destroy receive work queue
678 *
679 * @v linda Linda device
680 * @v qp Queue pair
681 */
682 static void linda_destroy_recv_wq ( struct linda *linda,
683 struct ib_queue_pair *qp ) {
684 struct ib_work_queue *wq = &qp->recv;
685 struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
686 struct QIB_7220_RcvCtrl rcvctrl;
687 unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
688
689 /* Disable context in hardware */
690 linda_readq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
691 BIT_SET ( &rcvctrl, PortEnable[ctx], 0 );
692 BIT_SET ( &rcvctrl, IntrAvail[ctx], 0 );
693 linda_writeq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
694
695 /* Make sure the hardware has seen that the context is disabled */
696 linda_readq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
697 mb();
698
699 /* Free headers ring */
700 free_dma ( linda_wq->header, LINDA_RECV_HEADERS_SIZE );
701
702 /* Free context */
703 linda_free_ctx ( linda, ctx );
704 }
705
706 /**
707 * Initialise receive datapath
708 *
709 * @v linda Linda device
710 * @ret rc Return status code
711 */
712 static int linda_init_recv ( struct linda *linda ) {
713 struct QIB_7220_RcvCtrl rcvctrl;
714 struct QIB_7220_scalar rcvegrbase;
715 struct QIB_7220_scalar rcvhdrentsize;
716 struct QIB_7220_scalar rcvhdrcnt;
717 struct QIB_7220_RcvBTHQP rcvbthqp;
718 unsigned int portcfg;
719 unsigned long egrbase;
720 unsigned int eager_array_size_0;
721 unsigned int eager_array_size_other;
722 unsigned int ctx;
723
724 /* Select configuration based on number of contexts */
725 switch ( LINDA_NUM_CONTEXTS ) {
726 case 5:
727 portcfg = LINDA_PORTCFG_5CTX;
728 eager_array_size_0 = LINDA_EAGER_ARRAY_SIZE_5CTX_0;
729 eager_array_size_other = LINDA_EAGER_ARRAY_SIZE_5CTX_OTHER;
730 break;
731 case 9:
732 portcfg = LINDA_PORTCFG_9CTX;
733 eager_array_size_0 = LINDA_EAGER_ARRAY_SIZE_9CTX_0;
734 eager_array_size_other = LINDA_EAGER_ARRAY_SIZE_9CTX_OTHER;
735 break;
736 case 17:
737 portcfg = LINDA_PORTCFG_17CTX;
738 eager_array_size_0 = LINDA_EAGER_ARRAY_SIZE_17CTX_0;
739 eager_array_size_other = LINDA_EAGER_ARRAY_SIZE_17CTX_OTHER;
740 break;
741 default:
742 linker_assert ( 0, invalid_LINDA_NUM_CONTEXTS );
743 return -EINVAL;
744 }
745
746 /* Configure number of contexts */
747 memset ( &rcvctrl, 0, sizeof ( rcvctrl ) );
748 BIT_FILL_3 ( &rcvctrl,
749 TailUpd, 1,
750 PortCfg, portcfg,
751 RcvQPMapEnable, 1 );
752 linda_writeq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
753
754 /* Configure receive header buffer sizes */
755 memset ( &rcvhdrcnt, 0, sizeof ( rcvhdrcnt ) );
756 BIT_FILL_1 ( &rcvhdrcnt, Value, LINDA_RECV_HEADER_COUNT );
757 linda_writeq ( linda, &rcvhdrcnt, QIB_7220_RcvHdrCnt_offset );
758 memset ( &rcvhdrentsize, 0, sizeof ( rcvhdrentsize ) );
759 BIT_FILL_1 ( &rcvhdrentsize, Value, ( LINDA_RECV_HEADER_SIZE >> 2 ) );
760 linda_writeq ( linda, &rcvhdrentsize, QIB_7220_RcvHdrEntSize_offset );
761
762 /* Calculate eager array start addresses for each context */
763 linda_readq ( linda, &rcvegrbase, QIB_7220_RcvEgrBase_offset );
764 egrbase = BIT_GET ( &rcvegrbase, Value );
765 linda->recv_wq[0].eager_array = egrbase;
766 linda->recv_wq[0].eager_entries = eager_array_size_0;
767 egrbase += ( eager_array_size_0 * sizeof ( struct QIB_7220_RcvEgr ) );
768 for ( ctx = 1 ; ctx < LINDA_NUM_CONTEXTS ; ctx++ ) {
769 linda->recv_wq[ctx].eager_array = egrbase;
770 linda->recv_wq[ctx].eager_entries = eager_array_size_other;
771 egrbase += ( eager_array_size_other *
772 sizeof ( struct QIB_7220_RcvEgr ) );
773 }
774 for ( ctx = 0 ; ctx < LINDA_NUM_CONTEXTS ; ctx++ ) {
775 DBGC ( linda, "Linda %p CTX %d eager array at %lx (%d "
776 "entries)\n", linda, ctx,
777 linda->recv_wq[ctx].eager_array,
778 linda->recv_wq[ctx].eager_entries );
779 }
780
781 /* Set the BTH QP for Infinipath packets to an unused value */
782 memset ( &rcvbthqp, 0, sizeof ( rcvbthqp ) );
783 BIT_FILL_1 ( &rcvbthqp, RcvBTHQP, LINDA_QP_IDETH );
784 linda_writeq ( linda, &rcvbthqp, QIB_7220_RcvBTHQP_offset );
785
786 return 0;
787 }
788
789 /**
790 * Shut down receive datapath
791 *
792 * @v linda Linda device
793 */
794 static void linda_fini_recv ( struct linda *linda __unused ) {
795 /* Nothing to do; all contexts were already disabled when the
796 * queue pairs were destroyed
797 */
798 }
799
800 /***************************************************************************
801 *
802 * Completion queue operations
803 *
804 ***************************************************************************
805 */
806
807 /**
808 * Create completion queue
809 *
810 * @v ibdev Infiniband device
811 * @v cq Completion queue
812 * @ret rc Return status code
813 */
814 static int linda_create_cq ( struct ib_device *ibdev,
815 struct ib_completion_queue *cq ) {
816 struct linda *linda = ib_get_drvdata ( ibdev );
817 static int cqn;
818
819 /* The hardware has no concept of completion queues. We
820 * simply use the association between CQs and WQs (already
821 * handled by the IB core) to decide which WQs to poll.
822 *
823 * We do set a CQN, just to avoid confusing debug messages
824 * from the IB core.
825 */
826 cq->cqn = ++cqn;
827 DBGC ( linda, "Linda %p CQN %ld created\n", linda, cq->cqn );
828
829 return 0;
830 }
831
832 /**
833 * Destroy completion queue
834 *
835 * @v ibdev Infiniband device
836 * @v cq Completion queue
837 */
838 static void linda_destroy_cq ( struct ib_device *ibdev,
839 struct ib_completion_queue *cq ) {
840 struct linda *linda = ib_get_drvdata ( ibdev );
841
842 /* Nothing to do */
843 DBGC ( linda, "Linda %p CQN %ld destroyed\n", linda, cq->cqn );
844 }
845
846 /***************************************************************************
847 *
848 * Queue pair operations
849 *
850 ***************************************************************************
851 */
852
853 /**
854 * Create queue pair
855 *
856 * @v ibdev Infiniband device
857 * @v qp Queue pair
858 * @ret rc Return status code
859 */
860 static int linda_create_qp ( struct ib_device *ibdev,
861 struct ib_queue_pair *qp ) {
862 struct linda *linda = ib_get_drvdata ( ibdev );
863 int ctx;
864 int rc;
865
866 /* Locate an available context */
867 ctx = linda_alloc_ctx ( linda );
868 if ( ctx < 0 ) {
869 rc = ctx;
870 goto err_alloc_ctx;
871 }
872
873 /* Set queue pair number based on context index */
874 qp->qpn = linda_ctx_to_qpn ( ctx );
875
876 /* Set work-queue private data pointers */
877 ib_wq_set_drvdata ( &qp->send, &linda->send_wq[ctx] );
878 ib_wq_set_drvdata ( &qp->recv, &linda->recv_wq[ctx] );
879
880 /* Create receive work queue */
881 if ( ( rc = linda_create_recv_wq ( linda, qp ) ) != 0 )
882 goto err_create_recv_wq;
883
884 /* Create send work queue */
885 if ( ( rc = linda_create_send_wq ( linda, qp ) ) != 0 )
886 goto err_create_send_wq;
887
888 return 0;
889
890 linda_destroy_send_wq ( linda, qp );
891 err_create_send_wq:
892 linda_destroy_recv_wq ( linda, qp );
893 err_create_recv_wq:
894 linda_free_ctx ( linda, ctx );
895 err_alloc_ctx:
896 return rc;
897 }
898
899 /**
900 * Modify queue pair
901 *
902 * @v ibdev Infiniband device
903 * @v qp Queue pair
904 * @ret rc Return status code
905 */
906 static int linda_modify_qp ( struct ib_device *ibdev,
907 struct ib_queue_pair *qp ) {
908 struct linda *linda = ib_get_drvdata ( ibdev );
909
910 /* Nothing to do; the hardware doesn't have a notion of queue
911 * keys
912 */
913 DBGC ( linda, "Linda %p QPN %ld modified\n", linda, qp->qpn );
914 return 0;
915 }
916
917 /**
918 * Destroy queue pair
919 *
920 * @v ibdev Infiniband device
921 * @v qp Queue pair
922 */
923 static void linda_destroy_qp ( struct ib_device *ibdev,
924 struct ib_queue_pair *qp ) {
925 struct linda *linda = ib_get_drvdata ( ibdev );
926
927 linda_destroy_send_wq ( linda, qp );
928 linda_destroy_recv_wq ( linda, qp );
929 }
930
931 /***************************************************************************
932 *
933 * Work request operations
934 *
935 ***************************************************************************
936 */
937
938 /**
939 * Post send work queue entry
940 *
941 * @v ibdev Infiniband device
942 * @v qp Queue pair
943 * @v dest Destination address vector
944 * @v iobuf I/O buffer
945 * @ret rc Return status code
946 */
947 static int linda_post_send ( struct ib_device *ibdev,
948 struct ib_queue_pair *qp,
949 struct ib_address_vector *dest,
950 struct io_buffer *iobuf ) {
951 struct linda *linda = ib_get_drvdata ( ibdev );
952 struct ib_work_queue *wq = &qp->send;
953 struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
954 struct QIB_7220_SendPbc sendpbc;
955 uint8_t header_buf[IB_MAX_HEADER_SIZE];
956 struct io_buffer headers;
957 unsigned int send_buf;
958 unsigned long start_offset;
959 unsigned long offset;
960 size_t len;
961 ssize_t frag_len;
962 uint32_t *data;
963
964 /* Allocate send buffer and calculate offset */
965 send_buf = linda_alloc_send_buf ( linda );
966 start_offset = offset = linda_send_buffer_offset ( linda, send_buf );
967
968 /* Store I/O buffer and send buffer index */
969 assert ( wq->iobufs[linda_wq->prod] == NULL );
970 wq->iobufs[linda_wq->prod] = iobuf;
971 linda_wq->send_buf[linda_wq->prod] = send_buf;
972
973 /* Construct headers */
974 iob_populate ( &headers, header_buf, 0, sizeof ( header_buf ) );
975 iob_reserve ( &headers, sizeof ( header_buf ) );
976 ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), dest );
977
978 /* Calculate packet length */
979 len = ( ( sizeof ( sendpbc ) + iob_len ( &headers ) +
980 iob_len ( iobuf ) + 3 ) & ~3 );
981
982 /* Construct send per-buffer control word */
983 memset ( &sendpbc, 0, sizeof ( sendpbc ) );
984 BIT_FILL_2 ( &sendpbc,
985 LengthP1_toibc, ( ( len >> 2 ) - 1 ),
986 VL15, 1 );
987
988 /* Write SendPbc */
989 DBG_DISABLE ( DBGLVL_IO );
990 linda_writeq ( linda, &sendpbc, offset );
991 offset += sizeof ( sendpbc );
992
993 /* Write headers */
994 for ( data = headers.data, frag_len = iob_len ( &headers ) ;
995 frag_len > 0 ; data++, offset += 4, frag_len -= 4 ) {
996 linda_writel ( linda, *data, offset );
997 }
998
999 /* Write data */
1000 for ( data = iobuf->data, frag_len = iob_len ( iobuf ) ;
1001 frag_len > 0 ; data++, offset += 4, frag_len -= 4 ) {
1002 linda_writel ( linda, *data, offset );
1003 }
1004 DBG_ENABLE ( DBGLVL_IO );
1005
1006 assert ( ( start_offset + len ) == offset );
1007 DBGC2 ( linda, "Linda %p QPN %ld TX %d(%d) posted [%lx,%lx)\n",
1008 linda, qp->qpn, send_buf, linda_wq->prod,
1009 start_offset, offset );
1010
1011 /* Increment producer counter */
1012 linda_wq->prod = ( ( linda_wq->prod + 1 ) & ( wq->num_wqes - 1 ) );
1013
1014 return 0;
1015 }
1016
1017 /**
1018 * Complete send work queue entry
1019 *
1020 * @v ibdev Infiniband device
1021 * @v qp Queue pair
1022 * @v wqe_idx Work queue entry index
1023 */
1024 static void linda_complete_send ( struct ib_device *ibdev,
1025 struct ib_queue_pair *qp,
1026 unsigned int wqe_idx ) {
1027 struct linda *linda = ib_get_drvdata ( ibdev );
1028 struct ib_work_queue *wq = &qp->send;
1029 struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
1030 struct io_buffer *iobuf;
1031 unsigned int send_buf;
1032
1033 /* Parse completion */
1034 send_buf = linda_wq->send_buf[wqe_idx];
1035 DBGC2 ( linda, "Linda %p QPN %ld TX %d(%d) complete\n",
1036 linda, qp->qpn, send_buf, wqe_idx );
1037
1038 /* Complete work queue entry */
1039 iobuf = wq->iobufs[wqe_idx];
1040 assert ( iobuf != NULL );
1041 ib_complete_send ( ibdev, qp, iobuf, 0 );
1042 wq->iobufs[wqe_idx] = NULL;
1043
1044 /* Free send buffer */
1045 linda_free_send_buf ( linda, send_buf );
1046 }
1047
1048 /**
1049 * Poll send work queue
1050 *
1051 * @v ibdev Infiniband device
1052 * @v qp Queue pair
1053 */
1054 static void linda_poll_send_wq ( struct ib_device *ibdev,
1055 struct ib_queue_pair *qp ) {
1056 struct linda *linda = ib_get_drvdata ( ibdev );
1057 struct ib_work_queue *wq = &qp->send;
1058 struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
1059 unsigned int send_buf;
1060
1061 /* Look for completions */
1062 while ( wq->fill ) {
1063
1064 /* Check to see if send buffer has completed */
1065 send_buf = linda_wq->send_buf[linda_wq->cons];
1066 if ( linda_send_buf_in_use ( linda, send_buf ) )
1067 break;
1068
1069 /* Complete this buffer */
1070 linda_complete_send ( ibdev, qp, linda_wq->cons );
1071
1072 /* Increment consumer counter */
1073 linda_wq->cons = ( ( linda_wq->cons + 1 ) &
1074 ( wq->num_wqes - 1 ) );
1075 }
1076 }
1077
1078 /**
1079 * Post receive work queue entry
1080 *
1081 * @v ibdev Infiniband device
1082 * @v qp Queue pair
1083 * @v iobuf I/O buffer
1084 * @ret rc Return status code
1085 */
1086 static int linda_post_recv ( struct ib_device *ibdev,
1087 struct ib_queue_pair *qp,
1088 struct io_buffer *iobuf ) {
1089 struct linda *linda = ib_get_drvdata ( ibdev );
1090 struct ib_work_queue *wq = &qp->recv;
1091 struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
1092 struct QIB_7220_RcvEgr rcvegr;
1093 struct QIB_7220_scalar rcvegrindexhead;
1094 unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
1095 physaddr_t addr;
1096 size_t len;
1097 unsigned int wqe_idx;
1098 unsigned int bufsize;
1099
1100 /* Sanity checks */
1101 addr = virt_to_bus ( iobuf->data );
1102 len = iob_tailroom ( iobuf );
1103 if ( addr & ( LINDA_EAGER_BUFFER_ALIGN - 1 ) ) {
1104 DBGC ( linda, "Linda %p QPN %ld misaligned RX buffer "
1105 "(%08lx)\n", linda, qp->qpn, addr );
1106 return -EINVAL;
1107 }
1108 if ( len != LINDA_RECV_PAYLOAD_SIZE ) {
1109 DBGC ( linda, "Linda %p QPN %ld wrong RX buffer size (%zd)\n",
1110 linda, qp->qpn, len );
1111 return -EINVAL;
1112 }
1113
1114 /* Calculate eager producer index and WQE index */
1115 wqe_idx = ( linda_wq->eager_prod & ( wq->num_wqes - 1 ) );
1116 assert ( wq->iobufs[wqe_idx] == NULL );
1117
1118 /* Store I/O buffer */
1119 wq->iobufs[wqe_idx] = iobuf;
1120
1121 /* Calculate buffer size */
1122 switch ( LINDA_RECV_PAYLOAD_SIZE ) {
1123 case 2048: bufsize = LINDA_EAGER_BUFFER_2K; break;
1124 case 4096: bufsize = LINDA_EAGER_BUFFER_4K; break;
1125 case 8192: bufsize = LINDA_EAGER_BUFFER_8K; break;
1126 case 16384: bufsize = LINDA_EAGER_BUFFER_16K; break;
1127 case 32768: bufsize = LINDA_EAGER_BUFFER_32K; break;
1128 case 65536: bufsize = LINDA_EAGER_BUFFER_64K; break;
1129 default: linker_assert ( 0, invalid_rx_payload_size );
1130 bufsize = LINDA_EAGER_BUFFER_NONE;
1131 }
1132
1133 /* Post eager buffer */
1134 memset ( &rcvegr, 0, sizeof ( rcvegr ) );
1135 BIT_FILL_2 ( &rcvegr,
1136 Addr, ( addr >> 11 ),
1137 BufSize, bufsize );
1138 linda_writeq_array8b ( linda, &rcvegr,
1139 linda_wq->eager_array, linda_wq->eager_prod );
1140 DBGC2 ( linda, "Linda %p QPN %ld RX egr %d(%d) posted [%lx,%lx)\n",
1141 linda, qp->qpn, linda_wq->eager_prod, wqe_idx,
1142 addr, ( addr + len ) );
1143
1144 /* Increment producer index */
1145 linda_wq->eager_prod = ( ( linda_wq->eager_prod + 1 ) &
1146 ( linda_wq->eager_entries - 1 ) );
1147
1148 /* Update head index */
1149 memset ( &rcvegrindexhead, 0, sizeof ( rcvegrindexhead ) );
1150 BIT_FILL_1 ( &rcvegrindexhead,
1151 Value, ( ( linda_wq->eager_prod + 1 ) &
1152 ( linda_wq->eager_entries - 1 ) ) );
1153 linda_writeq_array64k ( linda, &rcvegrindexhead,
1154 QIB_7220_RcvEgrIndexHead0_offset, ctx );
1155
1156 return 0;
1157 }
1158
1159 /**
1160 * Complete receive work queue entry
1161 *
1162 * @v ibdev Infiniband device
1163 * @v qp Queue pair
1164 * @v header_offs Header offset
1165 */
1166 static void linda_complete_recv ( struct ib_device *ibdev,
1167 struct ib_queue_pair *qp,
1168 unsigned int header_offs ) {
1169 struct linda *linda = ib_get_drvdata ( ibdev );
1170 struct ib_work_queue *wq = &qp->recv;
1171 struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
1172 struct QIB_7220_RcvHdrFlags *rcvhdrflags;
1173 struct QIB_7220_RcvEgr rcvegr;
1174 struct io_buffer headers;
1175 struct io_buffer *iobuf;
1176 struct ib_queue_pair *intended_qp;
1177 struct ib_address_vector dest;
1178 struct ib_address_vector source;
1179 unsigned int rcvtype;
1180 unsigned int pktlen;
1181 unsigned int egrindex;
1182 unsigned int useegrbfr;
1183 unsigned int iberr, mkerr, tiderr, khdrerr, mtuerr;
1184 unsigned int lenerr, parityerr, vcrcerr, icrcerr;
1185 unsigned int err;
1186 unsigned int hdrqoffset;
1187 unsigned int header_len;
1188 unsigned int padded_payload_len;
1189 unsigned int wqe_idx;
1190 size_t payload_len;
1191 int qp0;
1192 int rc;
1193
1194 /* RcvHdrFlags are at the end of the header entry */
1195 rcvhdrflags = ( linda_wq->header + header_offs +
1196 LINDA_RECV_HEADER_SIZE - sizeof ( *rcvhdrflags ) );
1197 rcvtype = BIT_GET ( rcvhdrflags, RcvType );
1198 pktlen = ( BIT_GET ( rcvhdrflags, PktLen ) << 2 );
1199 egrindex = BIT_GET ( rcvhdrflags, EgrIndex );
1200 useegrbfr = BIT_GET ( rcvhdrflags, UseEgrBfr );
1201 hdrqoffset = ( BIT_GET ( rcvhdrflags, HdrqOffset ) << 2 );
1202 iberr = BIT_GET ( rcvhdrflags, IBErr );
1203 mkerr = BIT_GET ( rcvhdrflags, MKErr );
1204 tiderr = BIT_GET ( rcvhdrflags, TIDErr );
1205 khdrerr = BIT_GET ( rcvhdrflags, KHdrErr );
1206 mtuerr = BIT_GET ( rcvhdrflags, MTUErr );
1207 lenerr = BIT_GET ( rcvhdrflags, LenErr );
1208 parityerr = BIT_GET ( rcvhdrflags, ParityErr );
1209 vcrcerr = BIT_GET ( rcvhdrflags, VCRCErr );
1210 icrcerr = BIT_GET ( rcvhdrflags, ICRCErr );
1211 header_len = ( LINDA_RECV_HEADER_SIZE - hdrqoffset -
1212 sizeof ( *rcvhdrflags ) );
1213 padded_payload_len = ( pktlen - header_len - 4 /* ICRC */ );
1214 err = ( iberr | mkerr | tiderr | khdrerr | mtuerr |
1215 lenerr | parityerr | vcrcerr | icrcerr );
1216 /* IB header is placed immediately before RcvHdrFlags */
1217 iob_populate ( &headers, ( ( ( void * ) rcvhdrflags ) - header_len ),
1218 header_len, header_len );
1219
1220 /* Dump diagnostic information */
1221 if ( err || ( ! useegrbfr ) ) {
1222 DBGC ( linda, "Linda %p QPN %ld RX egr %d%s hdr %d type %d "
1223 "len %d(%d+%d+4)%s%s%s%s%s%s%s%s%s%s%s\n", linda,
1224 qp->qpn, egrindex, ( useegrbfr ? "" : "(unused)" ),
1225 ( header_offs / LINDA_RECV_HEADER_SIZE ), rcvtype,
1226 pktlen, header_len, padded_payload_len,
1227 ( err ? " [Err" : "" ), ( iberr ? " IB" : "" ),
1228 ( mkerr ? " MK" : "" ), ( tiderr ? " TID" : "" ),
1229 ( khdrerr ? " KHdr" : "" ), ( mtuerr ? " MTU" : "" ),
1230 ( lenerr ? " Len" : "" ), ( parityerr ? " Parity" : ""),
1231 ( vcrcerr ? " VCRC" : "" ), ( icrcerr ? " ICRC" : "" ),
1232 ( err ? "]" : "" ) );
1233 } else {
1234 DBGC2 ( linda, "Linda %p QPN %ld RX egr %d hdr %d type %d "
1235 "len %d(%d+%d+4)\n", linda, qp->qpn, egrindex,
1236 ( header_offs / LINDA_RECV_HEADER_SIZE ), rcvtype,
1237 pktlen, header_len, padded_payload_len );
1238 }
1239 DBGCP_HDA ( linda, hdrqoffset, headers.data,
1240 ( header_len + sizeof ( *rcvhdrflags ) ) );
1241
1242 /* Parse header to generate address vector */
1243 qp0 = ( qp->qpn == 0 );
1244 intended_qp = NULL;
1245 if ( ( rc = ib_pull ( ibdev, &headers, ( qp0 ? &intended_qp : NULL ),
1246 &payload_len, &dest, &source ) ) != 0 ) {
1247 DBGC ( linda, "Linda %p could not parse headers: %s\n",
1248 linda, strerror ( rc ) );
1249 err = 1;
1250 }
1251 if ( ! intended_qp )
1252 intended_qp = qp;
1253
1254 /* Complete this buffer and any skipped buffers. Note that
1255 * when the hardware runs out of buffers, it will repeatedly
1256 * report the same buffer (the tail) as a TID error, and that
1257 * it also has a habit of sometimes skipping over several
1258 * buffers at once.
1259 */
1260 while ( 1 ) {
1261
1262 /* If we have caught up to the producer counter, stop.
1263 * This will happen when the hardware first runs out
1264 * of buffers and starts reporting TID errors against
1265 * the eager buffer it wants to use next.
1266 */
1267 if ( linda_wq->eager_cons == linda_wq->eager_prod )
1268 break;
1269
1270 /* If we have caught up to where we should be after
1271 * completing this egrindex, stop. We phrase the test
1272 * this way to avoid completing the entire ring when
1273 * we receive the same egrindex twice in a row.
1274 */
1275 if ( ( linda_wq->eager_cons ==
1276 ( ( egrindex + 1 ) & ( linda_wq->eager_entries - 1 ) )))
1277 break;
1278
1279 /* Identify work queue entry and corresponding I/O
1280 * buffer.
1281 */
1282 wqe_idx = ( linda_wq->eager_cons & ( wq->num_wqes - 1 ) );
1283 iobuf = wq->iobufs[wqe_idx];
1284 assert ( iobuf != NULL );
1285 wq->iobufs[wqe_idx] = NULL;
1286
1287 /* Complete the eager buffer */
1288 if ( linda_wq->eager_cons == egrindex ) {
1289 /* Completing the eager buffer described in
1290 * this header entry.
1291 */
1292 iob_put ( iobuf, payload_len );
1293 rc = ( err ? -EIO : ( useegrbfr ? 0 : -ECANCELED ) );
1294 /* Redirect to target QP if necessary */
1295 if ( qp != intended_qp ) {
1296 DBGC ( linda, "Linda %p redirecting QPN %ld "
1297 "=> %ld\n",
1298 linda, qp->qpn, intended_qp->qpn );
1299 /* Compensate for incorrect fill levels */
1300 qp->recv.fill--;
1301 intended_qp->recv.fill++;
1302 }
1303 ib_complete_recv ( ibdev, intended_qp, &dest, &source,
1304 iobuf, rc);
1305 } else {
1306 /* Completing on a skipped-over eager buffer */
1307 ib_complete_recv ( ibdev, qp, &dest, &source, iobuf,
1308 -ECANCELED );
1309 }
1310
1311 /* Clear eager buffer */
1312 memset ( &rcvegr, 0, sizeof ( rcvegr ) );
1313 linda_writeq_array8b ( linda, &rcvegr, linda_wq->eager_array,
1314 linda_wq->eager_cons );
1315
1316 /* Increment consumer index */
1317 linda_wq->eager_cons = ( ( linda_wq->eager_cons + 1 ) &
1318 ( linda_wq->eager_entries - 1 ) );
1319 }
1320 }
1321
1322 /**
1323 * Poll receive work queue
1324 *
1325 * @v ibdev Infiniband device
1326 * @v qp Queue pair
1327 */
1328 static void linda_poll_recv_wq ( struct ib_device *ibdev,
1329 struct ib_queue_pair *qp ) {
1330 struct linda *linda = ib_get_drvdata ( ibdev );
1331 struct ib_work_queue *wq = &qp->recv;
1332 struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
1333 struct QIB_7220_RcvHdrHead0 rcvhdrhead;
1334 unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
1335 unsigned int header_prod;
1336
1337 /* Check for received packets */
1338 header_prod = ( BIT_GET ( &linda_wq->header_prod, Value ) << 2 );
1339 if ( header_prod == linda_wq->header_cons )
1340 return;
1341
1342 /* Process all received packets */
1343 while ( linda_wq->header_cons != header_prod ) {
1344
1345 /* Complete the receive */
1346 linda_complete_recv ( ibdev, qp, linda_wq->header_cons );
1347
1348 /* Increment the consumer offset */
1349 linda_wq->header_cons += LINDA_RECV_HEADER_SIZE;
1350 linda_wq->header_cons %= LINDA_RECV_HEADERS_SIZE;
1351 }
1352
1353 /* Update consumer offset */
1354 memset ( &rcvhdrhead, 0, sizeof ( rcvhdrhead ) );
1355 BIT_FILL_2 ( &rcvhdrhead,
1356 RcvHeadPointer, ( linda_wq->header_cons >> 2 ),
1357 counter, 1 );
1358 linda_writeq_array64k ( linda, &rcvhdrhead,
1359 QIB_7220_RcvHdrHead0_offset, ctx );
1360 }
1361
1362 /**
1363 * Poll completion queue
1364 *
1365 * @v ibdev Infiniband device
1366 * @v cq Completion queue
1367 */
1368 static void linda_poll_cq ( struct ib_device *ibdev,
1369 struct ib_completion_queue *cq ) {
1370 struct ib_work_queue *wq;
1371
1372 /* Poll associated send and receive queues */
1373 list_for_each_entry ( wq, &cq->work_queues, list ) {
1374 if ( wq->is_send ) {
1375 linda_poll_send_wq ( ibdev, wq->qp );
1376 } else {
1377 linda_poll_recv_wq ( ibdev, wq->qp );
1378 }
1379 }
1380 }
1381
1382 /***************************************************************************
1383 *
1384 * Event queues
1385 *
1386 ***************************************************************************
1387 */
1388
1389 /**
1390 * Poll event queue
1391 *
1392 * @v ibdev Infiniband device
1393 */
1394 static void linda_poll_eq ( struct ib_device *ibdev ) {
1395 struct linda *linda = ib_get_drvdata ( ibdev );
1396 struct QIB_7220_ErrStatus errstatus;
1397 struct QIB_7220_ErrClear errclear;
1398
1399 /* Check for link status changes */
1400 DBG_DISABLE ( DBGLVL_IO );
1401 linda_readq ( linda, &errstatus, QIB_7220_ErrStatus_offset );
1402 DBG_ENABLE ( DBGLVL_IO );
1403 if ( BIT_GET ( &errstatus, IBStatusChanged ) ) {
1404 linda_link_state_changed ( ibdev );
1405 memset ( &errclear, 0, sizeof ( errclear ) );
1406 BIT_FILL_1 ( &errclear, IBStatusChangedClear, 1 );
1407 linda_writeq ( linda, &errclear, QIB_7220_ErrClear_offset );
1408 }
1409 }
1410
1411 /***************************************************************************
1412 *
1413 * Infiniband link-layer operations
1414 *
1415 ***************************************************************************
1416 */
1417
1418 /**
1419 * Initialise Infiniband link
1420 *
1421 * @v ibdev Infiniband device
1422 * @ret rc Return status code
1423 */
1424 static int linda_open ( struct ib_device *ibdev ) {
1425 struct linda *linda = ib_get_drvdata ( ibdev );
1426 struct QIB_7220_Control control;
1427
1428 /* Disable link */
1429 linda_readq ( linda, &control, QIB_7220_Control_offset );
1430 BIT_SET ( &control, LinkEn, 1 );
1431 linda_writeq ( linda, &control, QIB_7220_Control_offset );
1432 return 0;
1433 }
1434
1435 /**
1436 * Close Infiniband link
1437 *
1438 * @v ibdev Infiniband device
1439 */
1440 static void linda_close ( struct ib_device *ibdev ) {
1441 struct linda *linda = ib_get_drvdata ( ibdev );
1442 struct QIB_7220_Control control;
1443
1444 /* Disable link */
1445 linda_readq ( linda, &control, QIB_7220_Control_offset );
1446 BIT_SET ( &control, LinkEn, 0 );
1447 linda_writeq ( linda, &control, QIB_7220_Control_offset );
1448 }
1449
1450 /***************************************************************************
1451 *
1452 * Multicast group operations
1453 *
1454 ***************************************************************************
1455 */
1456
1457 /**
1458 * Attach to multicast group
1459 *
1460 * @v ibdev Infiniband device
1461 * @v qp Queue pair
1462 * @v gid Multicast GID
1463 * @ret rc Return status code
1464 */
1465 static int linda_mcast_attach ( struct ib_device *ibdev,
1466 struct ib_queue_pair *qp,
1467 union ib_gid *gid ) {
1468 struct linda *linda = ib_get_drvdata ( ibdev );
1469
1470 ( void ) linda;
1471 ( void ) qp;
1472 ( void ) gid;
1473 return 0;
1474 }
1475
1476 /**
1477 * Detach from multicast group
1478 *
1479 * @v ibdev Infiniband device
1480 * @v qp Queue pair
1481 * @v gid Multicast GID
1482 */
1483 static void linda_mcast_detach ( struct ib_device *ibdev,
1484 struct ib_queue_pair *qp,
1485 union ib_gid *gid ) {
1486 struct linda *linda = ib_get_drvdata ( ibdev );
1487
1488 ( void ) linda;
1489 ( void ) qp;
1490 ( void ) gid;
1491 }
1492
1493 /** Linda Infiniband operations */
1494 static struct ib_device_operations linda_ib_operations = {
1495 .create_cq = linda_create_cq,
1496 .destroy_cq = linda_destroy_cq,
1497 .create_qp = linda_create_qp,
1498 .modify_qp = linda_modify_qp,
1499 .destroy_qp = linda_destroy_qp,
1500 .post_send = linda_post_send,
1501 .post_recv = linda_post_recv,
1502 .poll_cq = linda_poll_cq,
1503 .poll_eq = linda_poll_eq,
1504 .open = linda_open,
1505 .close = linda_close,
1506 .mcast_attach = linda_mcast_attach,
1507 .mcast_detach = linda_mcast_detach,
1508 .set_port_info = linda_set_port_info,
1509 .set_pkey_table = linda_set_pkey_table,
1510 };
1511
1512 /***************************************************************************
1513 *
1514 * I2C bus operations
1515 *
1516 ***************************************************************************
1517 */
1518
1519 /** Linda I2C bit to GPIO mappings */
1520 static unsigned int linda_i2c_bits[] = {
1521 [I2C_BIT_SCL] = ( 1 << LINDA_GPIO_SCL ),
1522 [I2C_BIT_SDA] = ( 1 << LINDA_GPIO_SDA ),
1523 };
1524
1525 /**
1526 * Read Linda I2C line status
1527 *
1528 * @v basher Bit-bashing interface
1529 * @v bit_id Bit number
1530 * @ret zero Input is a logic 0
1531 * @ret non-zero Input is a logic 1
1532 */
1533 static int linda_i2c_read_bit ( struct bit_basher *basher,
1534 unsigned int bit_id ) {
1535 struct linda *linda =
1536 container_of ( basher, struct linda, i2c.basher );
1537 struct QIB_7220_EXTStatus extstatus;
1538 unsigned int status;
1539
1540 DBG_DISABLE ( DBGLVL_IO );
1541
1542 linda_readq ( linda, &extstatus, QIB_7220_EXTStatus_offset );
1543 status = ( BIT_GET ( &extstatus, GPIOIn ) & linda_i2c_bits[bit_id] );
1544
1545 DBG_ENABLE ( DBGLVL_IO );
1546
1547 return status;
1548 }
1549
1550 /**
1551 * Write Linda I2C line status
1552 *
1553 * @v basher Bit-bashing interface
1554 * @v bit_id Bit number
1555 * @v data Value to write
1556 */
1557 static void linda_i2c_write_bit ( struct bit_basher *basher,
1558 unsigned int bit_id, unsigned long data ) {
1559 struct linda *linda =
1560 container_of ( basher, struct linda, i2c.basher );
1561 struct QIB_7220_EXTCtrl extctrl;
1562 struct QIB_7220_GPIO gpioout;
1563 unsigned int bit = linda_i2c_bits[bit_id];
1564 unsigned int outputs = 0;
1565 unsigned int output_enables = 0;
1566
1567 DBG_DISABLE ( DBGLVL_IO );
1568
1569 /* Read current GPIO mask and outputs */
1570 linda_readq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
1571 linda_readq ( linda, &gpioout, QIB_7220_GPIOOut_offset );
1572
1573 /* Update outputs and output enables. I2C lines are tied
1574 * high, so we always set the output to 0 and use the output
1575 * enable to control the line.
1576 */
1577 output_enables = BIT_GET ( &extctrl, GPIOOe );
1578 output_enables = ( ( output_enables & ~bit ) | ( ~data & bit ) );
1579 outputs = BIT_GET ( &gpioout, GPIO );
1580 outputs = ( outputs & ~bit );
1581 BIT_SET ( &extctrl, GPIOOe, output_enables );
1582 BIT_SET ( &gpioout, GPIO, outputs );
1583
1584 /* Write the output enable first; that way we avoid logic
1585 * hazards.
1586 */
1587 linda_writeq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
1588 linda_writeq ( linda, &gpioout, QIB_7220_GPIOOut_offset );
1589 mb();
1590
1591 DBG_ENABLE ( DBGLVL_IO );
1592 }
1593
1594 /** Linda I2C bit-bashing interface operations */
1595 static struct bit_basher_operations linda_i2c_basher_ops = {
1596 .read = linda_i2c_read_bit,
1597 .write = linda_i2c_write_bit,
1598 };
1599
1600 /**
1601 * Initialise Linda I2C subsystem
1602 *
1603 * @v linda Linda device
1604 * @ret rc Return status code
1605 */
1606 static int linda_init_i2c ( struct linda *linda ) {
1607 static int try_eeprom_address[] = { 0x51, 0x50 };
1608 unsigned int i;
1609 int rc;
1610
1611 /* Initialise bus */
1612 if ( ( rc = init_i2c_bit_basher ( &linda->i2c,
1613 &linda_i2c_basher_ops ) ) != 0 ) {
1614 DBGC ( linda, "Linda %p could not initialise I2C bus: %s\n",
1615 linda, strerror ( rc ) );
1616 return rc;
1617 }
1618
1619 /* Probe for devices */
1620 for ( i = 0 ; i < ( sizeof ( try_eeprom_address ) /
1621 sizeof ( try_eeprom_address[0] ) ) ; i++ ) {
1622 init_i2c_eeprom ( &linda->eeprom, try_eeprom_address[i] );
1623 if ( ( rc = i2c_check_presence ( &linda->i2c.i2c,
1624 &linda->eeprom ) ) == 0 ) {
1625 DBGC2 ( linda, "Linda %p found EEPROM at %02x\n",
1626 linda, try_eeprom_address[i] );
1627 return 0;
1628 }
1629 }
1630
1631 DBGC ( linda, "Linda %p could not find EEPROM\n", linda );
1632 return -ENODEV;
1633 }
1634
1635 /**
1636 * Read EEPROM parameters
1637 *
1638 * @v linda Linda device
1639 * @v guid GUID to fill in
1640 * @ret rc Return status code
1641 */
1642 static int linda_read_eeprom ( struct linda *linda, union ib_guid *guid ) {
1643 struct i2c_interface *i2c = &linda->i2c.i2c;
1644 int rc;
1645
1646 /* Read GUID */
1647 if ( ( rc = i2c->read ( i2c, &linda->eeprom, LINDA_EEPROM_GUID_OFFSET,
1648 guid->bytes, sizeof ( *guid ) ) ) != 0 ) {
1649 DBGC ( linda, "Linda %p could not read GUID: %s\n",
1650 linda, strerror ( rc ) );
1651 return rc;
1652 }
1653 DBGC2 ( linda, "Linda %p has GUID " IB_GUID_FMT "\n",
1654 linda, IB_GUID_ARGS ( guid ) );
1655
1656 /* Read serial number (debug only) */
1657 if ( DBG_LOG ) {
1658 uint8_t serial[LINDA_EEPROM_SERIAL_SIZE + 1];
1659
1660 serial[ sizeof ( serial ) - 1 ] = '\0';
1661 if ( ( rc = i2c->read ( i2c, &linda->eeprom,
1662 LINDA_EEPROM_SERIAL_OFFSET, serial,
1663 ( sizeof ( serial ) - 1 ) ) ) != 0 ) {
1664 DBGC ( linda, "Linda %p could not read serial: %s\n",
1665 linda, strerror ( rc ) );
1666 return rc;
1667 }
1668 DBGC2 ( linda, "Linda %p has serial number \"%s\"\n",
1669 linda, serial );
1670 }
1671
1672 return 0;
1673 }
1674
1675 /***************************************************************************
1676 *
1677 * External parallel bus access
1678 *
1679 ***************************************************************************
1680 */
1681
1682 /**
1683 * Request ownership of the IB external parallel bus
1684 *
1685 * @v linda Linda device
1686 * @ret rc Return status code
1687 */
1688 static int linda_ib_epb_request ( struct linda *linda ) {
1689 struct QIB_7220_ibsd_epb_access_ctrl access;
1690 unsigned int i;
1691
1692 /* Request ownership */
1693 memset ( &access, 0, sizeof ( access ) );
1694 BIT_FILL_1 ( &access, sw_ib_epb_req, 1 );
1695 linda_writeq ( linda, &access, QIB_7220_ibsd_epb_access_ctrl_offset );
1696
1697 /* Wait for ownership to be granted */
1698 for ( i = 0 ; i < LINDA_EPB_REQUEST_MAX_WAIT_US ; i++ ) {
1699 linda_readq ( linda, &access,
1700 QIB_7220_ibsd_epb_access_ctrl_offset );
1701 if ( BIT_GET ( &access, sw_ib_epb_req_granted ) )
1702 return 0;
1703 udelay ( 1 );
1704 }
1705
1706 DBGC ( linda, "Linda %p timed out waiting for IB EPB request\n",
1707 linda );
1708 return -ETIMEDOUT;
1709 }
1710
1711 /**
1712 * Wait for IB external parallel bus transaction to complete
1713 *
1714 * @v linda Linda device
1715 * @v xact Buffer to hold transaction result
1716 * @ret rc Return status code
1717 */
1718 static int linda_ib_epb_wait ( struct linda *linda,
1719 struct QIB_7220_ibsd_epb_transaction_reg *xact ) {
1720 unsigned int i;
1721
1722 /* Discard first read to allow for signals crossing clock domains */
1723 linda_readq ( linda, xact, QIB_7220_ibsd_epb_transaction_reg_offset );
1724
1725 for ( i = 0 ; i < LINDA_EPB_XACT_MAX_WAIT_US ; i++ ) {
1726 linda_readq ( linda, xact,
1727 QIB_7220_ibsd_epb_transaction_reg_offset );
1728 if ( BIT_GET ( xact, ib_epb_rdy ) ) {
1729 if ( BIT_GET ( xact, ib_epb_req_error ) ) {
1730 DBGC ( linda, "Linda %p EPB transaction "
1731 "failed\n", linda );
1732 return -EIO;
1733 } else {
1734 return 0;
1735 }
1736 }
1737 udelay ( 1 );
1738 }
1739
1740 DBGC ( linda, "Linda %p timed out waiting for IB EPB transaction\n",
1741 linda );
1742 return -ETIMEDOUT;
1743 }
1744
1745 /**
1746 * Release ownership of the IB external parallel bus
1747 *
1748 * @v linda Linda device
1749 */
1750 static void linda_ib_epb_release ( struct linda *linda ) {
1751 struct QIB_7220_ibsd_epb_access_ctrl access;
1752
1753 memset ( &access, 0, sizeof ( access ) );
1754 BIT_FILL_1 ( &access, sw_ib_epb_req, 0 );
1755 linda_writeq ( linda, &access, QIB_7220_ibsd_epb_access_ctrl_offset );
1756 }
1757
1758 /**
1759 * Read data via IB external parallel bus
1760 *
1761 * @v linda Linda device
1762 * @v location EPB location
1763 * @ret data Data read, or negative error
1764 *
1765 * You must have already acquired ownership of the IB external
1766 * parallel bus.
1767 */
1768 static int linda_ib_epb_read ( struct linda *linda, unsigned int location ) {
1769 struct QIB_7220_ibsd_epb_transaction_reg xact;
1770 unsigned int data;
1771 int rc;
1772
1773 /* Ensure no transaction is currently in progress */
1774 if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
1775 return rc;
1776
1777 /* Process data */
1778 memset ( &xact, 0, sizeof ( xact ) );
1779 BIT_FILL_3 ( &xact,
1780 ib_epb_address, LINDA_EPB_LOC_ADDRESS ( location ),
1781 ib_epb_read_write, LINDA_EPB_READ,
1782 ib_epb_cs, LINDA_EPB_LOC_CS ( location ) );
1783 linda_writeq ( linda, &xact,
1784 QIB_7220_ibsd_epb_transaction_reg_offset );
1785
1786 /* Wait for transaction to complete */
1787 if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
1788 return rc;
1789
1790 data = BIT_GET ( &xact, ib_epb_data );
1791 return data;
1792 }
1793
1794 /**
1795 * Write data via IB external parallel bus
1796 *
1797 * @v linda Linda device
1798 * @v location EPB location
1799 * @v data Data to write
1800 * @ret rc Return status code
1801 *
1802 * You must have already acquired ownership of the IB external
1803 * parallel bus.
1804 */
1805 static int linda_ib_epb_write ( struct linda *linda, unsigned int location,
1806 unsigned int data ) {
1807 struct QIB_7220_ibsd_epb_transaction_reg xact;
1808 int rc;
1809
1810 /* Ensure no transaction is currently in progress */
1811 if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
1812 return rc;
1813
1814 /* Process data */
1815 memset ( &xact, 0, sizeof ( xact ) );
1816 BIT_FILL_4 ( &xact,
1817 ib_epb_data, data,
1818 ib_epb_address, LINDA_EPB_LOC_ADDRESS ( location ),
1819 ib_epb_read_write, LINDA_EPB_WRITE,
1820 ib_epb_cs, LINDA_EPB_LOC_CS ( location ) );
1821 linda_writeq ( linda, &xact,
1822 QIB_7220_ibsd_epb_transaction_reg_offset );
1823
1824 /* Wait for transaction to complete */
1825 if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
1826 return rc;
1827
1828 return 0;
1829 }
1830
1831 /**
1832 * Read/modify/write EPB register
1833 *
1834 * @v linda Linda device
1835 * @v cs Chip select
1836 * @v channel Channel
1837 * @v element Element
1838 * @v reg Register
1839 * @v value Value to set
1840 * @v mask Mask to apply to old value
1841 * @ret rc Return status code
1842 */
1843 static int linda_ib_epb_mod_reg ( struct linda *linda, unsigned int cs,
1844 unsigned int channel, unsigned int element,
1845 unsigned int reg, unsigned int value,
1846 unsigned int mask ) {
1847 unsigned int location;
1848 int old_value;
1849 int rc;
1850
1851 DBG_DISABLE ( DBGLVL_IO );
1852
1853 /* Sanity check */
1854 assert ( ( value & mask ) == value );
1855
1856 /* Acquire bus ownership */
1857 if ( ( rc = linda_ib_epb_request ( linda ) ) != 0 )
1858 goto out;
1859
1860 /* Read existing value, if necessary */
1861 location = LINDA_EPB_LOC ( cs, channel, element, reg );
1862 if ( (~mask) & 0xff ) {
1863 old_value = linda_ib_epb_read ( linda, location );
1864 if ( old_value < 0 ) {
1865 rc = old_value;
1866 goto out_release;
1867 }
1868 } else {
1869 old_value = 0;
1870 }
1871
1872 /* Update value */
1873 value = ( ( old_value & ~mask ) | value );
1874 DBGCP ( linda, "Linda %p CS %d EPB(%d,%d,%#02x) %#02x => %#02x\n",
1875 linda, cs, channel, element, reg, old_value, value );
1876 if ( ( rc = linda_ib_epb_write ( linda, location, value ) ) != 0 )
1877 goto out_release;
1878
1879 out_release:
1880 /* Release bus */
1881 linda_ib_epb_release ( linda );
1882 out:
1883 DBG_ENABLE ( DBGLVL_IO );
1884 return rc;
1885 }
1886
1887 /**
1888 * Transfer data to/from microcontroller RAM
1889 *
1890 * @v linda Linda device
1891 * @v address Starting address
1892 * @v write Data to write, or NULL
1893 * @v read Data to read, or NULL
1894 * @v len Length of data
1895 * @ret rc Return status code
1896 */
1897 static int linda_ib_epb_ram_xfer ( struct linda *linda, unsigned int address,
1898 const void *write, void *read,
1899 size_t len ) {
1900 unsigned int control;
1901 unsigned int address_hi;
1902 unsigned int address_lo;
1903 int data;
1904 int rc;
1905
1906 DBG_DISABLE ( DBGLVL_IO );
1907
1908 assert ( ! ( write && read ) );
1909 assert ( ( address % LINDA_EPB_UC_CHUNK_SIZE ) == 0 );
1910 assert ( ( len % LINDA_EPB_UC_CHUNK_SIZE ) == 0 );
1911
1912 /* Acquire bus ownership */
1913 if ( ( rc = linda_ib_epb_request ( linda ) ) != 0 )
1914 goto out;
1915
1916 /* Process data */
1917 while ( len ) {
1918
1919 /* Reset the address for each new chunk */
1920 if ( ( address % LINDA_EPB_UC_CHUNK_SIZE ) == 0 ) {
1921
1922 /* Write the control register */
1923 control = ( read ? LINDA_EPB_UC_CTL_READ :
1924 LINDA_EPB_UC_CTL_WRITE );
1925 if ( ( rc = linda_ib_epb_write ( linda,
1926 LINDA_EPB_UC_CTL,
1927 control ) ) != 0 )
1928 break;
1929
1930 /* Write the address registers */
1931 address_hi = ( address >> 8 );
1932 if ( ( rc = linda_ib_epb_write ( linda,
1933 LINDA_EPB_UC_ADDR_HI,
1934 address_hi ) ) != 0 )
1935 break;
1936 address_lo = ( address & 0xff );
1937 if ( ( rc = linda_ib_epb_write ( linda,
1938 LINDA_EPB_UC_ADDR_LO,
1939 address_lo ) ) != 0 )
1940 break;
1941 }
1942
1943 /* Read or write the data */
1944 if ( read ) {
1945 data = linda_ib_epb_read ( linda, LINDA_EPB_UC_DATA );
1946 if ( data < 0 ) {
1947 rc = data;
1948 break;
1949 }
1950 *( ( uint8_t * ) read++ ) = data;
1951 } else {
1952 data = *( ( uint8_t * ) write++ );
1953 if ( ( rc = linda_ib_epb_write ( linda,
1954 LINDA_EPB_UC_DATA,
1955 data ) ) != 0 )
1956 break;
1957 }
1958 address++;
1959 len--;
1960
1961 /* Reset the control byte after each chunk */
1962 if ( ( address % LINDA_EPB_UC_CHUNK_SIZE ) == 0 ) {
1963 if ( ( rc = linda_ib_epb_write ( linda,
1964 LINDA_EPB_UC_CTL,
1965 0 ) ) != 0 )
1966 break;
1967 }
1968 }
1969
1970 /* Release bus */
1971 linda_ib_epb_release ( linda );
1972
1973 out:
1974 DBG_ENABLE ( DBGLVL_IO );
1975 return rc;
1976 }
1977
1978 /***************************************************************************
1979 *
1980 * Infiniband SerDes initialisation
1981 *
1982 ***************************************************************************
1983 */
1984
1985 /** A Linda SerDes parameter */
1986 struct linda_serdes_param {
1987 /** EPB address as constructed by LINDA_EPB_ADDRESS() */
1988 uint16_t address;
1989 /** Value to set */
1990 uint8_t value;
1991 /** Mask to apply to old value */
1992 uint8_t mask;
1993 } __packed;
1994
1995 /** Magic "all channels" channel number */
1996 #define LINDA_EPB_ALL_CHANNELS 31
1997
1998 /** End of SerDes parameter list marker */
1999 #define LINDA_SERDES_PARAM_END { 0, 0, 0 }
2000
2001 /**
2002 * Program IB SerDes register(s)
2003 *
2004 * @v linda Linda device
2005 * @v param SerDes parameter
2006 * @ret rc Return status code
2007 */
2008 static int linda_set_serdes_param ( struct linda *linda,
2009 struct linda_serdes_param *param ) {
2010 unsigned int channel;
2011 unsigned int channel_start;
2012 unsigned int channel_end;
2013 unsigned int element;
2014 unsigned int reg;
2015 int rc;
2016
2017 /* Break down the EPB address and determine channels */
2018 channel = LINDA_EPB_ADDRESS_CHANNEL ( param->address );
2019 element = LINDA_EPB_ADDRESS_ELEMENT ( param->address );
2020 reg = LINDA_EPB_ADDRESS_REG ( param->address );
2021 if ( channel == LINDA_EPB_ALL_CHANNELS ) {
2022 channel_start = 0;
2023 channel_end = 3;
2024 } else {
2025 channel_start = channel_end = channel;
2026 }
2027
2028 /* Modify register for each specified channel */
2029 for ( channel = channel_start ; channel <= channel_end ; channel++ ) {
2030 if ( ( rc = linda_ib_epb_mod_reg ( linda, LINDA_EPB_CS_SERDES,
2031 channel, element, reg,
2032 param->value,
2033 param->mask ) ) != 0 )
2034 return rc;
2035 }
2036
2037 return 0;
2038 }
2039
2040 /**
2041 * Program IB SerDes registers
2042 *
2043 * @v linda Linda device
2044 * @v param SerDes parameters
2045 * @v count Number of parameters
2046 * @ret rc Return status code
2047 */
2048 static int linda_set_serdes_params ( struct linda *linda,
2049 struct linda_serdes_param *params ) {
2050 int rc;
2051
2052 for ( ; params->mask != 0 ; params++ ){
2053 if ( ( rc = linda_set_serdes_param ( linda,
2054 params ) ) != 0 )
2055 return rc;
2056 }
2057
2058 return 0;
2059 }
2060
2061 #define LINDA_DDS_VAL( amp_d, main_d, ipst_d, ipre_d, \
2062 amp_s, main_s, ipst_s, ipre_s ) \
2063 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x00 ), \
2064 ( ( ( amp_d & 0x1f ) << 1 ) | 1 ), 0xff }, \
2065 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x01 ), \
2066 ( ( ( amp_s & 0x1f ) << 1 ) | 1 ), 0xff }, \
2067 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x09 ), \
2068 ( ( main_d << 3 ) | 4 | ( ipre_d >> 2 ) ), 0xff }, \
2069 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x0a ), \
2070 ( ( main_s << 3 ) | 4 | ( ipre_s >> 2 ) ), 0xff }, \
2071 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x06 ), \
2072 ( ( ( ipst_d & 0xf ) << 1 ) | \
2073 ( ( ipre_d & 3 ) << 6 ) | 0x21 ), 0xff }, \
2074 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x07 ), \
2075 ( ( ( ipst_s & 0xf ) << 1 ) | \
2076 ( ( ipre_s & 3 ) << 6) | 0x21 ), 0xff }
2077
2078 /**
2079 * Linda SerDes default parameters
2080 *
2081 * These magic start-of-day values are taken from the Linux driver.
2082 */
2083 static struct linda_serdes_param linda_serdes_defaults1[] = {
2084 /* RXHSCTRL0 */
2085 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x00 ), 0xd4, 0xff },
2086 /* VCDL_DAC2 */
2087 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x05 ), 0x2d, 0xff },
2088 /* VCDL_CTRL2 */
2089 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x08 ), 0x03, 0x0f },
2090 /* START_EQ1 */
2091 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x27 ), 0x10, 0xff },
2092 /* START_EQ2 */
2093 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x28 ), 0x30, 0xff },
2094 /* BACTRL */
2095 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x0e ), 0x40, 0xff },
2096 /* LDOUTCTRL1 */
2097 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x06 ), 0x04, 0xff },
2098 /* RXHSSTATUS */
2099 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x0f ), 0x04, 0xff },
2100 /* End of this block */
2101 LINDA_SERDES_PARAM_END
2102 };
2103 static struct linda_serdes_param linda_serdes_defaults2[] = {
2104 /* LDOUTCTRL1 */
2105 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x06 ), 0x00, 0xff },
2106 /* DDS values */
2107 LINDA_DDS_VAL ( 31, 19, 12, 0, 29, 22, 9, 0 ),
2108 /* Set Rcv Eq. to Preset node */
2109 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x27 ), 0x10, 0xff },
2110 /* DFELTHFDR */
2111 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x08 ), 0x00, 0xff },
2112 /* DFELTHHDR */
2113 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x21 ), 0x00, 0xff },
2114 /* TLTHFDR */
2115 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x09 ), 0x02, 0xff },
2116 /* TLTHHDR */
2117 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x23 ), 0x02, 0xff },
2118 /* ZFR */
2119 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1b ), 0x0c, 0xff },
2120 /* ZCNT) */
2121 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1c ), 0x0c, 0xff },
2122 /* GFR */
2123 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1e ), 0x10, 0xff },
2124 /* GHR */
2125 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1f ), 0x10, 0xff },
2126 /* VCDL_CTRL0 toggle */
2127 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x06 ), 0x20, 0xff },
2128 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x06 ), 0x00, 0xff },
2129 /* CMUCTRL5 */
2130 { LINDA_EPB_ADDRESS ( 7, 0, 0x15 ), 0x80, 0xff },
2131 /* End of this block */
2132 LINDA_SERDES_PARAM_END
2133 };
2134 static struct linda_serdes_param linda_serdes_defaults3[] = {
2135 /* START_EQ1 */
2136 { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x27 ), 0x00, 0x38 },
2137 /* End of this block */
2138 LINDA_SERDES_PARAM_END
2139 };
2140
2141 /**
2142 * Program the microcontroller RAM
2143 *
2144 * @v linda Linda device
2145 * @ret rc Return status code
2146 */
2147 static int linda_program_uc_ram ( struct linda *linda ) {
2148 int rc;
2149
2150 if ( ( rc = linda_ib_epb_ram_xfer ( linda, 0, linda_ib_fw, NULL,
2151 sizeof ( linda_ib_fw ) ) ) != 0 ){
2152 DBGC ( linda, "Linda %p could not load IB firmware: %s\n",
2153 linda, strerror ( rc ) );
2154 return rc;
2155 }
2156
2157 return 0;
2158 }
2159
2160 /**
2161 * Verify the microcontroller RAM
2162 *
2163 * @v linda Linda device
2164 * @ret rc Return status code
2165 */
2166 static int linda_verify_uc_ram ( struct linda *linda ) {
2167 uint8_t verify[LINDA_EPB_UC_CHUNK_SIZE];
2168 unsigned int offset;
2169 int rc;
2170
2171 for ( offset = 0 ; offset < sizeof ( linda_ib_fw );
2172 offset += sizeof ( verify ) ) {
2173 if ( ( rc = linda_ib_epb_ram_xfer ( linda, offset,
2174 NULL, verify,
2175 sizeof (verify) )) != 0 ){
2176 DBGC ( linda, "Linda %p could not read back IB "
2177 "firmware: %s\n", linda, strerror ( rc ) );
2178 return rc;
2179 }
2180 if ( memcmp ( ( linda_ib_fw + offset ), verify,
2181 sizeof ( verify ) ) != 0 ) {
2182 DBGC ( linda, "Linda %p firmware verification failed "
2183 "at offset %#x\n", linda, offset );
2184 DBGC_HDA ( linda, offset, ( linda_ib_fw + offset ),
2185 sizeof ( verify ) );
2186 DBGC_HDA ( linda, offset, verify, sizeof ( verify ) );
2187 return -EIO;
2188 }
2189 }
2190
2191 DBGC2 ( linda, "Linda %p firmware verified ok\n", linda );
2192 return 0;
2193 }
2194
2195 /**
2196 * Use the microcontroller to trim the IB link
2197 *
2198 * @v linda Linda device
2199 * @ret rc Return status code
2200 */
2201 static int linda_trim_ib ( struct linda *linda ) {
2202 struct QIB_7220_IBSerDesCtrl ctrl;
2203 struct QIB_7220_IntStatus intstatus;
2204 unsigned int i;
2205 int rc;
2206
2207 /* Bring the microcontroller out of reset */
2208 linda_readq ( linda, &ctrl, QIB_7220_IBSerDesCtrl_offset );
2209 BIT_SET ( &ctrl, ResetIB_uC_Core, 0 );
2210 linda_writeq ( linda, &ctrl, QIB_7220_IBSerDesCtrl_offset );
2211
2212 /* Wait for the "trim done" signal */
2213 for ( i = 0 ; i < LINDA_TRIM_DONE_MAX_WAIT_MS ; i++ ) {
2214 linda_readq ( linda, &intstatus, QIB_7220_IntStatus_offset );
2215 if ( BIT_GET ( &intstatus, IBSerdesTrimDone ) ) {
2216 rc = 0;
2217 goto out_reset;
2218 }
2219 mdelay ( 1 );
2220 }
2221
2222 DBGC ( linda, "Linda %p timed out waiting for trim done\n", linda );
2223 rc = -ETIMEDOUT;
2224 out_reset:
2225 /* Put the microcontroller back into reset */
2226 BIT_SET ( &ctrl, ResetIB_uC_Core, 1 );
2227 linda_writeq ( linda, &ctrl, QIB_7220_IBSerDesCtrl_offset );
2228
2229 return rc;
2230 }
2231
2232 /**
2233 * Initialise the IB SerDes
2234 *
2235 * @v linda Linda device
2236 * @ret rc Return status code
2237 */
2238 static int linda_init_ib_serdes ( struct linda *linda ) {
2239 struct QIB_7220_Control control;
2240 struct QIB_7220_IBCCtrl ibcctrl;
2241 struct QIB_7220_IBCDDRCtrl ibcddrctrl;
2242 struct QIB_7220_XGXSCfg xgxscfg;
2243 int rc;
2244
2245 /* Disable link */
2246 linda_readq ( linda, &control, QIB_7220_Control_offset );
2247 BIT_SET ( &control, LinkEn, 0 );
2248 linda_writeq ( linda, &control, QIB_7220_Control_offset );
2249
2250 /* Configure sensible defaults for IBC */
2251 memset ( &ibcctrl, 0, sizeof ( ibcctrl ) );
2252 BIT_FILL_6 ( &ibcctrl, /* Tuning values taken from Linux driver */
2253 FlowCtrlPeriod, 0x03,
2254 FlowCtrlWaterMark, 0x05,
2255 MaxPktLen, ( ( LINDA_RECV_HEADER_SIZE +
2256 LINDA_RECV_PAYLOAD_SIZE +
2257 4 /* ICRC */ ) >> 2 ),
2258 PhyerrThreshold, 0xf,
2259 OverrunThreshold, 0xf,
2260 CreditScale, 0x4 );
2261 linda_writeq ( linda, &ibcctrl, QIB_7220_IBCCtrl_offset );
2262
2263 /* Force SDR only to avoid needing all the DDR tuning,
2264 * Mellanox compatibility hacks etc. SDR is plenty for
2265 * boot-time operation.
2266 */
2267 linda_readq ( linda, &ibcddrctrl, QIB_7220_IBCDDRCtrl_offset );
2268 BIT_SET ( &ibcddrctrl, IB_ENHANCED_MODE, 0 );
2269 BIT_SET ( &ibcddrctrl, SD_SPEED_SDR, 1 );
2270 BIT_SET ( &ibcddrctrl, SD_SPEED_DDR, 0 );
2271 BIT_SET ( &ibcddrctrl, SD_SPEED_QDR, 0 );
2272 BIT_SET ( &ibcddrctrl, HRTBT_ENB, 0 );
2273 BIT_SET ( &ibcddrctrl, HRTBT_AUTO, 0 );
2274 linda_writeq ( linda, &ibcddrctrl, QIB_7220_IBCDDRCtrl_offset );
2275
2276 /* Set default SerDes parameters */
2277 if ( ( rc = linda_set_serdes_params ( linda,
2278 linda_serdes_defaults1 ) ) != 0 )
2279 return rc;
2280 udelay ( 415 ); /* Magic delay while SerDes sorts itself out */
2281 if ( ( rc = linda_set_serdes_params ( linda,
2282 linda_serdes_defaults2 ) ) != 0 )
2283 return rc;
2284
2285 /* Program the microcontroller RAM */
2286 if ( ( rc = linda_program_uc_ram ( linda ) ) != 0 )
2287 return rc;
2288
2289 /* Verify the microcontroller RAM contents */
2290 if ( DBGLVL_LOG ) {
2291 if ( ( rc = linda_verify_uc_ram ( linda ) ) != 0 )
2292 return rc;
2293 }
2294
2295 /* More SerDes tuning */
2296 if ( ( rc = linda_set_serdes_params ( linda,
2297 linda_serdes_defaults3 ) ) != 0 )
2298 return rc;
2299
2300 /* Use the microcontroller to trim the IB link */
2301 if ( ( rc = linda_trim_ib ( linda ) ) != 0 )
2302 return rc;
2303
2304 /* Bring XGXS out of reset */
2305 linda_readq ( linda, &xgxscfg, QIB_7220_XGXSCfg_offset );
2306 BIT_SET ( &xgxscfg, tx_rx_reset, 0 );
2307 BIT_SET ( &xgxscfg, xcv_reset, 0 );
2308 linda_writeq ( linda, &xgxscfg, QIB_7220_XGXSCfg_offset );
2309
2310 return rc;
2311 }
2312
2313 /***************************************************************************
2314 *
2315 * PCI layer interface
2316 *
2317 ***************************************************************************
2318 */
2319
2320 /**
2321 * Probe PCI device
2322 *
2323 * @v pci PCI device
2324 * @v id PCI ID
2325 * @ret rc Return status code
2326 */
2327 static int linda_probe ( struct pci_device *pci ) {
2328 struct ib_device *ibdev;
2329 struct linda *linda;
2330 struct QIB_7220_Revision revision;
2331 int rc;
2332
2333 /* Allocate Infiniband device */
2334 ibdev = alloc_ibdev ( sizeof ( *linda ) );
2335 if ( ! ibdev ) {
2336 rc = -ENOMEM;
2337 goto err_alloc_ibdev;
2338 }
2339 pci_set_drvdata ( pci, ibdev );
2340 linda = ib_get_drvdata ( ibdev );
2341 ibdev->op = &linda_ib_operations;
2342 ibdev->dev = &pci->dev;
2343 ibdev->port = 1;
2344
2345 /* Fix up PCI device */
2346 adjust_pci_device ( pci );
2347
2348 /* Get PCI BARs */
2349 linda->regs = ioremap ( pci->membase, LINDA_BAR0_SIZE );
2350 DBGC2 ( linda, "Linda %p has BAR at %08lx\n", linda, pci->membase );
2351
2352 /* Print some general data */
2353 linda_readq ( linda, &revision, QIB_7220_Revision_offset );
2354 DBGC2 ( linda, "Linda %p board %02lx v%ld.%ld.%ld.%ld\n", linda,
2355 BIT_GET ( &revision, BoardID ),
2356 BIT_GET ( &revision, R_SW ),
2357 BIT_GET ( &revision, R_Arch ),
2358 BIT_GET ( &revision, R_ChipRevMajor ),
2359 BIT_GET ( &revision, R_ChipRevMinor ) );
2360
2361 /* Record link capabilities. Note that we force SDR only to
2362 * avoid having to carry extra code for DDR tuning etc.
2363 */
2364 ibdev->link_width_enabled = ibdev->link_width_supported =
2365 ( IB_LINK_WIDTH_4X | IB_LINK_WIDTH_1X );
2366 ibdev->link_speed_enabled = ibdev->link_speed_supported =
2367 IB_LINK_SPEED_SDR;
2368
2369 /* Initialise I2C subsystem */
2370 if ( ( rc = linda_init_i2c ( linda ) ) != 0 )
2371 goto err_init_i2c;
2372
2373 /* Read EEPROM parameters */
2374 if ( ( rc = linda_read_eeprom ( linda, &ibdev->node_guid ) ) != 0 )
2375 goto err_read_eeprom;
2376 memcpy ( &ibdev->gid.s.guid, &ibdev->node_guid,
2377 sizeof ( ibdev->gid.s.guid ) );
2378
2379 /* Initialise send datapath */
2380 if ( ( rc = linda_init_send ( linda ) ) != 0 )
2381 goto err_init_send;
2382
2383 /* Initialise receive datapath */
2384 if ( ( rc = linda_init_recv ( linda ) ) != 0 )
2385 goto err_init_recv;
2386
2387 /* Initialise the IB SerDes */
2388 if ( ( rc = linda_init_ib_serdes ( linda ) ) != 0 )
2389 goto err_init_ib_serdes;
2390
2391 /* Register Infiniband device */
2392 if ( ( rc = register_ibdev ( ibdev ) ) != 0 ) {
2393 DBGC ( linda, "Linda %p could not register IB "
2394 "device: %s\n", linda, strerror ( rc ) );
2395 goto err_register_ibdev;
2396 }
2397
2398 return 0;
2399
2400 unregister_ibdev ( ibdev );
2401 err_register_ibdev:
2402 linda_fini_recv ( linda );
2403 err_init_recv:
2404 linda_fini_send ( linda );
2405 err_init_send:
2406 err_init_ib_serdes:
2407 err_read_eeprom:
2408 err_init_i2c:
2409 ibdev_put ( ibdev );
2410 err_alloc_ibdev:
2411 return rc;
2412 }
2413
2414 /**
2415 * Remove PCI device
2416 *
2417 * @v pci PCI device
2418 */
2419 static void linda_remove ( struct pci_device *pci ) {
2420 struct ib_device *ibdev = pci_get_drvdata ( pci );
2421 struct linda *linda = ib_get_drvdata ( ibdev );
2422
2423 unregister_ibdev ( ibdev );
2424 linda_fini_recv ( linda );
2425 linda_fini_send ( linda );
2426 ibdev_put ( ibdev );
2427 }
2428
2429 static struct pci_device_id linda_nics[] = {
2430 PCI_ROM ( 0x1077, 0x7220, "iba7220", "QLE7240/7280 HCA driver", 0 ),
2431 };
2432
2433 struct pci_driver linda_driver __pci_driver = {
2434 .ids = linda_nics,
2435 .id_count = ( sizeof ( linda_nics ) / sizeof ( linda_nics[0] ) ),
2436 .probe = linda_probe,
2437 .remove = linda_remove,
2438 };
Unnamed repository; edit this file 'description' to name the repository.