[efi] Implement the EFI_PXE_BASE_CODE_PROTOCOL
[ipxe.git] / src / drivers / infiniband / linda.h
1 #ifndef _LINDA_H
2 #define _LINDA_H
3
4 /*
5 * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of the
10 * License, or any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA.
21 *
22 * You can also choose to distribute this program under the terms of
23 * the Unmodified Binary Distribution Licence (as given in the file
24 * COPYING.UBDL), provided that you have satisfied its requirements.
25 */
26
27 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
28
29 /**
30 * @file
31 *
32 * QLogic Linda Infiniband HCA
33 *
34 */
35
36 #define BITOPS_LITTLE_ENDIAN
37 #include <ipxe/bitops.h>
38 #include "qib_7220_regs.h"
39
40 struct ib_device;
41
42 /** A Linda GPIO register */
43 struct QIB_7220_GPIO_pb {
44 pseudo_bit_t GPIO[16];
45 pseudo_bit_t Reserved[48];
46 };
47 struct QIB_7220_GPIO {
48 PSEUDO_BIT_STRUCT ( struct QIB_7220_GPIO_pb );
49 };
50
51 /** A Linda general scalar register */
52 struct QIB_7220_scalar_pb {
53 pseudo_bit_t Value[64];
54 };
55 struct QIB_7220_scalar {
56 PSEUDO_BIT_STRUCT ( struct QIB_7220_scalar_pb );
57 };
58
59 /** Linda send per-buffer control word */
60 struct QIB_7220_SendPbc_pb {
61 pseudo_bit_t LengthP1_toibc[11];
62 pseudo_bit_t Reserved1[4];
63 pseudo_bit_t LengthP1_trigger[11];
64 pseudo_bit_t Reserved2[3];
65 pseudo_bit_t TestEbp[1];
66 pseudo_bit_t Test[1];
67 pseudo_bit_t Intr[1];
68 pseudo_bit_t Reserved3[31];
69 pseudo_bit_t VL15[1];
70 };
71 struct QIB_7220_SendPbc {
72 PSEUDO_BIT_STRUCT ( struct QIB_7220_SendPbc_pb );
73 };
74
75 /** Linda send buffer availability */
76 struct QIB_7220_SendBufAvail_pb {
77 pseudo_bit_t InUseCheck[144][2];
78 pseudo_bit_t Reserved[32];
79 };
80 struct QIB_7220_SendBufAvail {
81 PSEUDO_BIT_STRUCT ( struct QIB_7220_SendBufAvail_pb );
82 };
83
84 /** DMA alignment for send buffer availability */
85 #define LINDA_SENDBUFAVAIL_ALIGN 64
86
87 /** A Linda eager receive descriptor */
88 struct QIB_7220_RcvEgr_pb {
89 pseudo_bit_t Addr[37];
90 pseudo_bit_t BufSize[3];
91 pseudo_bit_t Reserved[24];
92 };
93 struct QIB_7220_RcvEgr {
94 PSEUDO_BIT_STRUCT ( struct QIB_7220_RcvEgr_pb );
95 };
96
97 /** Linda receive header flags */
98 struct QIB_7220_RcvHdrFlags_pb {
99 pseudo_bit_t PktLen[11];
100 pseudo_bit_t RcvType[3];
101 pseudo_bit_t SoftB[1];
102 pseudo_bit_t SoftA[1];
103 pseudo_bit_t EgrIndex[12];
104 pseudo_bit_t Reserved1[3];
105 pseudo_bit_t UseEgrBfr[1];
106 pseudo_bit_t RcvSeq[4];
107 pseudo_bit_t HdrqOffset[11];
108 pseudo_bit_t Reserved2[8];
109 pseudo_bit_t IBErr[1];
110 pseudo_bit_t MKErr[1];
111 pseudo_bit_t TIDErr[1];
112 pseudo_bit_t KHdrErr[1];
113 pseudo_bit_t MTUErr[1];
114 pseudo_bit_t LenErr[1];
115 pseudo_bit_t ParityErr[1];
116 pseudo_bit_t VCRCErr[1];
117 pseudo_bit_t ICRCErr[1];
118 };
119 struct QIB_7220_RcvHdrFlags {
120 PSEUDO_BIT_STRUCT ( struct QIB_7220_RcvHdrFlags_pb );
121 };
122
123 /** Linda memory BAR size */
124 #define LINDA_BAR0_SIZE 0x400000
125
126 /** Linda I2C SCL line GPIO number */
127 #define LINDA_GPIO_SCL 0
128
129 /** Linda I2C SDA line GPIO number */
130 #define LINDA_GPIO_SDA 1
131
132 /** GUID offset within EEPROM */
133 #define LINDA_EEPROM_GUID_OFFSET 3
134
135 /** GUID size within EEPROM */
136 #define LINDA_EEPROM_GUID_SIZE 8
137
138 /** Board serial number offset within EEPROM */
139 #define LINDA_EEPROM_SERIAL_OFFSET 12
140
141 /** Board serial number size within EEPROM */
142 #define LINDA_EEPROM_SERIAL_SIZE 12
143
144 /** Maximum number of send buffers used
145 *
146 * This is a policy decision. Must be less than or equal to the total
147 * number of send buffers supported by the hardware (128).
148 */
149 #define LINDA_MAX_SEND_BUFS 32
150
151 /** Linda send buffer size */
152 #define LINDA_SEND_BUF_SIZE 4096
153
154 /** Number of contexts (including kernel context)
155 *
156 * This is a policy decision. Must be 5, 9 or 17.
157 */
158 #define LINDA_NUM_CONTEXTS 5
159
160 /** PortCfg values for different numbers of contexts */
161 enum linda_portcfg {
162 LINDA_PORTCFG_5CTX = 0,
163 LINDA_PORTCFG_9CTX = 1,
164 LINDA_PORTCFG_17CTX = 2,
165 };
166
167 /** PortCfg values for different numbers of contexts */
168 #define LINDA_EAGER_ARRAY_SIZE_5CTX_0 2048
169 #define LINDA_EAGER_ARRAY_SIZE_5CTX_OTHER 4096
170 #define LINDA_EAGER_ARRAY_SIZE_9CTX_0 2048
171 #define LINDA_EAGER_ARRAY_SIZE_9CTX_OTHER 2048
172 #define LINDA_EAGER_ARRAY_SIZE_17CTX_0 2048
173 #define LINDA_EAGER_ARRAY_SIZE_17CTX_OTHER 1024
174
175 /** Eager buffer required alignment */
176 #define LINDA_EAGER_BUFFER_ALIGN 2048
177
178 /** Eager buffer size encodings */
179 enum linda_eager_buffer_size {
180 LINDA_EAGER_BUFFER_NONE = 0,
181 LINDA_EAGER_BUFFER_2K = 1,
182 LINDA_EAGER_BUFFER_4K = 2,
183 LINDA_EAGER_BUFFER_8K = 3,
184 LINDA_EAGER_BUFFER_16K = 4,
185 LINDA_EAGER_BUFFER_32K = 5,
186 LINDA_EAGER_BUFFER_64K = 6,
187 };
188
189 /** Number of RX headers per context
190 *
191 * This is a policy decision.
192 */
193 #define LINDA_RECV_HEADER_COUNT 8
194
195 /** Maximum size of each RX header
196 *
197 * This is a policy decision. Must be divisible by 4.
198 */
199 #define LINDA_RECV_HEADER_SIZE 96
200
201 /** Total size of an RX header ring */
202 #define LINDA_RECV_HEADERS_SIZE \
203 ( LINDA_RECV_HEADER_SIZE * LINDA_RECV_HEADER_COUNT )
204
205 /** RX header alignment */
206 #define LINDA_RECV_HEADERS_ALIGN 64
207
208 /** RX payload size
209 *
210 * This is a policy decision. Must be a valid eager buffer size.
211 */
212 #define LINDA_RECV_PAYLOAD_SIZE 2048
213
214 /** QPN used for Infinipath Packets
215 *
216 * This is a policy decision. Must have bit 0 clear. Must not be a
217 * QPN that we will use.
218 */
219 #define LINDA_QP_IDETH 0xdead0
220
221 /** Maximum time for wait for external parallel bus request, in us */
222 #define LINDA_EPB_REQUEST_MAX_WAIT_US 500
223
224 /** Maximum time for wait for external parallel bus transaction, in us */
225 #define LINDA_EPB_XACT_MAX_WAIT_US 500
226
227 /** Linda external parallel bus chip selects */
228 #define LINDA_EPB_CS_SERDES 1
229 #define LINDA_EPB_CS_UC 2
230
231 /** Linda external parallel bus read/write operations */
232 #define LINDA_EPB_WRITE 0
233 #define LINDA_EPB_READ 1
234
235 /** Linda external parallel bus register addresses */
236 #define LINDA_EPB_ADDRESS( _channel, _element, _reg ) \
237 ( (_element) | ( (_channel) << 4 ) | ( (_reg) << 9 ) )
238 #define LINDA_EPB_ADDRESS_CHANNEL( _address ) ( ( (_address) >> 4 ) & 0x1f )
239 #define LINDA_EPB_ADDRESS_ELEMENT( _address ) ( ( (_address) >> 0 ) & 0x0f )
240 #define LINDA_EPB_ADDRESS_REG( _address ) ( ( (_address) >> 9 ) & 0x3f )
241
242 /** Linda external parallel bus locations
243 *
244 * The location is used by the driver to encode both the chip select
245 * and the EPB address.
246 */
247 #define LINDA_EPB_LOC( _cs, _channel, _element, _reg) \
248 ( ( (_cs) << 16 ) | LINDA_EPB_ADDRESS ( _channel, _element, _reg ) )
249 #define LINDA_EPB_LOC_ADDRESS( _loc ) ( (_loc) & 0xffff )
250 #define LINDA_EPB_LOC_CS( _loc ) ( (_loc) >> 16 )
251
252 /** Linda external parallel bus microcontroller register addresses */
253 #define LINDA_EPB_UC_CHANNEL 6
254 #define LINDA_EPB_UC_LOC( _reg ) \
255 LINDA_EPB_LOC ( LINDA_EPB_CS_UC, LINDA_EPB_UC_CHANNEL, 0, (_reg) )
256 #define LINDA_EPB_UC_CTL LINDA_EPB_UC_LOC ( 0 )
257 #define LINDA_EPB_UC_CTL_WRITE 1
258 #define LINDA_EPB_UC_CTL_READ 2
259 #define LINDA_EPB_UC_ADDR_LO LINDA_EPB_UC_LOC ( 2 )
260 #define LINDA_EPB_UC_ADDR_HI LINDA_EPB_UC_LOC ( 3 )
261 #define LINDA_EPB_UC_DATA LINDA_EPB_UC_LOC ( 4 )
262 #define LINDA_EPB_UC_CHUNK_SIZE 64
263
264 extern uint8_t linda_ib_fw[8192];
265
266 /** Maximum time to wait for "trim done" signal, in ms */
267 #define LINDA_TRIM_DONE_MAX_WAIT_MS 1000
268
269 /** Linda link states */
270 enum linda_link_state {
271 LINDA_LINK_STATE_DOWN = 0,
272 LINDA_LINK_STATE_INIT = 1,
273 LINDA_LINK_STATE_ARM = 2,
274 LINDA_LINK_STATE_ACTIVE = 3,
275 LINDA_LINK_STATE_ACT_DEFER = 4,
276 };
277
278 /** Maximum time to wait for link state changes, in us */
279 #define LINDA_LINK_STATE_MAX_WAIT_US 20
280
281 #endif /* _LINDA_H */