[intelx] Add support for Intel X552 NIC
[ipxe.git] / src / drivers / net / intelx.c
1 /*
2 * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of the
7 * License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
17 * 02110-1301, USA.
18 *
19 * You can also choose to distribute this program under the terms of
20 * the Unmodified Binary Distribution Licence (as given in the file
21 * COPYING.UBDL), provided that you have satisfied its requirements.
22 */
23
24 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
25
26 #include <stdint.h>
27 #include <string.h>
28 #include <unistd.h>
29 #include <errno.h>
30 #include <byteswap.h>
31 #include <ipxe/netdevice.h>
32 #include <ipxe/ethernet.h>
33 #include <ipxe/if_ether.h>
34 #include <ipxe/iobuf.h>
35 #include <ipxe/malloc.h>
36 #include <ipxe/pci.h>
37 #include "intelx.h"
38
39 /** @file
40 *
41 * Intel 10 Gigabit Ethernet network card driver
42 *
43 */
44
45 /******************************************************************************
46 *
47 * MAC address
48 *
49 ******************************************************************************
50 */
51
52 /**
53 * Try to fetch initial MAC address
54 *
55 * @v intel Intel device
56 * @v ral0 RAL0 register address
57 * @v hw_addr Hardware address to fill in
58 * @ret rc Return status code
59 */
60 static int intelx_try_fetch_mac ( struct intel_nic *intel, unsigned int ral0,
61 uint8_t *hw_addr ) {
62 union intel_receive_address mac;
63
64 /* Read current address from RAL0/RAH0 */
65 mac.reg.low = cpu_to_le32 ( readl ( intel->regs + ral0 ) );
66 mac.reg.high = cpu_to_le32 ( readl ( intel->regs + ral0 +
67 ( INTELX_RAH0 - INTELX_RAL0 ) ) );
68
69 /* Use current address if valid */
70 if ( is_valid_ether_addr ( mac.raw ) ) {
71 DBGC ( intel, "INTEL %p has autoloaded MAC address %s at "
72 "%#05x\n", intel, eth_ntoa ( mac.raw ), ral0 );
73 memcpy ( hw_addr, mac.raw, ETH_ALEN );
74 return 0;
75 }
76
77 return -ENOENT;
78 }
79
80 /**
81 * Fetch initial MAC address
82 *
83 * @v intel Intel device
84 * @v hw_addr Hardware address to fill in
85 * @ret rc Return status code
86 */
87 static int intelx_fetch_mac ( struct intel_nic *intel, uint8_t *hw_addr ) {
88 int rc;
89
90 /* Try to fetch address from INTELX_RAL0 */
91 if ( ( rc = intelx_try_fetch_mac ( intel, INTELX_RAL0,
92 hw_addr ) ) == 0 ) {
93 return 0;
94 }
95
96 /* Try to fetch address from INTELX_RAL0_ALT */
97 if ( ( rc = intelx_try_fetch_mac ( intel, INTELX_RAL0_ALT,
98 hw_addr ) ) == 0 ) {
99 return 0;
100 }
101
102 DBGC ( intel, "INTEL %p has no MAC address to use\n", intel );
103 return -ENOENT;
104 }
105
106 /******************************************************************************
107 *
108 * Device reset
109 *
110 ******************************************************************************
111 */
112
113 /**
114 * Reset hardware
115 *
116 * @v intel Intel device
117 * @ret rc Return status code
118 */
119 static int intelx_reset ( struct intel_nic *intel ) {
120 uint32_t ctrl;
121
122 /* Perform a global software reset */
123 ctrl = readl ( intel->regs + INTELX_CTRL );
124 writel ( ( ctrl | INTELX_CTRL_RST | INTELX_CTRL_LRST ),
125 intel->regs + INTELX_CTRL );
126 mdelay ( INTELX_RESET_DELAY_MS );
127
128 DBGC ( intel, "INTEL %p reset (ctrl %08x)\n", intel, ctrl );
129 return 0;
130 }
131
132 /******************************************************************************
133 *
134 * Link state
135 *
136 ******************************************************************************
137 */
138
139 /**
140 * Check link state
141 *
142 * @v netdev Network device
143 */
144 static void intelx_check_link ( struct net_device *netdev ) {
145 struct intel_nic *intel = netdev->priv;
146 uint32_t links;
147
148 /* Read link status */
149 links = readl ( intel->regs + INTELX_LINKS );
150 DBGC ( intel, "INTEL %p link status is %08x\n", intel, links );
151
152 /* Update network device */
153 if ( links & INTELX_LINKS_UP ) {
154 netdev_link_up ( netdev );
155 } else {
156 netdev_link_down ( netdev );
157 }
158 }
159
160 /******************************************************************************
161 *
162 * Network device interface
163 *
164 ******************************************************************************
165 */
166
167 /**
168 * Open network device
169 *
170 * @v netdev Network device
171 * @ret rc Return status code
172 */
173 static int intelx_open ( struct net_device *netdev ) {
174 struct intel_nic *intel = netdev->priv;
175 union intel_receive_address mac;
176 uint32_t ral0;
177 uint32_t rah0;
178 uint32_t dmatxctl;
179 uint32_t fctrl;
180 uint32_t srrctl;
181 uint32_t hlreg0;
182 uint32_t maxfrs;
183 uint32_t rdrxctl;
184 uint32_t rxctrl;
185 uint32_t dca_rxctrl;
186 int rc;
187
188 /* Create transmit descriptor ring */
189 if ( ( rc = intel_create_ring ( intel, &intel->tx ) ) != 0 )
190 goto err_create_tx;
191
192 /* Create receive descriptor ring */
193 if ( ( rc = intel_create_ring ( intel, &intel->rx ) ) != 0 )
194 goto err_create_rx;
195
196 /* Program MAC address */
197 memset ( &mac, 0, sizeof ( mac ) );
198 memcpy ( mac.raw, netdev->ll_addr, sizeof ( mac.raw ) );
199 ral0 = le32_to_cpu ( mac.reg.low );
200 rah0 = ( le32_to_cpu ( mac.reg.high ) | INTELX_RAH0_AV );
201 writel ( ral0, intel->regs + INTELX_RAL0 );
202 writel ( rah0, intel->regs + INTELX_RAH0 );
203 writel ( ral0, intel->regs + INTELX_RAL0_ALT );
204 writel ( rah0, intel->regs + INTELX_RAH0_ALT );
205
206 /* Allocate interrupt vectors */
207 writel ( ( INTELX_IVAR_RX0_DEFAULT | INTELX_IVAR_RX0_VALID |
208 INTELX_IVAR_TX0_DEFAULT | INTELX_IVAR_TX0_VALID ),
209 intel->regs + INTELX_IVAR );
210
211 /* Enable transmitter */
212 dmatxctl = readl ( intel->regs + INTELX_DMATXCTL );
213 dmatxctl |= INTELX_DMATXCTL_TE;
214 writel ( dmatxctl, intel->regs + INTELX_DMATXCTL );
215
216 /* Configure receive filter */
217 fctrl = readl ( intel->regs + INTELX_FCTRL );
218 fctrl |= ( INTELX_FCTRL_BAM | INTELX_FCTRL_UPE | INTELX_FCTRL_MPE );
219 writel ( fctrl, intel->regs + INTELX_FCTRL );
220
221 /* Configure receive buffer sizes */
222 srrctl = readl ( intel->regs + INTELX_SRRCTL );
223 srrctl &= ~INTELX_SRRCTL_BSIZE_MASK;
224 srrctl |= INTELX_SRRCTL_BSIZE_DEFAULT;
225 writel ( srrctl, intel->regs + INTELX_SRRCTL );
226
227 /* Configure jumbo frames. Required to allow the extra 4-byte
228 * headroom for VLANs, since we don't use the hardware's
229 * native VLAN offload.
230 */
231 hlreg0 = readl ( intel->regs + INTELX_HLREG0 );
232 hlreg0 |= INTELX_HLREG0_JUMBOEN;
233 writel ( hlreg0, intel->regs + INTELX_HLREG0 );
234
235 /* Configure frame size */
236 maxfrs = readl ( intel->regs + INTELX_MAXFRS );
237 maxfrs &= ~INTELX_MAXFRS_MFS_MASK;
238 maxfrs |= INTELX_MAXFRS_MFS_DEFAULT;
239 writel ( maxfrs, intel->regs + INTELX_MAXFRS );
240
241 /* Configure receive DMA */
242 rdrxctl = readl ( intel->regs + INTELX_RDRXCTL );
243 rdrxctl |= INTELX_RDRXCTL_SECRC;
244 writel ( rdrxctl, intel->regs + INTELX_RDRXCTL );
245
246 /* Clear "must-be-zero" bit for direct cache access (DCA). We
247 * leave DCA disabled anyway, but if we do not clear this bit
248 * then the received packets contain garbage data.
249 */
250 dca_rxctrl = readl ( intel->regs + INTELX_DCA_RXCTRL );
251 dca_rxctrl &= ~INTELX_DCA_RXCTRL_MUST_BE_ZERO;
252 writel ( dca_rxctrl, intel->regs + INTELX_DCA_RXCTRL );
253
254 /* Enable receiver */
255 rxctrl = readl ( intel->regs + INTELX_RXCTRL );
256 rxctrl |= INTELX_RXCTRL_RXEN;
257 writel ( rxctrl, intel->regs + INTELX_RXCTRL );
258
259 /* Fill receive ring */
260 intel_refill_rx ( intel );
261
262 /* Update link state */
263 intelx_check_link ( netdev );
264
265 return 0;
266
267 intel_destroy_ring ( intel, &intel->rx );
268 err_create_rx:
269 intel_destroy_ring ( intel, &intel->tx );
270 err_create_tx:
271 return rc;
272 }
273
274 /**
275 * Close network device
276 *
277 * @v netdev Network device
278 */
279 static void intelx_close ( struct net_device *netdev ) {
280 struct intel_nic *intel = netdev->priv;
281 uint32_t rxctrl;
282 uint32_t dmatxctl;
283
284 /* Disable receiver */
285 rxctrl = readl ( intel->regs + INTELX_RXCTRL );
286 rxctrl &= ~INTELX_RXCTRL_RXEN;
287 writel ( rxctrl, intel->regs + INTELX_RXCTRL );
288
289 /* Disable transmitter */
290 dmatxctl = readl ( intel->regs + INTELX_DMATXCTL );
291 dmatxctl &= ~INTELX_DMATXCTL_TE;
292 writel ( dmatxctl, intel->regs + INTELX_DMATXCTL );
293
294 /* Destroy receive descriptor ring */
295 intel_destroy_ring ( intel, &intel->rx );
296
297 /* Discard any unused receive buffers */
298 intel_empty_rx ( intel );
299
300 /* Destroy transmit descriptor ring */
301 intel_destroy_ring ( intel, &intel->tx );
302
303 /* Reset the NIC, to flush the transmit and receive FIFOs */
304 intelx_reset ( intel );
305 }
306
307 /**
308 * Poll for completed and received packets
309 *
310 * @v netdev Network device
311 */
312 static void intelx_poll ( struct net_device *netdev ) {
313 struct intel_nic *intel = netdev->priv;
314 uint32_t eicr;
315
316 /* Check for and acknowledge interrupts */
317 eicr = readl ( intel->regs + INTELX_EICR );
318 if ( ! eicr )
319 return;
320
321 /* Poll for TX completions, if applicable */
322 if ( eicr & INTELX_EIRQ_TX0 )
323 intel_poll_tx ( netdev );
324
325 /* Poll for RX completions, if applicable */
326 if ( eicr & ( INTELX_EIRQ_RX0 | INTELX_EIRQ_RXO ) )
327 intel_poll_rx ( netdev );
328
329 /* Report receive overruns */
330 if ( eicr & INTELX_EIRQ_RXO )
331 netdev_rx_err ( netdev, NULL, -ENOBUFS );
332
333 /* Check link state, if applicable */
334 if ( eicr & INTELX_EIRQ_LSC )
335 intelx_check_link ( netdev );
336
337 /* Refill RX ring */
338 intel_refill_rx ( intel );
339 }
340
341 /**
342 * Enable or disable interrupts
343 *
344 * @v netdev Network device
345 * @v enable Interrupts should be enabled
346 */
347 static void intelx_irq ( struct net_device *netdev, int enable ) {
348 struct intel_nic *intel = netdev->priv;
349 uint32_t mask;
350
351 mask = ( INTELX_EIRQ_LSC | INTELX_EIRQ_RXO | INTELX_EIRQ_TX0 |
352 INTELX_EIRQ_RX0 );
353 if ( enable ) {
354 writel ( mask, intel->regs + INTELX_EIMS );
355 } else {
356 writel ( mask, intel->regs + INTELX_EIMC );
357 }
358 }
359
360 /** Network device operations */
361 static struct net_device_operations intelx_operations = {
362 .open = intelx_open,
363 .close = intelx_close,
364 .transmit = intel_transmit,
365 .poll = intelx_poll,
366 .irq = intelx_irq,
367 };
368
369 /******************************************************************************
370 *
371 * PCI interface
372 *
373 ******************************************************************************
374 */
375
376 /**
377 * Probe PCI device
378 *
379 * @v pci PCI device
380 * @ret rc Return status code
381 */
382 static int intelx_probe ( struct pci_device *pci ) {
383 struct net_device *netdev;
384 struct intel_nic *intel;
385 int rc;
386
387 /* Allocate and initialise net device */
388 netdev = alloc_etherdev ( sizeof ( *intel ) );
389 if ( ! netdev ) {
390 rc = -ENOMEM;
391 goto err_alloc;
392 }
393 netdev_init ( netdev, &intelx_operations );
394 intel = netdev->priv;
395 pci_set_drvdata ( pci, netdev );
396 netdev->dev = &pci->dev;
397 memset ( intel, 0, sizeof ( *intel ) );
398 intel->port = PCI_FUNC ( pci->busdevfn );
399 intel_init_ring ( &intel->tx, INTEL_NUM_TX_DESC, INTELX_TD,
400 intel_describe_tx );
401 intel_init_ring ( &intel->rx, INTEL_NUM_RX_DESC, INTELX_RD,
402 intel_describe_rx );
403
404 /* Fix up PCI device */
405 adjust_pci_device ( pci );
406
407 /* Map registers */
408 intel->regs = ioremap ( pci->membase, INTEL_BAR_SIZE );
409 if ( ! intel->regs ) {
410 rc = -ENODEV;
411 goto err_ioremap;
412 }
413
414 /* Reset the NIC */
415 if ( ( rc = intelx_reset ( intel ) ) != 0 )
416 goto err_reset;
417
418 /* Fetch MAC address */
419 if ( ( rc = intelx_fetch_mac ( intel, netdev->hw_addr ) ) != 0 )
420 goto err_fetch_mac;
421
422 /* Register network device */
423 if ( ( rc = register_netdev ( netdev ) ) != 0 )
424 goto err_register_netdev;
425
426 /* Set initial link state */
427 intelx_check_link ( netdev );
428
429 return 0;
430
431 unregister_netdev ( netdev );
432 err_register_netdev:
433 err_fetch_mac:
434 intelx_reset ( intel );
435 err_reset:
436 iounmap ( intel->regs );
437 err_ioremap:
438 netdev_nullify ( netdev );
439 netdev_put ( netdev );
440 err_alloc:
441 return rc;
442 }
443
444 /**
445 * Remove PCI device
446 *
447 * @v pci PCI device
448 */
449 static void intelx_remove ( struct pci_device *pci ) {
450 struct net_device *netdev = pci_get_drvdata ( pci );
451 struct intel_nic *intel = netdev->priv;
452
453 /* Unregister network device */
454 unregister_netdev ( netdev );
455
456 /* Reset the NIC */
457 intelx_reset ( intel );
458
459 /* Free network device */
460 iounmap ( intel->regs );
461 netdev_nullify ( netdev );
462 netdev_put ( netdev );
463 }
464
465 /** PCI device IDs */
466 static struct pci_device_id intelx_nics[] = {
467 PCI_ROM ( 0x8086, 0x10f7, "82599-kx4", "82599 (KX/KX4)", 0 ),
468 PCI_ROM ( 0x8086, 0x10f8, "82599-combo-backplane", "82599 (combined backplane; KR/KX4/KX)", 0 ),
469 PCI_ROM ( 0x8086, 0x10f9, "82599-cx4", "82599 (CX4)", 0 ),
470 PCI_ROM ( 0x8086, 0x10fb, "82599-sfp", "82599 (SFI/SFP+)", 0 ),
471 PCI_ROM ( 0x8086, 0x10fc, "82599-xaui", "82599 (XAUI/BX4)", 0 ),
472 PCI_ROM ( 0x8086, 0x1528, "x540t", "X540-AT2/X540-BT2", 0 ),
473 PCI_ROM ( 0x8086, 0x154d, "82599-sfp-sf2", "82599 (SFI/SFP+)", 0 ),
474 PCI_ROM ( 0x8086, 0x1557, "82599en-sfp", "82599 (Single Port SFI Only)", 0 ),
475 PCI_ROM ( 0x8086, 0x1560, "x540t1", "X540-AT2/X540-BT2 (with single port NVM)", 0 ),
476 PCI_ROM ( 0x8086, 0x1563, "x550t2", "X550-T2", 0 ),
477 PCI_ROM ( 0x8086, 0x15ab, "x552", "X552", 0 ),
478 PCI_ROM ( 0x8086, 0x15e5, "x553", "X553", 0 ),
479 };
480
481 /** PCI driver */
482 struct pci_driver intelx_driver __pci_driver = {
483 .ids = intelx_nics,
484 .id_count = ( sizeof ( intelx_nics ) / sizeof ( intelx_nics[0] ) ),
485 .probe = intelx_probe,
486 .remove = intelx_remove,
487 };