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[efi] Implement the EFI_PXE_BASE_CODE_PROTOCOL
[ipxe.git] / src / drivers / usb / ehci.c
1 /*
2 * Copyright (C) 2014 Michael Brown <mbrown@fensystems.co.uk>.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of the
7 * License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
17 * 02110-1301, USA.
18 *
19 * You can also choose to distribute this program under the terms of
20 * the Unmodified Binary Distribution Licence (as given in the file
21 * COPYING.UBDL), provided that you have satisfied its requirements.
22 */
23
24 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
25
26 #include <stdlib.h>
27 #include <unistd.h>
28 #include <string.h>
29 #include <strings.h>
30 #include <errno.h>
31 #include <byteswap.h>
32 #include <ipxe/malloc.h>
33 #include <ipxe/pci.h>
34 #include <ipxe/usb.h>
35 #include <ipxe/init.h>
36 #include "ehci.h"
37
38 /** @file
39 *
40 * USB Enhanced Host Controller Interface (EHCI) driver
41 *
42 */
43
44 /**
45 * Construct error code from transfer descriptor status
46 *
47 * @v status Transfer descriptor status
48 * @ret rc Error code
49 *
50 * Bits 2-5 of the status code provide some indication as to the root
51 * cause of the error. We incorporate these into the error code as
52 * reported to usb_complete_err().
53 */
54 #define EIO_STATUS( status ) EUNIQ ( EINFO_EIO, ( ( (status) >> 2 ) & 0xf ) )
55
56 /******************************************************************************
57 *
58 * Register access
59 *
60 ******************************************************************************
61 */
62
63 /**
64 * Initialise device
65 *
66 * @v ehci EHCI device
67 * @v regs MMIO registers
68 */
69 static void ehci_init ( struct ehci_device *ehci, void *regs ) {
70 uint32_t hcsparams;
71 uint32_t hccparams;
72 size_t caplength;
73
74 /* Locate capability and operational registers */
75 ehci->cap = regs;
76 caplength = readb ( ehci->cap + EHCI_CAP_CAPLENGTH );
77 ehci->op = ( ehci->cap + caplength );
78 DBGC2 ( ehci, "EHCI %s cap %08lx op %08lx\n", ehci->name,
79 virt_to_phys ( ehci->cap ), virt_to_phys ( ehci->op ) );
80
81 /* Read structural parameters */
82 hcsparams = readl ( ehci->cap + EHCI_CAP_HCSPARAMS );
83 ehci->ports = EHCI_HCSPARAMS_PORTS ( hcsparams );
84 DBGC ( ehci, "EHCI %s has %d ports\n", ehci->name, ehci->ports );
85
86 /* Read capability parameters 1 */
87 hccparams = readl ( ehci->cap + EHCI_CAP_HCCPARAMS );
88 ehci->addr64 = EHCI_HCCPARAMS_ADDR64 ( hccparams );
89 ehci->flsize = ( EHCI_HCCPARAMS_FLSIZE ( hccparams ) ?
90 EHCI_FLSIZE_SMALL : EHCI_FLSIZE_DEFAULT );
91 ehci->eecp = EHCI_HCCPARAMS_EECP ( hccparams );
92 DBGC2 ( ehci, "EHCI %s %d-bit flsize %d\n", ehci->name,
93 ( ehci->addr64 ? 64 : 32 ), ehci->flsize );
94 }
95
96 /**
97 * Find extended capability
98 *
99 * @v ehci EHCI device
100 * @v pci PCI device
101 * @v id Capability ID
102 * @v offset Offset to previous extended capability instance, or zero
103 * @ret offset Offset to extended capability, or zero if not found
104 */
105 static unsigned int ehci_extended_capability ( struct ehci_device *ehci,
106 struct pci_device *pci,
107 unsigned int id,
108 unsigned int offset ) {
109 uint32_t eecp;
110
111 /* Locate the extended capability */
112 while ( 1 ) {
113
114 /* Locate first or next capability as applicable */
115 if ( offset ) {
116 pci_read_config_dword ( pci, offset, &eecp );
117 offset = EHCI_EECP_NEXT ( eecp );
118 } else {
119 offset = ehci->eecp;
120 }
121 if ( ! offset )
122 return 0;
123
124 /* Check if this is the requested capability */
125 pci_read_config_dword ( pci, offset, &eecp );
126 if ( EHCI_EECP_ID ( eecp ) == id )
127 return offset;
128 }
129 }
130
131 /**
132 * Calculate buffer alignment
133 *
134 * @v len Length
135 * @ret align Buffer alignment
136 *
137 * Determine alignment required for a buffer which must be aligned to
138 * at least EHCI_MIN_ALIGN and which must not cross a page boundary.
139 */
140 static inline size_t ehci_align ( size_t len ) {
141 size_t align;
142
143 /* Align to own length (rounded up to a power of two) */
144 align = ( 1 << fls ( len - 1 ) );
145
146 /* Round up to EHCI_MIN_ALIGN if needed */
147 if ( align < EHCI_MIN_ALIGN )
148 align = EHCI_MIN_ALIGN;
149
150 return align;
151 }
152
153 /**
154 * Check control data structure reachability
155 *
156 * @v ehci EHCI device
157 * @v ptr Data structure pointer
158 * @ret rc Return status code
159 */
160 static int ehci_ctrl_reachable ( struct ehci_device *ehci, void *ptr ) {
161 physaddr_t phys = virt_to_phys ( ptr );
162 uint32_t segment;
163
164 /* Always reachable in a 32-bit build */
165 if ( sizeof ( physaddr_t ) <= sizeof ( uint32_t ) )
166 return 0;
167
168 /* Reachable only if control segment matches in a 64-bit build */
169 segment = ( ( ( uint64_t ) phys ) >> 32 );
170 if ( segment == ehci->ctrldssegment )
171 return 0;
172
173 return -ENOTSUP;
174 }
175
176 /******************************************************************************
177 *
178 * USB legacy support
179 *
180 ******************************************************************************
181 */
182
183 /** Prevent the release of ownership back to BIOS */
184 static int ehci_legacy_prevent_release;
185
186 /**
187 * Initialise USB legacy support
188 *
189 * @v ehci EHCI device
190 * @v pci PCI device
191 */
192 static void ehci_legacy_init ( struct ehci_device *ehci,
193 struct pci_device *pci ) {
194 unsigned int legacy;
195 uint8_t bios;
196
197 /* Locate USB legacy support capability (if present) */
198 legacy = ehci_extended_capability ( ehci, pci, EHCI_EECP_ID_LEGACY, 0 );
199 if ( ! legacy ) {
200 /* Not an error; capability may not be present */
201 DBGC ( ehci, "EHCI %s has no USB legacy support capability\n",
202 ehci->name );
203 return;
204 }
205
206 /* Check if legacy USB support is enabled */
207 pci_read_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_BIOS ), &bios );
208 if ( ! ( bios & EHCI_USBLEGSUP_BIOS_OWNED ) ) {
209 /* Not an error; already owned by OS */
210 DBGC ( ehci, "EHCI %s USB legacy support already disabled\n",
211 ehci->name );
212 return;
213 }
214
215 /* Record presence of USB legacy support capability */
216 ehci->legacy = legacy;
217 }
218
219 /**
220 * Claim ownership from BIOS
221 *
222 * @v ehci EHCI device
223 * @v pci PCI device
224 */
225 static void ehci_legacy_claim ( struct ehci_device *ehci,
226 struct pci_device *pci ) {
227 unsigned int legacy = ehci->legacy;
228 uint32_t ctlsts;
229 uint8_t bios;
230 unsigned int i;
231
232 /* Do nothing unless legacy support capability is present */
233 if ( ! legacy )
234 return;
235
236 /* Claim ownership */
237 pci_write_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_OS ),
238 EHCI_USBLEGSUP_OS_OWNED );
239
240 /* Wait for BIOS to release ownership */
241 for ( i = 0 ; i < EHCI_USBLEGSUP_MAX_WAIT_MS ; i++ ) {
242
243 /* Check if BIOS has released ownership */
244 pci_read_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_BIOS ),
245 &bios );
246 if ( ! ( bios & EHCI_USBLEGSUP_BIOS_OWNED ) ) {
247 DBGC ( ehci, "EHCI %s claimed ownership from BIOS\n",
248 ehci->name );
249 pci_read_config_dword ( pci, ( legacy +
250 EHCI_USBLEGSUP_CTLSTS ),
251 &ctlsts );
252 if ( ctlsts ) {
253 DBGC ( ehci, "EHCI %s warning: BIOS retained "
254 "SMIs: %08x\n", ehci->name, ctlsts );
255 }
256 return;
257 }
258
259 /* Delay */
260 mdelay ( 1 );
261 }
262
263 /* BIOS did not release ownership. Claim it forcibly by
264 * disabling all SMIs.
265 */
266 DBGC ( ehci, "EHCI %s could not claim ownership from BIOS: forcibly "
267 "disabling SMIs\n", ehci->name );
268 pci_write_config_dword ( pci, ( legacy + EHCI_USBLEGSUP_CTLSTS ), 0 );
269 }
270
271 /**
272 * Release ownership back to BIOS
273 *
274 * @v ehci EHCI device
275 * @v pci PCI device
276 */
277 static void ehci_legacy_release ( struct ehci_device *ehci,
278 struct pci_device *pci ) {
279
280 /* Do nothing unless legacy support capability is present */
281 if ( ! ehci->legacy )
282 return;
283
284 /* Do nothing if releasing ownership is prevented */
285 if ( ehci_legacy_prevent_release ) {
286 DBGC ( ehci, "EHCI %s not releasing ownership to BIOS\n",
287 ehci->name );
288 return;
289 }
290
291 /* Release ownership */
292 pci_write_config_byte ( pci, ( ehci->legacy + EHCI_USBLEGSUP_OS ), 0 );
293 DBGC ( ehci, "EHCI %s released ownership to BIOS\n", ehci->name );
294 }
295
296 /******************************************************************************
297 *
298 * Companion controllers
299 *
300 ******************************************************************************
301 */
302
303 /**
304 * Poll child companion controllers
305 *
306 * @v ehci EHCI device
307 */
308 static void ehci_poll_companions ( struct ehci_device *ehci ) {
309 struct usb_bus *bus;
310 struct device_description *desc;
311
312 /* Poll any USB buses belonging to child companion controllers */
313 for_each_usb_bus ( bus ) {
314
315 /* Get underlying devices description */
316 desc = &bus->dev->desc;
317
318 /* Skip buses that are not PCI devices */
319 if ( desc->bus_type != BUS_TYPE_PCI )
320 continue;
321
322 /* Skip buses that are not part of the same PCI device */
323 if ( PCI_FIRST_FUNC ( desc->location ) !=
324 PCI_FIRST_FUNC ( ehci->bus->dev->desc.location ) )
325 continue;
326
327 /* Skip buses that are not UHCI or OHCI PCI devices */
328 if ( ( desc->class != PCI_CLASS ( PCI_CLASS_SERIAL,
329 PCI_CLASS_SERIAL_USB,
330 PCI_CLASS_SERIAL_USB_UHCI ))&&
331 ( desc->class != PCI_CLASS ( PCI_CLASS_SERIAL,
332 PCI_CLASS_SERIAL_USB,
333 PCI_CLASS_SERIAL_USB_OHCI ) ))
334 continue;
335
336 /* Poll child companion controller bus */
337 DBGC2 ( ehci, "EHCI %s polling companion %s\n",
338 ehci->name, bus->name );
339 usb_poll ( bus );
340 }
341 }
342
343 /**
344 * Locate EHCI companion controller
345 *
346 * @v pci PCI device
347 * @ret busdevfn EHCI companion controller bus:dev.fn (if any)
348 */
349 unsigned int ehci_companion ( struct pci_device *pci ) {
350 struct pci_device tmp;
351 unsigned int busdevfn;
352 int rc;
353
354 /* Look for an EHCI function on the same PCI device */
355 busdevfn = pci->busdevfn;
356 while ( ++busdevfn <= PCI_LAST_FUNC ( pci->busdevfn ) ) {
357 pci_init ( &tmp, busdevfn );
358 if ( ( rc = pci_read_config ( &tmp ) ) != 0 )
359 continue;
360 if ( tmp.class == PCI_CLASS ( PCI_CLASS_SERIAL,
361 PCI_CLASS_SERIAL_USB,
362 PCI_CLASS_SERIAL_USB_EHCI ) )
363 return busdevfn;
364 }
365
366 return 0;
367 }
368
369 /******************************************************************************
370 *
371 * Run / stop / reset
372 *
373 ******************************************************************************
374 */
375
376 /**
377 * Start EHCI device
378 *
379 * @v ehci EHCI device
380 */
381 static void ehci_run ( struct ehci_device *ehci ) {
382 uint32_t usbcmd;
383
384 /* Set run/stop bit */
385 usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
386 usbcmd &= ~EHCI_USBCMD_FLSIZE_MASK;
387 usbcmd |= ( EHCI_USBCMD_RUN | EHCI_USBCMD_FLSIZE ( ehci->flsize ) |
388 EHCI_USBCMD_PERIODIC | EHCI_USBCMD_ASYNC );
389 writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
390 }
391
392 /**
393 * Stop EHCI device
394 *
395 * @v ehci EHCI device
396 * @ret rc Return status code
397 */
398 static int ehci_stop ( struct ehci_device *ehci ) {
399 uint32_t usbcmd;
400 uint32_t usbsts;
401 unsigned int i;
402
403 /* Clear run/stop bit */
404 usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
405 usbcmd &= ~( EHCI_USBCMD_RUN | EHCI_USBCMD_PERIODIC |
406 EHCI_USBCMD_ASYNC );
407 writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
408
409 /* Wait for device to stop */
410 for ( i = 0 ; i < EHCI_STOP_MAX_WAIT_MS ; i++ ) {
411
412 /* Check if device is stopped */
413 usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
414 if ( usbsts & EHCI_USBSTS_HCH )
415 return 0;
416
417 /* Delay */
418 mdelay ( 1 );
419 }
420
421 DBGC ( ehci, "EHCI %s timed out waiting for stop\n", ehci->name );
422 return -ETIMEDOUT;
423 }
424
425 /**
426 * Reset EHCI device
427 *
428 * @v ehci EHCI device
429 * @ret rc Return status code
430 */
431 static int ehci_reset ( struct ehci_device *ehci ) {
432 uint32_t usbcmd;
433 unsigned int i;
434 int rc;
435
436 /* The EHCI specification states that resetting a running
437 * device may result in undefined behaviour, so try stopping
438 * it first.
439 */
440 if ( ( rc = ehci_stop ( ehci ) ) != 0 ) {
441 /* Ignore errors and attempt to reset the device anyway */
442 }
443
444 /* Reset device */
445 writel ( EHCI_USBCMD_HCRST, ehci->op + EHCI_OP_USBCMD );
446
447 /* Wait for reset to complete */
448 for ( i = 0 ; i < EHCI_RESET_MAX_WAIT_MS ; i++ ) {
449
450 /* Check if reset is complete */
451 usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
452 if ( ! ( usbcmd & EHCI_USBCMD_HCRST ) )
453 return 0;
454
455 /* Delay */
456 mdelay ( 1 );
457 }
458
459 DBGC ( ehci, "EHCI %s timed out waiting for reset\n", ehci->name );
460 return -ETIMEDOUT;
461 }
462
463 /******************************************************************************
464 *
465 * Transfer descriptor rings
466 *
467 ******************************************************************************
468 */
469
470 /**
471 * Allocate transfer descriptor ring
472 *
473 * @v ehci EHCI device
474 * @v ring Transfer descriptor ring
475 * @ret rc Return status code
476 */
477 static int ehci_ring_alloc ( struct ehci_device *ehci,
478 struct ehci_ring *ring ) {
479 struct ehci_transfer_descriptor *desc;
480 struct ehci_transfer_descriptor *next;
481 unsigned int i;
482 size_t len;
483 uint32_t link;
484 int rc;
485
486 /* Initialise structure */
487 memset ( ring, 0, sizeof ( *ring ) );
488
489 /* Allocate I/O buffers */
490 ring->iobuf = zalloc ( EHCI_RING_COUNT * sizeof ( ring->iobuf[0] ) );
491 if ( ! ring->iobuf ) {
492 rc = -ENOMEM;
493 goto err_alloc_iobuf;
494 }
495
496 /* Allocate queue head */
497 ring->head = malloc_dma ( sizeof ( *ring->head ),
498 ehci_align ( sizeof ( *ring->head ) ) );
499 if ( ! ring->head ) {
500 rc = -ENOMEM;
501 goto err_alloc_queue;
502 }
503 if ( ( rc = ehci_ctrl_reachable ( ehci, ring->head ) ) != 0 ) {
504 DBGC ( ehci, "EHCI %s queue head unreachable\n", ehci->name );
505 goto err_unreachable_queue;
506 }
507 memset ( ring->head, 0, sizeof ( *ring->head ) );
508
509 /* Allocate transfer descriptors */
510 len = ( EHCI_RING_COUNT * sizeof ( ring->desc[0] ) );
511 ring->desc = malloc_dma ( len, sizeof ( ring->desc[0] ) );
512 if ( ! ring->desc ) {
513 rc = -ENOMEM;
514 goto err_alloc_desc;
515 }
516 memset ( ring->desc, 0, len );
517
518 /* Initialise transfer descriptors */
519 for ( i = 0 ; i < EHCI_RING_COUNT ; i++ ) {
520 desc = &ring->desc[i];
521 if ( ( rc = ehci_ctrl_reachable ( ehci, desc ) ) != 0 ) {
522 DBGC ( ehci, "EHCI %s descriptor unreachable\n",
523 ehci->name );
524 goto err_unreachable_desc;
525 }
526 next = &ring->desc[ ( i + 1 ) % EHCI_RING_COUNT ];
527 link = virt_to_phys ( next );
528 desc->next = cpu_to_le32 ( link );
529 desc->alt = cpu_to_le32 ( link );
530 }
531
532 /* Initialise queue head */
533 link = virt_to_phys ( &ring->desc[0] );
534 ring->head->cache.next = cpu_to_le32 ( link );
535
536 return 0;
537
538 err_unreachable_desc:
539 free_dma ( ring->desc, len );
540 err_alloc_desc:
541 err_unreachable_queue:
542 free_dma ( ring->head, sizeof ( *ring->head ) );
543 err_alloc_queue:
544 free ( ring->iobuf );
545 err_alloc_iobuf:
546 return rc;
547 }
548
549 /**
550 * Free transfer descriptor ring
551 *
552 * @v ring Transfer descriptor ring
553 */
554 static void ehci_ring_free ( struct ehci_ring *ring ) {
555 unsigned int i;
556
557 /* Sanity checks */
558 assert ( ehci_ring_fill ( ring ) == 0 );
559 for ( i = 0 ; i < EHCI_RING_COUNT ; i++ )
560 assert ( ring->iobuf[i] == NULL );
561
562 /* Free transfer descriptors */
563 free_dma ( ring->desc, ( EHCI_RING_COUNT * sizeof ( ring->desc[0] ) ) );
564
565 /* Free queue head */
566 free_dma ( ring->head, sizeof ( *ring->head ) );
567
568 /* Free I/O buffers */
569 free ( ring->iobuf );
570 }
571
572 /**
573 * Enqueue transfer descriptors
574 *
575 * @v ehci EHCI device
576 * @v ring Transfer descriptor ring
577 * @v iobuf I/O buffer
578 * @v xfers Transfers
579 * @v count Number of transfers
580 * @ret rc Return status code
581 */
582 static int ehci_enqueue ( struct ehci_device *ehci, struct ehci_ring *ring,
583 struct io_buffer *iobuf,
584 const struct ehci_transfer *xfer,
585 unsigned int count ) {
586 struct ehci_transfer_descriptor *desc;
587 physaddr_t phys;
588 void *data;
589 size_t len;
590 size_t offset;
591 size_t frag_len;
592 unsigned int toggle;
593 unsigned int index;
594 unsigned int i;
595
596 /* Sanity check */
597 assert ( iobuf != NULL );
598 assert ( count > 0 );
599
600 /* Fail if ring does not have sufficient space */
601 if ( ehci_ring_remaining ( ring ) < count )
602 return -ENOBUFS;
603
604 /* Fail if any portion is unreachable */
605 for ( i = 0 ; i < count ; i++ ) {
606 phys = ( virt_to_phys ( xfer[i].data ) + xfer[i].len - 1 );
607 if ( ( phys > 0xffffffffUL ) && ( ! ehci->addr64 ) )
608 return -ENOTSUP;
609 }
610
611 /* Enqueue each transfer, recording the I/O buffer with the last */
612 for ( ; count ; ring->prod++, xfer++ ) {
613
614 /* Populate descriptor header */
615 index = ( ring->prod % EHCI_RING_COUNT );
616 desc = &ring->desc[index];
617 toggle = ( xfer->flags & EHCI_FL_TOGGLE );
618 assert ( xfer->len <= EHCI_LEN_MASK );
619 assert ( EHCI_FL_TOGGLE == EHCI_LEN_TOGGLE );
620 desc->len = cpu_to_le16 ( xfer->len | toggle );
621 desc->flags = ( xfer->flags | EHCI_FL_CERR_MAX );
622
623 /* Populate buffer pointers */
624 data = xfer->data;
625 len = xfer->len;
626 for ( i = 0 ; len ; i++ ) {
627
628 /* Calculate length of this fragment */
629 phys = virt_to_phys ( data );
630 offset = ( phys & ( EHCI_PAGE_ALIGN - 1 ) );
631 frag_len = ( EHCI_PAGE_ALIGN - offset );
632 if ( frag_len > len )
633 frag_len = len;
634
635 /* Sanity checks */
636 assert ( ( i == 0 ) || ( offset == 0 ) );
637 assert ( i < ( sizeof ( desc->low ) /
638 sizeof ( desc->low[0] ) ) );
639
640 /* Populate buffer pointer */
641 desc->low[i] = cpu_to_le32 ( phys );
642 if ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) ) {
643 desc->high[i] =
644 cpu_to_le32 ( ((uint64_t) phys) >> 32 );
645 }
646
647 /* Move to next fragment */
648 data += frag_len;
649 len -= frag_len;
650 }
651
652 /* Ensure everything is valid before activating descriptor */
653 wmb();
654 desc->status = EHCI_STATUS_ACTIVE;
655
656 /* Record I/O buffer against last ring index */
657 if ( --count == 0 )
658 ring->iobuf[index] = iobuf;
659 }
660
661 return 0;
662 }
663
664 /**
665 * Dequeue a transfer descriptor
666 *
667 * @v ring Transfer descriptor ring
668 * @ret iobuf I/O buffer (or NULL)
669 */
670 static struct io_buffer * ehci_dequeue ( struct ehci_ring *ring ) {
671 struct ehci_transfer_descriptor *desc;
672 struct io_buffer *iobuf;
673 unsigned int index = ( ring->cons % EHCI_RING_COUNT );
674
675 /* Sanity check */
676 assert ( ehci_ring_fill ( ring ) > 0 );
677
678 /* Mark descriptor as inactive (and not halted) */
679 desc = &ring->desc[index];
680 desc->status = 0;
681
682 /* Retrieve I/O buffer */
683 iobuf = ring->iobuf[index];
684 ring->iobuf[index] = NULL;
685
686 /* Update consumer counter */
687 ring->cons++;
688
689 return iobuf;
690 }
691
692 /******************************************************************************
693 *
694 * Schedule management
695 *
696 ******************************************************************************
697 */
698
699 /**
700 * Get link value for a queue head
701 *
702 * @v queue Queue head
703 * @ret link Link value
704 */
705 static inline uint32_t ehci_link_qh ( struct ehci_queue_head *queue ) {
706
707 return ( virt_to_phys ( queue ) | EHCI_LINK_TYPE_QH );
708 }
709
710 /**
711 * (Re)build asynchronous schedule
712 *
713 * @v ehci EHCI device
714 */
715 static void ehci_async_schedule ( struct ehci_device *ehci ) {
716 struct ehci_endpoint *endpoint;
717 struct ehci_queue_head *queue;
718 uint32_t link;
719
720 /* Build schedule in reverse order of execution. Provided
721 * that we only ever add or remove single endpoints, this can
722 * safely run concurrently with hardware execution of the
723 * schedule.
724 */
725 link = ehci_link_qh ( ehci->head );
726 list_for_each_entry_reverse ( endpoint, &ehci->async, schedule ) {
727 queue = endpoint->ring.head;
728 queue->link = cpu_to_le32 ( link );
729 wmb();
730 link = ehci_link_qh ( queue );
731 }
732 ehci->head->link = cpu_to_le32 ( link );
733 wmb();
734 }
735
736 /**
737 * Add endpoint to asynchronous schedule
738 *
739 * @v endpoint Endpoint
740 */
741 static void ehci_async_add ( struct ehci_endpoint *endpoint ) {
742 struct ehci_device *ehci = endpoint->ehci;
743
744 /* Add to end of schedule */
745 list_add_tail ( &endpoint->schedule, &ehci->async );
746
747 /* Rebuild schedule */
748 ehci_async_schedule ( ehci );
749 }
750
751 /**
752 * Remove endpoint from asynchronous schedule
753 *
754 * @v endpoint Endpoint
755 * @ret rc Return status code
756 */
757 static int ehci_async_del ( struct ehci_endpoint *endpoint ) {
758 struct ehci_device *ehci = endpoint->ehci;
759 uint32_t usbcmd;
760 uint32_t usbsts;
761 unsigned int i;
762
763 /* Remove from schedule */
764 list_check_contains_entry ( endpoint, &ehci->async, schedule );
765 list_del ( &endpoint->schedule );
766
767 /* Rebuild schedule */
768 ehci_async_schedule ( ehci );
769
770 /* Request notification when asynchronous schedule advances */
771 usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
772 usbcmd |= EHCI_USBCMD_ASYNC_ADVANCE;
773 writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
774
775 /* Wait for asynchronous schedule to advance */
776 for ( i = 0 ; i < EHCI_ASYNC_ADVANCE_MAX_WAIT_MS ; i++ ) {
777
778 /* Check for asynchronous schedule advancing */
779 usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
780 if ( usbsts & EHCI_USBSTS_ASYNC_ADVANCE ) {
781 usbsts &= ~EHCI_USBSTS_CHANGE;
782 usbsts |= EHCI_USBSTS_ASYNC_ADVANCE;
783 writel ( usbsts, ehci->op + EHCI_OP_USBSTS );
784 return 0;
785 }
786
787 /* Delay */
788 mdelay ( 1 );
789 }
790
791 /* Bad things will probably happen now */
792 DBGC ( ehci, "EHCI %s timed out waiting for asynchronous schedule "
793 "to advance\n", ehci->name );
794 return -ETIMEDOUT;
795 }
796
797 /**
798 * (Re)build periodic schedule
799 *
800 * @v ehci EHCI device
801 */
802 static void ehci_periodic_schedule ( struct ehci_device *ehci ) {
803 struct ehci_endpoint *endpoint;
804 struct ehci_queue_head *queue;
805 uint32_t link;
806 unsigned int frames;
807 unsigned int max_interval;
808 unsigned int i;
809
810 /* Build schedule in reverse order of execution. Provided
811 * that we only ever add or remove single endpoints, this can
812 * safely run concurrently with hardware execution of the
813 * schedule.
814 */
815 DBGCP ( ehci, "EHCI %s periodic schedule: ", ehci->name );
816 link = EHCI_LINK_TERMINATE;
817 list_for_each_entry_reverse ( endpoint, &ehci->periodic, schedule ) {
818 queue = endpoint->ring.head;
819 queue->link = cpu_to_le32 ( link );
820 wmb();
821 DBGCP ( ehci, "%s%d",
822 ( ( link == EHCI_LINK_TERMINATE ) ? "" : "<-" ),
823 endpoint->ep->interval );
824 link = ehci_link_qh ( queue );
825 }
826 DBGCP ( ehci, "\n" );
827
828 /* Populate periodic frame list */
829 DBGCP ( ehci, "EHCI %s periodic frame list:", ehci->name );
830 frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
831 for ( i = 0 ; i < frames ; i++ ) {
832
833 /* Calculate maximum interval (in microframes) which
834 * may appear as part of this frame list.
835 */
836 if ( i == 0 ) {
837 /* Start of list: include all endpoints */
838 max_interval = -1U;
839 } else {
840 /* Calculate highest power-of-two frame interval */
841 max_interval = ( 1 << ( ffs ( i ) - 1 ) );
842 /* Convert to microframes */
843 max_interval <<= 3;
844 /* Round up to nearest 2^n-1 */
845 max_interval = ( ( max_interval << 1 ) - 1 );
846 }
847
848 /* Find first endpoint in schedule satisfying this
849 * maximum interval constraint.
850 */
851 link = EHCI_LINK_TERMINATE;
852 list_for_each_entry ( endpoint, &ehci->periodic, schedule ) {
853 if ( endpoint->ep->interval <= max_interval ) {
854 queue = endpoint->ring.head;
855 link = ehci_link_qh ( queue );
856 DBGCP ( ehci, " %d:%d",
857 i, endpoint->ep->interval );
858 break;
859 }
860 }
861 ehci->frame[i].link = cpu_to_le32 ( link );
862 }
863 wmb();
864 DBGCP ( ehci, "\n" );
865 }
866
867 /**
868 * Add endpoint to periodic schedule
869 *
870 * @v endpoint Endpoint
871 */
872 static void ehci_periodic_add ( struct ehci_endpoint *endpoint ) {
873 struct ehci_device *ehci = endpoint->ehci;
874 struct ehci_endpoint *before;
875 unsigned int interval = endpoint->ep->interval;
876
877 /* Find first endpoint with a smaller interval */
878 list_for_each_entry ( before, &ehci->periodic, schedule ) {
879 if ( before->ep->interval < interval )
880 break;
881 }
882 list_add_tail ( &endpoint->schedule, &before->schedule );
883
884 /* Rebuild schedule */
885 ehci_periodic_schedule ( ehci );
886 }
887
888 /**
889 * Remove endpoint from periodic schedule
890 *
891 * @v endpoint Endpoint
892 * @ret rc Return status code
893 */
894 static int ehci_periodic_del ( struct ehci_endpoint *endpoint ) {
895 struct ehci_device *ehci = endpoint->ehci;
896
897 /* Remove from schedule */
898 list_check_contains_entry ( endpoint, &ehci->periodic, schedule );
899 list_del ( &endpoint->schedule );
900
901 /* Rebuild schedule */
902 ehci_periodic_schedule ( ehci );
903
904 /* Delay for a whole USB frame (with a 100% safety margin) */
905 mdelay ( 2 );
906
907 return 0;
908 }
909
910 /**
911 * Add endpoint to appropriate schedule
912 *
913 * @v endpoint Endpoint
914 */
915 static void ehci_schedule_add ( struct ehci_endpoint *endpoint ) {
916 struct usb_endpoint *ep = endpoint->ep;
917 unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
918
919 if ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) {
920 ehci_periodic_add ( endpoint );
921 } else {
922 ehci_async_add ( endpoint );
923 }
924 }
925
926 /**
927 * Remove endpoint from appropriate schedule
928 *
929 * @v endpoint Endpoint
930 * @ret rc Return status code
931 */
932 static int ehci_schedule_del ( struct ehci_endpoint *endpoint ) {
933 struct usb_endpoint *ep = endpoint->ep;
934 unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
935
936 if ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) {
937 return ehci_periodic_del ( endpoint );
938 } else {
939 return ehci_async_del ( endpoint );
940 }
941 }
942
943 /******************************************************************************
944 *
945 * Endpoint operations
946 *
947 ******************************************************************************
948 */
949
950 /**
951 * Determine endpoint characteristics
952 *
953 * @v ep USB endpoint
954 * @ret chr Endpoint characteristics
955 */
956 static uint32_t ehci_endpoint_characteristics ( struct usb_endpoint *ep ) {
957 struct usb_device *usb = ep->usb;
958 unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
959 uint32_t chr;
960
961 /* Determine basic characteristics */
962 chr = ( EHCI_CHR_ADDRESS ( usb->address ) |
963 EHCI_CHR_ENDPOINT ( ep->address ) |
964 EHCI_CHR_MAX_LEN ( ep->mtu ) );
965
966 /* Control endpoints require manual control of the data toggle */
967 if ( attr == USB_ENDPOINT_ATTR_CONTROL )
968 chr |= EHCI_CHR_TOGGLE;
969
970 /* Determine endpoint speed */
971 if ( usb->port->speed == USB_SPEED_HIGH ) {
972 chr |= EHCI_CHR_EPS_HIGH;
973 } else {
974 if ( usb->port->speed == USB_SPEED_FULL ) {
975 chr |= EHCI_CHR_EPS_FULL;
976 } else {
977 chr |= EHCI_CHR_EPS_LOW;
978 }
979 if ( attr == USB_ENDPOINT_ATTR_CONTROL )
980 chr |= EHCI_CHR_CONTROL;
981 }
982
983 return chr;
984 }
985
986 /**
987 * Determine endpoint capabilities
988 *
989 * @v ep USB endpoint
990 * @ret cap Endpoint capabilities
991 */
992 static uint32_t ehci_endpoint_capabilities ( struct usb_endpoint *ep ) {
993 struct usb_device *usb = ep->usb;
994 struct usb_port *tt = usb_transaction_translator ( usb );
995 unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
996 uint32_t cap;
997 unsigned int i;
998
999 /* Determine basic capabilities */
1000 cap = EHCI_CAP_MULT ( ep->burst + 1 );
1001
1002 /* Determine interrupt schedule mask, if applicable */
1003 if ( ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) &&
1004 ( ( ep->interval != 0 ) /* avoid infinite loop */ ) ) {
1005 for ( i = 0 ; i < 8 /* microframes per frame */ ;
1006 i += ep->interval ) {
1007 cap |= EHCI_CAP_INTR_SCHED ( i );
1008 }
1009 }
1010
1011 /* Set transaction translator hub address and port, if applicable */
1012 if ( tt ) {
1013 assert ( tt->hub->usb );
1014 cap |= ( EHCI_CAP_TT_HUB ( tt->hub->usb->address ) |
1015 EHCI_CAP_TT_PORT ( tt->address ) );
1016 if ( attr == USB_ENDPOINT_ATTR_INTERRUPT )
1017 cap |= EHCI_CAP_SPLIT_SCHED_DEFAULT;
1018 }
1019
1020 return cap;
1021 }
1022
1023 /**
1024 * Update endpoint characteristics and capabilities
1025 *
1026 * @v ep USB endpoint
1027 */
1028 static void ehci_endpoint_update ( struct usb_endpoint *ep ) {
1029 struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
1030 struct ehci_queue_head *head;
1031
1032 /* Update queue characteristics and capabilities */
1033 head = endpoint->ring.head;
1034 head->chr = cpu_to_le32 ( ehci_endpoint_characteristics ( ep ) );
1035 head->cap = cpu_to_le32 ( ehci_endpoint_capabilities ( ep ) );
1036 }
1037
1038 /**
1039 * Open endpoint
1040 *
1041 * @v ep USB endpoint
1042 * @ret rc Return status code
1043 */
1044 static int ehci_endpoint_open ( struct usb_endpoint *ep ) {
1045 struct usb_device *usb = ep->usb;
1046 struct ehci_device *ehci = usb_get_hostdata ( usb );
1047 struct ehci_endpoint *endpoint;
1048 int rc;
1049
1050 /* Allocate and initialise structure */
1051 endpoint = zalloc ( sizeof ( *endpoint ) );
1052 if ( ! endpoint ) {
1053 rc = -ENOMEM;
1054 goto err_alloc;
1055 }
1056 endpoint->ehci = ehci;
1057 endpoint->ep = ep;
1058 usb_endpoint_set_hostdata ( ep, endpoint );
1059
1060 /* Initialise descriptor ring */
1061 if ( ( rc = ehci_ring_alloc ( ehci, &endpoint->ring ) ) != 0 )
1062 goto err_ring_alloc;
1063
1064 /* Update queue characteristics and capabilities */
1065 ehci_endpoint_update ( ep );
1066
1067 /* Add to list of endpoints */
1068 list_add_tail ( &endpoint->list, &ehci->endpoints );
1069
1070 /* Add to schedule */
1071 ehci_schedule_add ( endpoint );
1072
1073 return 0;
1074
1075 ehci_ring_free ( &endpoint->ring );
1076 err_ring_alloc:
1077 free ( endpoint );
1078 err_alloc:
1079 return rc;
1080 }
1081
1082 /**
1083 * Close endpoint
1084 *
1085 * @v ep USB endpoint
1086 */
1087 static void ehci_endpoint_close ( struct usb_endpoint *ep ) {
1088 struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
1089 struct ehci_device *ehci = endpoint->ehci;
1090 struct usb_device *usb = ep->usb;
1091 struct io_buffer *iobuf;
1092 int rc;
1093
1094 /* Remove from schedule */
1095 if ( ( rc = ehci_schedule_del ( endpoint ) ) != 0 ) {
1096 /* No way to prevent hardware from continuing to
1097 * access the memory, so leak it.
1098 */
1099 DBGC ( ehci, "EHCI %s %s could not unschedule: %s\n",
1100 usb->name, usb_endpoint_name ( ep ), strerror ( rc ) );
1101 return;
1102 }
1103
1104 /* Cancel any incomplete transfers */
1105 while ( ehci_ring_fill ( &endpoint->ring ) ) {
1106 iobuf = ehci_dequeue ( &endpoint->ring );
1107 if ( iobuf )
1108 usb_complete_err ( ep, iobuf, -ECANCELED );
1109 }
1110
1111 /* Remove from list of endpoints */
1112 list_del ( &endpoint->list );
1113
1114 /* Free descriptor ring */
1115 ehci_ring_free ( &endpoint->ring );
1116
1117 /* Free endpoint */
1118 free ( endpoint );
1119 }
1120
1121 /**
1122 * Reset endpoint
1123 *
1124 * @v ep USB endpoint
1125 * @ret rc Return status code
1126 */
1127 static int ehci_endpoint_reset ( struct usb_endpoint *ep ) {
1128 struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
1129 struct ehci_ring *ring = &endpoint->ring;
1130 struct ehci_transfer_descriptor *cache = &ring->head->cache;
1131 uint32_t link;
1132
1133 /* Sanity checks */
1134 assert ( ! ( cache->status & EHCI_STATUS_ACTIVE ) );
1135 assert ( cache->status & EHCI_STATUS_HALTED );
1136
1137 /* Reset residual count */
1138 ring->residual = 0;
1139
1140 /* Reset data toggle */
1141 cache->len = 0;
1142
1143 /* Prepare to restart at next unconsumed descriptor */
1144 link = virt_to_phys ( &ring->desc[ ring->cons % EHCI_RING_COUNT ] );
1145 cache->next = cpu_to_le32 ( link );
1146
1147 /* Restart ring */
1148 wmb();
1149 cache->status = 0;
1150
1151 return 0;
1152 }
1153
1154 /**
1155 * Update MTU
1156 *
1157 * @v ep USB endpoint
1158 * @ret rc Return status code
1159 */
1160 static int ehci_endpoint_mtu ( struct usb_endpoint *ep ) {
1161
1162 /* Update endpoint characteristics and capabilities */
1163 ehci_endpoint_update ( ep );
1164
1165 return 0;
1166 }
1167
1168 /**
1169 * Enqueue message transfer
1170 *
1171 * @v ep USB endpoint
1172 * @v iobuf I/O buffer
1173 * @ret rc Return status code
1174 */
1175 static int ehci_endpoint_message ( struct usb_endpoint *ep,
1176 struct io_buffer *iobuf ) {
1177 struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
1178 struct ehci_device *ehci = endpoint->ehci;
1179 struct usb_setup_packet *packet;
1180 unsigned int input;
1181 struct ehci_transfer xfers[3];
1182 struct ehci_transfer *xfer = xfers;
1183 size_t len;
1184 int rc;
1185
1186 /* Construct setup stage */
1187 assert ( iob_len ( iobuf ) >= sizeof ( *packet ) );
1188 packet = iobuf->data;
1189 iob_pull ( iobuf, sizeof ( *packet ) );
1190 xfer->data = packet;
1191 xfer->len = sizeof ( *packet );
1192 xfer->flags = EHCI_FL_PID_SETUP;
1193 xfer++;
1194
1195 /* Construct data stage, if applicable */
1196 len = iob_len ( iobuf );
1197 input = ( packet->request & cpu_to_le16 ( USB_DIR_IN ) );
1198 if ( len ) {
1199 xfer->data = iobuf->data;
1200 xfer->len = len;
1201 xfer->flags = ( EHCI_FL_TOGGLE |
1202 ( input ? EHCI_FL_PID_IN : EHCI_FL_PID_OUT ) );
1203 xfer++;
1204 }
1205
1206 /* Construct status stage */
1207 xfer->data = NULL;
1208 xfer->len = 0;
1209 xfer->flags = ( EHCI_FL_TOGGLE | EHCI_FL_IOC |
1210 ( ( len && input ) ? EHCI_FL_PID_OUT : EHCI_FL_PID_IN));
1211 xfer++;
1212
1213 /* Enqueue transfer */
1214 if ( ( rc = ehci_enqueue ( ehci, &endpoint->ring, iobuf, xfers,
1215 ( xfer - xfers ) ) ) != 0 )
1216 return rc;
1217
1218 return 0;
1219 }
1220
1221 /**
1222 * Enqueue stream transfer
1223 *
1224 * @v ep USB endpoint
1225 * @v iobuf I/O buffer
1226 * @v terminate Terminate using a short packet
1227 * @ret rc Return status code
1228 */
1229 static int ehci_endpoint_stream ( struct usb_endpoint *ep,
1230 struct io_buffer *iobuf, int terminate ) {
1231 struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
1232 struct ehci_device *ehci = endpoint->ehci;
1233 unsigned int input = ( ep->address & USB_DIR_IN );
1234 struct ehci_transfer xfers[2];
1235 struct ehci_transfer *xfer = xfers;
1236 size_t len = iob_len ( iobuf );
1237 int rc;
1238
1239 /* Create transfer */
1240 xfer->data = iobuf->data;
1241 xfer->len = len;
1242 xfer->flags = ( EHCI_FL_IOC |
1243 ( input ? EHCI_FL_PID_IN : EHCI_FL_PID_OUT ) );
1244 xfer++;
1245 if ( terminate && ( ( len & ( ep->mtu - 1 ) ) == 0 ) ) {
1246 xfer->data = NULL;
1247 xfer->len = 0;
1248 assert ( ! input );
1249 xfer->flags = ( EHCI_FL_IOC | EHCI_FL_PID_OUT );
1250 xfer++;
1251 }
1252
1253 /* Enqueue transfer */
1254 if ( ( rc = ehci_enqueue ( ehci, &endpoint->ring, iobuf, xfers,
1255 ( xfer - xfers ) ) ) != 0 )
1256 return rc;
1257
1258 return 0;
1259 }
1260
1261 /**
1262 * Poll for completions
1263 *
1264 * @v endpoint Endpoint
1265 */
1266 static void ehci_endpoint_poll ( struct ehci_endpoint *endpoint ) {
1267 struct ehci_device *ehci = endpoint->ehci;
1268 struct ehci_ring *ring = &endpoint->ring;
1269 struct ehci_transfer_descriptor *desc;
1270 struct usb_endpoint *ep = endpoint->ep;
1271 struct usb_device *usb = ep->usb;
1272 struct io_buffer *iobuf;
1273 unsigned int index;
1274 unsigned int status;
1275 int rc;
1276
1277 /* Consume all completed descriptors */
1278 while ( ehci_ring_fill ( &endpoint->ring ) ) {
1279
1280 /* Stop if we reach an uncompleted descriptor */
1281 rmb();
1282 index = ( ring->cons % EHCI_RING_COUNT );
1283 desc = &ring->desc[index];
1284 status = desc->status;
1285 if ( status & EHCI_STATUS_ACTIVE )
1286 break;
1287
1288 /* Consume this descriptor */
1289 iobuf = ehci_dequeue ( ring );
1290
1291 /* If we have encountered an error, then consume all
1292 * remaining descriptors in this transaction, report
1293 * the error to the USB core, and stop further
1294 * processing.
1295 */
1296 if ( status & EHCI_STATUS_HALTED ) {
1297 rc = -EIO_STATUS ( status );
1298 DBGC ( ehci, "EHCI %s %s completion %d failed (status "
1299 "%02x): %s\n", usb->name,
1300 usb_endpoint_name ( ep ), index, status,
1301 strerror ( rc ) );
1302 while ( ! iobuf )
1303 iobuf = ehci_dequeue ( ring );
1304 usb_complete_err ( endpoint->ep, iobuf, rc );
1305 return;
1306 }
1307
1308 /* Accumulate residual data count */
1309 ring->residual += ( le16_to_cpu ( desc->len ) & EHCI_LEN_MASK );
1310
1311 /* If this is not the end of a transaction (i.e. has
1312 * no I/O buffer), then continue to next descriptor.
1313 */
1314 if ( ! iobuf )
1315 continue;
1316
1317 /* Update I/O buffer length */
1318 iob_unput ( iobuf, ring->residual );
1319 ring->residual = 0;
1320
1321 /* Report completion to USB core */
1322 usb_complete ( endpoint->ep, iobuf );
1323 }
1324 }
1325
1326 /******************************************************************************
1327 *
1328 * Device operations
1329 *
1330 ******************************************************************************
1331 */
1332
1333 /**
1334 * Open device
1335 *
1336 * @v usb USB device
1337 * @ret rc Return status code
1338 */
1339 static int ehci_device_open ( struct usb_device *usb ) {
1340 struct ehci_device *ehci = usb_bus_get_hostdata ( usb->port->hub->bus );
1341
1342 usb_set_hostdata ( usb, ehci );
1343 return 0;
1344 }
1345
1346 /**
1347 * Close device
1348 *
1349 * @v usb USB device
1350 */
1351 static void ehci_device_close ( struct usb_device *usb ) {
1352 struct ehci_device *ehci = usb_get_hostdata ( usb );
1353 struct usb_bus *bus = ehci->bus;
1354
1355 /* Free device address, if assigned */
1356 if ( usb->address )
1357 usb_free_address ( bus, usb->address );
1358 }
1359
1360 /**
1361 * Assign device address
1362 *
1363 * @v usb USB device
1364 * @ret rc Return status code
1365 */
1366 static int ehci_device_address ( struct usb_device *usb ) {
1367 struct ehci_device *ehci = usb_get_hostdata ( usb );
1368 struct usb_bus *bus = ehci->bus;
1369 struct usb_endpoint *ep0 = usb_endpoint ( usb, USB_EP0_ADDRESS );
1370 int address;
1371 int rc;
1372
1373 /* Sanity checks */
1374 assert ( usb->address == 0 );
1375 assert ( ep0 != NULL );
1376
1377 /* Allocate device address */
1378 address = usb_alloc_address ( bus );
1379 if ( address < 0 ) {
1380 rc = address;
1381 DBGC ( ehci, "EHCI %s could not allocate address: %s\n",
1382 usb->name, strerror ( rc ) );
1383 goto err_alloc_address;
1384 }
1385
1386 /* Set address */
1387 if ( ( rc = usb_set_address ( usb, address ) ) != 0 )
1388 goto err_set_address;
1389
1390 /* Update device address */
1391 usb->address = address;
1392
1393 /* Update control endpoint characteristics and capabilities */
1394 ehci_endpoint_update ( ep0 );
1395
1396 return 0;
1397
1398 err_set_address:
1399 usb_free_address ( bus, address );
1400 err_alloc_address:
1401 return rc;
1402 }
1403
1404 /******************************************************************************
1405 *
1406 * Hub operations
1407 *
1408 ******************************************************************************
1409 */
1410
1411 /**
1412 * Open hub
1413 *
1414 * @v hub USB hub
1415 * @ret rc Return status code
1416 */
1417 static int ehci_hub_open ( struct usb_hub *hub __unused ) {
1418
1419 /* Nothing to do */
1420 return 0;
1421 }
1422
1423 /**
1424 * Close hub
1425 *
1426 * @v hub USB hub
1427 */
1428 static void ehci_hub_close ( struct usb_hub *hub __unused ) {
1429
1430 /* Nothing to do */
1431 }
1432
1433 /******************************************************************************
1434 *
1435 * Root hub operations
1436 *
1437 ******************************************************************************
1438 */
1439
1440 /**
1441 * Open root hub
1442 *
1443 * @v hub USB hub
1444 * @ret rc Return status code
1445 */
1446 static int ehci_root_open ( struct usb_hub *hub ) {
1447 struct usb_bus *bus = hub->bus;
1448 struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
1449 uint32_t portsc;
1450 unsigned int i;
1451
1452 /* Route all ports to EHCI controller */
1453 writel ( EHCI_CONFIGFLAG_CF, ehci->op + EHCI_OP_CONFIGFLAG );
1454
1455 /* Enable power to all ports */
1456 for ( i = 1 ; i <= ehci->ports ; i++ ) {
1457 portsc = readl ( ehci->op + EHCI_OP_PORTSC ( i ) );
1458 portsc &= ~EHCI_PORTSC_CHANGE;
1459 portsc |= EHCI_PORTSC_PP;
1460 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( i ) );
1461 }
1462
1463 /* Wait 20ms after potentially enabling power to a port */
1464 mdelay ( EHCI_PORT_POWER_DELAY_MS );
1465
1466 /* Record hub driver private data */
1467 usb_hub_set_drvdata ( hub, ehci );
1468
1469 return 0;
1470 }
1471
1472 /**
1473 * Close root hub
1474 *
1475 * @v hub USB hub
1476 */
1477 static void ehci_root_close ( struct usb_hub *hub ) {
1478 struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
1479
1480 /* Route all ports back to companion controllers */
1481 writel ( 0, ehci->op + EHCI_OP_CONFIGFLAG );
1482
1483 /* Clear hub driver private data */
1484 usb_hub_set_drvdata ( hub, NULL );
1485 }
1486
1487 /**
1488 * Enable port
1489 *
1490 * @v hub USB hub
1491 * @v port USB port
1492 * @ret rc Return status code
1493 */
1494 static int ehci_root_enable ( struct usb_hub *hub, struct usb_port *port ) {
1495 struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
1496 uint32_t portsc;
1497 unsigned int line;
1498 unsigned int i;
1499
1500 /* Check for a low-speed device */
1501 portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
1502 line = EHCI_PORTSC_LINE_STATUS ( portsc );
1503 if ( line == EHCI_PORTSC_LINE_STATUS_LOW ) {
1504 DBGC ( ehci, "EHCI %s-%d detected low-speed device: "
1505 "disowning\n", ehci->name, port->address );
1506 goto disown;
1507 }
1508
1509 /* Reset port */
1510 portsc &= ~( EHCI_PORTSC_PED | EHCI_PORTSC_CHANGE );
1511 portsc |= EHCI_PORTSC_PR;
1512 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
1513 mdelay ( USB_RESET_DELAY_MS );
1514 portsc &= ~EHCI_PORTSC_PR;
1515 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
1516
1517 /* Wait for reset to complete */
1518 for ( i = 0 ; i < EHCI_PORT_RESET_MAX_WAIT_MS ; i++ ) {
1519
1520 /* Check port status */
1521 portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
1522 if ( ! ( portsc & EHCI_PORTSC_PR ) ) {
1523 if ( portsc & EHCI_PORTSC_PED )
1524 return 0;
1525 DBGC ( ehci, "EHCI %s-%d not enabled after reset: "
1526 "disowning\n", ehci->name, port->address );
1527 goto disown;
1528 }
1529
1530 /* Delay */
1531 mdelay ( 1 );
1532 }
1533
1534 DBGC ( ehci, "EHCI %s-%d timed out waiting for port to reset\n",
1535 ehci->name, port->address );
1536 return -ETIMEDOUT;
1537
1538 disown:
1539 /* Disown port */
1540 portsc &= ~EHCI_PORTSC_CHANGE;
1541 portsc |= EHCI_PORTSC_OWNER;
1542 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
1543
1544 /* Delay to allow child companion controllers to settle */
1545 mdelay ( EHCI_DISOWN_DELAY_MS );
1546
1547 /* Poll child companion controllers */
1548 ehci_poll_companions ( ehci );
1549
1550 return -ENODEV;
1551 }
1552
1553 /**
1554 * Disable port
1555 *
1556 * @v hub USB hub
1557 * @v port USB port
1558 * @ret rc Return status code
1559 */
1560 static int ehci_root_disable ( struct usb_hub *hub, struct usb_port *port ) {
1561 struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
1562 uint32_t portsc;
1563
1564 /* Disable port */
1565 portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
1566 portsc &= ~( EHCI_PORTSC_PED | EHCI_PORTSC_CHANGE );
1567 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
1568
1569 return 0;
1570 }
1571
1572 /**
1573 * Update root hub port speed
1574 *
1575 * @v hub USB hub
1576 * @v port USB port
1577 * @ret rc Return status code
1578 */
1579 static int ehci_root_speed ( struct usb_hub *hub, struct usb_port *port ) {
1580 struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
1581 uint32_t portsc;
1582 unsigned int speed;
1583 unsigned int line;
1584 int ccs;
1585 int csc;
1586 int ped;
1587
1588 /* Read port status */
1589 portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
1590 DBGC2 ( ehci, "EHCI %s-%d status is %08x\n",
1591 ehci->name, port->address, portsc );
1592 ccs = ( portsc & EHCI_PORTSC_CCS );
1593 csc = ( portsc & EHCI_PORTSC_CSC );
1594 ped = ( portsc & EHCI_PORTSC_PED );
1595 line = EHCI_PORTSC_LINE_STATUS ( portsc );
1596
1597 /* Record disconnections and clear changes */
1598 port->disconnected |= csc;
1599 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
1600
1601 /* Determine port speed */
1602 if ( ! ccs ) {
1603 /* Port not connected */
1604 speed = USB_SPEED_NONE;
1605 } else if ( line == EHCI_PORTSC_LINE_STATUS_LOW ) {
1606 /* Detected as low-speed */
1607 speed = USB_SPEED_LOW;
1608 } else if ( ped ) {
1609 /* Port already enabled: must be high-speed */
1610 speed = USB_SPEED_HIGH;
1611 } else {
1612 /* Not low-speed and not yet enabled. Could be either
1613 * full-speed or high-speed; we can't yet tell.
1614 */
1615 speed = USB_SPEED_FULL;
1616 }
1617 port->speed = speed;
1618 return 0;
1619 }
1620
1621 /**
1622 * Clear transaction translator buffer
1623 *
1624 * @v hub USB hub
1625 * @v port USB port
1626 * @v ep USB endpoint
1627 * @ret rc Return status code
1628 */
1629 static int ehci_root_clear_tt ( struct usb_hub *hub, struct usb_port *port,
1630 struct usb_endpoint *ep ) {
1631 struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
1632
1633 /* Should never be called; this is a root hub */
1634 DBGC ( ehci, "EHCI %s-%d nonsensical CLEAR_TT for %s %s\n", ehci->name,
1635 port->address, ep->usb->name, usb_endpoint_name ( ep ) );
1636
1637 return -ENOTSUP;
1638 }
1639
1640 /**
1641 * Poll for port status changes
1642 *
1643 * @v hub USB hub
1644 * @v port USB port
1645 */
1646 static void ehci_root_poll ( struct usb_hub *hub, struct usb_port *port ) {
1647 struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
1648 uint32_t portsc;
1649 uint32_t change;
1650
1651 /* Do nothing unless something has changed */
1652 portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
1653 change = ( portsc & EHCI_PORTSC_CHANGE );
1654 if ( ! change )
1655 return;
1656
1657 /* Record disconnections and clear changes */
1658 port->disconnected |= ( portsc & EHCI_PORTSC_CSC );
1659 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
1660
1661 /* Report port status change */
1662 usb_port_changed ( port );
1663 }
1664
1665 /******************************************************************************
1666 *
1667 * Bus operations
1668 *
1669 ******************************************************************************
1670 */
1671
1672 /**
1673 * Open USB bus
1674 *
1675 * @v bus USB bus
1676 * @ret rc Return status code
1677 */
1678 static int ehci_bus_open ( struct usb_bus *bus ) {
1679 struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
1680 unsigned int frames;
1681 size_t len;
1682 int rc;
1683
1684 /* Sanity checks */
1685 assert ( list_empty ( &ehci->async ) );
1686 assert ( list_empty ( &ehci->periodic ) );
1687
1688 /* Allocate and initialise asynchronous queue head */
1689 ehci->head = malloc_dma ( sizeof ( *ehci->head ),
1690 ehci_align ( sizeof ( *ehci->head ) ) );
1691 if ( ! ehci->head ) {
1692 rc = -ENOMEM;
1693 goto err_alloc_head;
1694 }
1695 memset ( ehci->head, 0, sizeof ( *ehci->head ) );
1696 ehci->head->chr = cpu_to_le32 ( EHCI_CHR_HEAD );
1697 ehci->head->cache.next = cpu_to_le32 ( EHCI_LINK_TERMINATE );
1698 ehci->head->cache.status = EHCI_STATUS_HALTED;
1699 ehci_async_schedule ( ehci );
1700 writel ( virt_to_phys ( ehci->head ),
1701 ehci->op + EHCI_OP_ASYNCLISTADDR );
1702
1703 /* Use async queue head to determine control data structure segment */
1704 ehci->ctrldssegment =
1705 ( ( ( uint64_t ) virt_to_phys ( ehci->head ) ) >> 32 );
1706 if ( ehci->addr64 ) {
1707 writel ( ehci->ctrldssegment, ehci->op + EHCI_OP_CTRLDSSEGMENT);
1708 } else if ( ehci->ctrldssegment ) {
1709 DBGC ( ehci, "EHCI %s CTRLDSSEGMENT not supported\n",
1710 ehci->name );
1711 rc = -ENOTSUP;
1712 goto err_ctrldssegment;
1713 }
1714
1715 /* Allocate periodic frame list */
1716 frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
1717 len = ( frames * sizeof ( ehci->frame[0] ) );
1718 ehci->frame = malloc_dma ( len, EHCI_PAGE_ALIGN );
1719 if ( ! ehci->frame ) {
1720 rc = -ENOMEM;
1721 goto err_alloc_frame;
1722 }
1723 if ( ( rc = ehci_ctrl_reachable ( ehci, ehci->frame ) ) != 0 ) {
1724 DBGC ( ehci, "EHCI %s frame list unreachable\n", ehci->name );
1725 goto err_unreachable_frame;
1726 }
1727 ehci_periodic_schedule ( ehci );
1728 writel ( virt_to_phys ( ehci->frame ),
1729 ehci->op + EHCI_OP_PERIODICLISTBASE );
1730
1731 /* Start controller */
1732 ehci_run ( ehci );
1733
1734 return 0;
1735
1736 ehci_stop ( ehci );
1737 err_unreachable_frame:
1738 free_dma ( ehci->frame, len );
1739 err_alloc_frame:
1740 err_ctrldssegment:
1741 free_dma ( ehci->head, sizeof ( *ehci->head ) );
1742 err_alloc_head:
1743 return rc;
1744 }
1745
1746 /**
1747 * Close USB bus
1748 *
1749 * @v bus USB bus
1750 */
1751 static void ehci_bus_close ( struct usb_bus *bus ) {
1752 struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
1753 unsigned int frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
1754
1755 /* Sanity checks */
1756 assert ( list_empty ( &ehci->async ) );
1757 assert ( list_empty ( &ehci->periodic ) );
1758
1759 /* Stop controller */
1760 ehci_stop ( ehci );
1761
1762 /* Free periodic frame list */
1763 free_dma ( ehci->frame, ( frames * sizeof ( ehci->frame[0] ) ) );
1764
1765 /* Free asynchronous schedule */
1766 free_dma ( ehci->head, sizeof ( *ehci->head ) );
1767 }
1768
1769 /**
1770 * Poll USB bus
1771 *
1772 * @v bus USB bus
1773 */
1774 static void ehci_bus_poll ( struct usb_bus *bus ) {
1775 struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
1776 struct usb_hub *hub = bus->hub;
1777 struct ehci_endpoint *endpoint;
1778 unsigned int i;
1779 uint32_t usbsts;
1780 uint32_t change;
1781
1782 /* Do nothing unless something has changed */
1783 usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
1784 assert ( usbsts & EHCI_USBSTS_ASYNC );
1785 assert ( usbsts & EHCI_USBSTS_PERIODIC );
1786 assert ( ! ( usbsts & EHCI_USBSTS_HCH ) );
1787 change = ( usbsts & EHCI_USBSTS_CHANGE );
1788 if ( ! change )
1789 return;
1790
1791 /* Acknowledge changes */
1792 writel ( usbsts, ehci->op + EHCI_OP_USBSTS );
1793
1794 /* Process completions, if applicable */
1795 if ( change & ( EHCI_USBSTS_USBINT | EHCI_USBSTS_USBERRINT ) ) {
1796
1797 /* Iterate over all endpoints looking for completed
1798 * descriptors. We trust that completion handlers are
1799 * minimal and will not do anything that could
1800 * plausibly affect the endpoint list itself.
1801 */
1802 list_for_each_entry ( endpoint, &ehci->endpoints, list )
1803 ehci_endpoint_poll ( endpoint );
1804 }
1805
1806 /* Process port status changes, if applicable */
1807 if ( change & EHCI_USBSTS_PORT ) {
1808
1809 /* Iterate over all ports looking for status changes */
1810 for ( i = 1 ; i <= ehci->ports ; i++ )
1811 ehci_root_poll ( hub, usb_port ( hub, i ) );
1812 }
1813
1814 /* Report fatal errors */
1815 if ( change & EHCI_USBSTS_SYSERR )
1816 DBGC ( ehci, "EHCI %s host system error\n", ehci->name );
1817 }
1818
1819 /******************************************************************************
1820 *
1821 * PCI interface
1822 *
1823 ******************************************************************************
1824 */
1825
1826 /** USB host controller operations */
1827 static struct usb_host_operations ehci_operations = {
1828 .endpoint = {
1829 .open = ehci_endpoint_open,
1830 .close = ehci_endpoint_close,
1831 .reset = ehci_endpoint_reset,
1832 .mtu = ehci_endpoint_mtu,
1833 .message = ehci_endpoint_message,
1834 .stream = ehci_endpoint_stream,
1835 },
1836 .device = {
1837 .open = ehci_device_open,
1838 .close = ehci_device_close,
1839 .address = ehci_device_address,
1840 },
1841 .bus = {
1842 .open = ehci_bus_open,
1843 .close = ehci_bus_close,
1844 .poll = ehci_bus_poll,
1845 },
1846 .hub = {
1847 .open = ehci_hub_open,
1848 .close = ehci_hub_close,
1849 },
1850 .root = {
1851 .open = ehci_root_open,
1852 .close = ehci_root_close,
1853 .enable = ehci_root_enable,
1854 .disable = ehci_root_disable,
1855 .speed = ehci_root_speed,
1856 .clear_tt = ehci_root_clear_tt,
1857 },
1858 };
1859
1860 /**
1861 * Probe PCI device
1862 *
1863 * @v pci PCI device
1864 * @ret rc Return status code
1865 */
1866 static int ehci_probe ( struct pci_device *pci ) {
1867 struct ehci_device *ehci;
1868 struct usb_port *port;
1869 unsigned long bar_start;
1870 size_t bar_size;
1871 unsigned int i;
1872 int rc;
1873
1874 /* Allocate and initialise structure */
1875 ehci = zalloc ( sizeof ( *ehci ) );
1876 if ( ! ehci ) {
1877 rc = -ENOMEM;
1878 goto err_alloc;
1879 }
1880 ehci->name = pci->dev.name;
1881 INIT_LIST_HEAD ( &ehci->endpoints );
1882 INIT_LIST_HEAD ( &ehci->async );
1883 INIT_LIST_HEAD ( &ehci->periodic );
1884
1885 /* Fix up PCI device */
1886 adjust_pci_device ( pci );
1887
1888 /* Map registers */
1889 bar_start = pci_bar_start ( pci, EHCI_BAR );
1890 bar_size = pci_bar_size ( pci, EHCI_BAR );
1891 ehci->regs = ioremap ( bar_start, bar_size );
1892 if ( ! ehci->regs ) {
1893 rc = -ENODEV;
1894 goto err_ioremap;
1895 }
1896
1897 /* Initialise EHCI device */
1898 ehci_init ( ehci, ehci->regs );
1899
1900 /* Initialise USB legacy support and claim ownership */
1901 ehci_legacy_init ( ehci, pci );
1902 ehci_legacy_claim ( ehci, pci );
1903
1904 /* Reset device */
1905 if ( ( rc = ehci_reset ( ehci ) ) != 0 )
1906 goto err_reset;
1907
1908 /* Allocate USB bus */
1909 ehci->bus = alloc_usb_bus ( &pci->dev, ehci->ports, EHCI_MTU,
1910 &ehci_operations );
1911 if ( ! ehci->bus ) {
1912 rc = -ENOMEM;
1913 goto err_alloc_bus;
1914 }
1915 usb_bus_set_hostdata ( ehci->bus, ehci );
1916 usb_hub_set_drvdata ( ehci->bus->hub, ehci );
1917
1918 /* Set port protocols */
1919 for ( i = 1 ; i <= ehci->ports ; i++ ) {
1920 port = usb_port ( ehci->bus->hub, i );
1921 port->protocol = USB_PROTO_2_0;
1922 }
1923
1924 /* Register USB bus */
1925 if ( ( rc = register_usb_bus ( ehci->bus ) ) != 0 )
1926 goto err_register;
1927
1928 pci_set_drvdata ( pci, ehci );
1929 return 0;
1930
1931 unregister_usb_bus ( ehci->bus );
1932 err_register:
1933 free_usb_bus ( ehci->bus );
1934 err_alloc_bus:
1935 ehci_reset ( ehci );
1936 err_reset:
1937 ehci_legacy_release ( ehci, pci );
1938 iounmap ( ehci->regs );
1939 err_ioremap:
1940 free ( ehci );
1941 err_alloc:
1942 return rc;
1943 }
1944
1945 /**
1946 * Remove PCI device
1947 *
1948 * @v pci PCI device
1949 */
1950 static void ehci_remove ( struct pci_device *pci ) {
1951 struct ehci_device *ehci = pci_get_drvdata ( pci );
1952 struct usb_bus *bus = ehci->bus;
1953
1954 unregister_usb_bus ( bus );
1955 assert ( list_empty ( &ehci->async ) );
1956 assert ( list_empty ( &ehci->periodic ) );
1957 free_usb_bus ( bus );
1958 ehci_reset ( ehci );
1959 ehci_legacy_release ( ehci, pci );
1960 iounmap ( ehci->regs );
1961 free ( ehci );
1962 }
1963
1964 /** EHCI PCI device IDs */
1965 static struct pci_device_id ehci_ids[] = {
1966 PCI_ROM ( 0xffff, 0xffff, "ehci", "EHCI", 0 ),
1967 };
1968
1969 /** EHCI PCI driver */
1970 struct pci_driver ehci_driver __pci_driver = {
1971 .ids = ehci_ids,
1972 .id_count = ( sizeof ( ehci_ids ) / sizeof ( ehci_ids[0] ) ),
1973 .class = PCI_CLASS_ID ( PCI_CLASS_SERIAL, PCI_CLASS_SERIAL_USB,
1974 PCI_CLASS_SERIAL_USB_EHCI ),
1975 .probe = ehci_probe,
1976 .remove = ehci_remove,
1977 };
1978
1979 /**
1980 * Prepare for exit
1981 *
1982 * @v booting System is shutting down for OS boot
1983 */
1984 static void ehci_shutdown ( int booting ) {
1985 /* If we are shutting down to boot an OS, then prevent the
1986 * release of ownership back to BIOS.
1987 */
1988 ehci_legacy_prevent_release = booting;
1989 }
1990
1991 /** Startup/shutdown function */
1992 struct startup_fn ehci_startup __startup_fn ( STARTUP_LATE ) = {
1993 .shutdown = ehci_shutdown,
1994 };
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