[acpi] Expose system MAC address via ${sysmac} setting
[ipxe.git] / src / drivers / usb / ehci.c
1 /*
2 * Copyright (C) 2014 Michael Brown <mbrown@fensystems.co.uk>.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of the
7 * License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
17 * 02110-1301, USA.
18 *
19 * You can also choose to distribute this program under the terms of
20 * the Unmodified Binary Distribution Licence (as given in the file
21 * COPYING.UBDL), provided that you have satisfied its requirements.
22 */
23
24 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
25
26 #include <stdlib.h>
27 #include <unistd.h>
28 #include <string.h>
29 #include <strings.h>
30 #include <errno.h>
31 #include <byteswap.h>
32 #include <ipxe/malloc.h>
33 #include <ipxe/pci.h>
34 #include <ipxe/usb.h>
35 #include <ipxe/init.h>
36 #include "ehci.h"
37
38 /** @file
39 *
40 * USB Enhanced Host Controller Interface (EHCI) driver
41 *
42 */
43
44 /**
45 * Construct error code from transfer descriptor status
46 *
47 * @v status Transfer descriptor status
48 * @ret rc Error code
49 *
50 * Bits 2-5 of the status code provide some indication as to the root
51 * cause of the error. We incorporate these into the error code as
52 * reported to usb_complete_err().
53 */
54 #define EIO_STATUS( status ) EUNIQ ( EINFO_EIO, ( ( (status) >> 2 ) & 0xf ) )
55
56 /******************************************************************************
57 *
58 * Register access
59 *
60 ******************************************************************************
61 */
62
63 /**
64 * Initialise device
65 *
66 * @v ehci EHCI device
67 * @v regs MMIO registers
68 */
69 static void ehci_init ( struct ehci_device *ehci, void *regs ) {
70 uint32_t hcsparams;
71 uint32_t hccparams;
72 size_t caplength;
73
74 /* Locate capability and operational registers */
75 ehci->cap = regs;
76 caplength = readb ( ehci->cap + EHCI_CAP_CAPLENGTH );
77 ehci->op = ( ehci->cap + caplength );
78 DBGC2 ( ehci, "EHCI %s cap %08lx op %08lx\n", ehci->name,
79 virt_to_phys ( ehci->cap ), virt_to_phys ( ehci->op ) );
80
81 /* Read structural parameters */
82 hcsparams = readl ( ehci->cap + EHCI_CAP_HCSPARAMS );
83 ehci->ports = EHCI_HCSPARAMS_PORTS ( hcsparams );
84 DBGC ( ehci, "EHCI %s has %d ports\n", ehci->name, ehci->ports );
85
86 /* Read capability parameters 1 */
87 hccparams = readl ( ehci->cap + EHCI_CAP_HCCPARAMS );
88 ehci->addr64 = EHCI_HCCPARAMS_ADDR64 ( hccparams );
89 ehci->flsize = ( EHCI_HCCPARAMS_FLSIZE ( hccparams ) ?
90 EHCI_FLSIZE_SMALL : EHCI_FLSIZE_DEFAULT );
91 ehci->eecp = EHCI_HCCPARAMS_EECP ( hccparams );
92 DBGC2 ( ehci, "EHCI %s %d-bit flsize %d\n", ehci->name,
93 ( ehci->addr64 ? 64 : 32 ), ehci->flsize );
94 }
95
96 /**
97 * Find extended capability
98 *
99 * @v ehci EHCI device
100 * @v pci PCI device
101 * @v id Capability ID
102 * @v offset Offset to previous extended capability instance, or zero
103 * @ret offset Offset to extended capability, or zero if not found
104 */
105 static unsigned int ehci_extended_capability ( struct ehci_device *ehci,
106 struct pci_device *pci,
107 unsigned int id,
108 unsigned int offset ) {
109 uint32_t eecp;
110
111 /* Locate the extended capability */
112 while ( 1 ) {
113
114 /* Locate first or next capability as applicable */
115 if ( offset ) {
116 pci_read_config_dword ( pci, offset, &eecp );
117 offset = EHCI_EECP_NEXT ( eecp );
118 } else {
119 offset = ehci->eecp;
120 }
121 if ( ! offset )
122 return 0;
123
124 /* Check if this is the requested capability */
125 pci_read_config_dword ( pci, offset, &eecp );
126 if ( EHCI_EECP_ID ( eecp ) == id )
127 return offset;
128 }
129 }
130
131 /**
132 * Calculate buffer alignment
133 *
134 * @v len Length
135 * @ret align Buffer alignment
136 *
137 * Determine alignment required for a buffer which must be aligned to
138 * at least EHCI_MIN_ALIGN and which must not cross a page boundary.
139 */
140 static inline size_t ehci_align ( size_t len ) {
141 size_t align;
142
143 /* Align to own length (rounded up to a power of two) */
144 align = ( 1 << fls ( len - 1 ) );
145
146 /* Round up to EHCI_MIN_ALIGN if needed */
147 if ( align < EHCI_MIN_ALIGN )
148 align = EHCI_MIN_ALIGN;
149
150 return align;
151 }
152
153 /**
154 * Check control data structure reachability
155 *
156 * @v ehci EHCI device
157 * @v ptr Data structure pointer
158 * @ret rc Return status code
159 */
160 static int ehci_ctrl_reachable ( struct ehci_device *ehci, void *ptr ) {
161 physaddr_t phys = virt_to_phys ( ptr );
162 uint32_t segment;
163
164 /* Always reachable in a 32-bit build */
165 if ( sizeof ( physaddr_t ) <= sizeof ( uint32_t ) )
166 return 0;
167
168 /* Reachable only if control segment matches in a 64-bit build */
169 segment = ( ( ( uint64_t ) phys ) >> 32 );
170 if ( segment == ehci->ctrldssegment )
171 return 0;
172
173 return -ENOTSUP;
174 }
175
176 /******************************************************************************
177 *
178 * Diagnostics
179 *
180 ******************************************************************************
181 */
182
183 /**
184 * Dump host controller registers
185 *
186 * @v ehci EHCI device
187 */
188 static __unused void ehci_dump ( struct ehci_device *ehci ) {
189 uint8_t caplength;
190 uint16_t hciversion;
191 uint32_t hcsparams;
192 uint32_t hccparams;
193 uint32_t usbcmd;
194 uint32_t usbsts;
195 uint32_t usbintr;
196 uint32_t frindex;
197 uint32_t ctrldssegment;
198 uint32_t periodiclistbase;
199 uint32_t asynclistaddr;
200 uint32_t configflag;
201
202 /* Do nothing unless debugging is enabled */
203 if ( ! DBG_LOG )
204 return;
205
206 /* Dump capability registers */
207 caplength = readb ( ehci->cap + EHCI_CAP_CAPLENGTH );
208 hciversion = readw ( ehci->cap + EHCI_CAP_HCIVERSION );
209 hcsparams = readl ( ehci->cap + EHCI_CAP_HCSPARAMS );
210 hccparams = readl ( ehci->cap + EHCI_CAP_HCCPARAMS );
211 DBGC ( ehci, "EHCI %s caplen %02x hciversion %04x hcsparams %08x "
212 "hccparams %08x\n", ehci->name, caplength, hciversion,
213 hcsparams, hccparams );
214
215 /* Dump operational registers */
216 usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
217 usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
218 usbintr = readl ( ehci->op + EHCI_OP_USBINTR );
219 frindex = readl ( ehci->op + EHCI_OP_FRINDEX );
220 ctrldssegment = readl ( ehci->op + EHCI_OP_CTRLDSSEGMENT );
221 periodiclistbase = readl ( ehci->op + EHCI_OP_PERIODICLISTBASE );
222 asynclistaddr = readl ( ehci->op + EHCI_OP_ASYNCLISTADDR );
223 configflag = readl ( ehci->op + EHCI_OP_CONFIGFLAG );
224 DBGC ( ehci, "EHCI %s usbcmd %08x usbsts %08x usbint %08x frindx "
225 "%08x\n", ehci->name, usbcmd, usbsts, usbintr, frindex );
226 DBGC ( ehci, "EHCI %s ctrlds %08x period %08x asyncl %08x cfgflg "
227 "%08x\n", ehci->name, ctrldssegment, periodiclistbase,
228 asynclistaddr, configflag );
229 }
230
231 /******************************************************************************
232 *
233 * USB legacy support
234 *
235 ******************************************************************************
236 */
237
238 /** Prevent the release of ownership back to BIOS */
239 static int ehci_legacy_prevent_release;
240
241 /**
242 * Initialise USB legacy support
243 *
244 * @v ehci EHCI device
245 * @v pci PCI device
246 */
247 static void ehci_legacy_init ( struct ehci_device *ehci,
248 struct pci_device *pci ) {
249 unsigned int legacy;
250 uint8_t bios;
251
252 /* Locate USB legacy support capability (if present) */
253 legacy = ehci_extended_capability ( ehci, pci, EHCI_EECP_ID_LEGACY, 0 );
254 if ( ! legacy ) {
255 /* Not an error; capability may not be present */
256 DBGC ( ehci, "EHCI %s has no USB legacy support capability\n",
257 ehci->name );
258 return;
259 }
260
261 /* Check if legacy USB support is enabled */
262 pci_read_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_BIOS ), &bios );
263 if ( ! ( bios & EHCI_USBLEGSUP_BIOS_OWNED ) ) {
264 /* Not an error; already owned by OS */
265 DBGC ( ehci, "EHCI %s USB legacy support already disabled\n",
266 ehci->name );
267 return;
268 }
269
270 /* Record presence of USB legacy support capability */
271 ehci->legacy = legacy;
272 }
273
274 /**
275 * Claim ownership from BIOS
276 *
277 * @v ehci EHCI device
278 * @v pci PCI device
279 */
280 static void ehci_legacy_claim ( struct ehci_device *ehci,
281 struct pci_device *pci ) {
282 unsigned int legacy = ehci->legacy;
283 uint32_t ctlsts;
284 uint8_t bios;
285 unsigned int i;
286
287 /* Do nothing unless legacy support capability is present */
288 if ( ! legacy )
289 return;
290
291 /* Dump original SMI usage */
292 pci_read_config_dword ( pci, ( legacy + EHCI_USBLEGSUP_CTLSTS ),
293 &ctlsts );
294 if ( ctlsts ) {
295 DBGC ( ehci, "EHCI %s BIOS using SMIs: %08x\n",
296 ehci->name, ctlsts );
297 }
298
299 /* Claim ownership */
300 pci_write_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_OS ),
301 EHCI_USBLEGSUP_OS_OWNED );
302
303 /* Wait for BIOS to release ownership */
304 for ( i = 0 ; i < EHCI_USBLEGSUP_MAX_WAIT_MS ; i++ ) {
305
306 /* Check if BIOS has released ownership */
307 pci_read_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_BIOS ),
308 &bios );
309 if ( ! ( bios & EHCI_USBLEGSUP_BIOS_OWNED ) ) {
310 DBGC ( ehci, "EHCI %s claimed ownership from BIOS\n",
311 ehci->name );
312 pci_read_config_dword ( pci, ( legacy +
313 EHCI_USBLEGSUP_CTLSTS ),
314 &ctlsts );
315 if ( ctlsts ) {
316 DBGC ( ehci, "EHCI %s warning: BIOS retained "
317 "SMIs: %08x\n", ehci->name, ctlsts );
318 }
319 return;
320 }
321
322 /* Delay */
323 mdelay ( 1 );
324 }
325
326 /* BIOS did not release ownership. Claim it forcibly by
327 * disabling all SMIs.
328 */
329 DBGC ( ehci, "EHCI %s could not claim ownership from BIOS: forcibly "
330 "disabling SMIs\n", ehci->name );
331 pci_write_config_dword ( pci, ( legacy + EHCI_USBLEGSUP_CTLSTS ), 0 );
332 }
333
334 /**
335 * Release ownership back to BIOS
336 *
337 * @v ehci EHCI device
338 * @v pci PCI device
339 */
340 static void ehci_legacy_release ( struct ehci_device *ehci,
341 struct pci_device *pci ) {
342 unsigned int legacy = ehci->legacy;
343 uint32_t ctlsts;
344
345 /* Do nothing unless legacy support capability is present */
346 if ( ! legacy )
347 return;
348
349 /* Do nothing if releasing ownership is prevented */
350 if ( ehci_legacy_prevent_release ) {
351 DBGC ( ehci, "EHCI %s not releasing ownership to BIOS\n",
352 ehci->name );
353 return;
354 }
355
356 /* Release ownership */
357 pci_write_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_OS ), 0 );
358 DBGC ( ehci, "EHCI %s released ownership to BIOS\n", ehci->name );
359
360 /* Dump restored SMI usage */
361 pci_read_config_dword ( pci, ( legacy + EHCI_USBLEGSUP_CTLSTS ),
362 &ctlsts );
363 DBGC ( ehci, "EHCI %s BIOS reclaimed SMIs: %08x\n",
364 ehci->name, ctlsts );
365 }
366
367 /******************************************************************************
368 *
369 * Companion controllers
370 *
371 ******************************************************************************
372 */
373
374 /**
375 * Poll child companion controllers
376 *
377 * @v ehci EHCI device
378 */
379 static void ehci_poll_companions ( struct ehci_device *ehci ) {
380 struct usb_bus *bus;
381 struct device_description *desc;
382
383 /* Poll any USB buses belonging to child companion controllers */
384 for_each_usb_bus ( bus ) {
385
386 /* Get underlying devices description */
387 desc = &bus->dev->desc;
388
389 /* Skip buses that are not PCI devices */
390 if ( desc->bus_type != BUS_TYPE_PCI )
391 continue;
392
393 /* Skip buses that are not part of the same PCI device */
394 if ( PCI_FIRST_FUNC ( desc->location ) !=
395 PCI_FIRST_FUNC ( ehci->bus->dev->desc.location ) )
396 continue;
397
398 /* Skip buses that are not UHCI or OHCI PCI devices */
399 if ( ( desc->class != PCI_CLASS ( PCI_CLASS_SERIAL,
400 PCI_CLASS_SERIAL_USB,
401 PCI_CLASS_SERIAL_USB_UHCI ))&&
402 ( desc->class != PCI_CLASS ( PCI_CLASS_SERIAL,
403 PCI_CLASS_SERIAL_USB,
404 PCI_CLASS_SERIAL_USB_OHCI ) ))
405 continue;
406
407 /* Poll child companion controller bus */
408 DBGC2 ( ehci, "EHCI %s polling companion %s\n",
409 ehci->name, bus->name );
410 usb_poll ( bus );
411 }
412 }
413
414 /**
415 * Locate EHCI companion controller
416 *
417 * @v pci PCI device
418 * @ret busdevfn EHCI companion controller bus:dev.fn (if any)
419 */
420 unsigned int ehci_companion ( struct pci_device *pci ) {
421 struct pci_device tmp;
422 unsigned int busdevfn;
423 int rc;
424
425 /* Look for an EHCI function on the same PCI device */
426 busdevfn = pci->busdevfn;
427 while ( ++busdevfn <= PCI_LAST_FUNC ( pci->busdevfn ) ) {
428 pci_init ( &tmp, busdevfn );
429 if ( ( rc = pci_read_config ( &tmp ) ) != 0 )
430 continue;
431 if ( tmp.class == PCI_CLASS ( PCI_CLASS_SERIAL,
432 PCI_CLASS_SERIAL_USB,
433 PCI_CLASS_SERIAL_USB_EHCI ) )
434 return busdevfn;
435 }
436
437 return 0;
438 }
439
440 /******************************************************************************
441 *
442 * Run / stop / reset
443 *
444 ******************************************************************************
445 */
446
447 /**
448 * Start EHCI device
449 *
450 * @v ehci EHCI device
451 */
452 static void ehci_run ( struct ehci_device *ehci ) {
453 uint32_t usbcmd;
454
455 /* Set run/stop bit */
456 usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
457 usbcmd &= ~EHCI_USBCMD_FLSIZE_MASK;
458 usbcmd |= ( EHCI_USBCMD_RUN | EHCI_USBCMD_FLSIZE ( ehci->flsize ) |
459 EHCI_USBCMD_PERIODIC | EHCI_USBCMD_ASYNC );
460 writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
461 }
462
463 /**
464 * Stop EHCI device
465 *
466 * @v ehci EHCI device
467 * @ret rc Return status code
468 */
469 static int ehci_stop ( struct ehci_device *ehci ) {
470 uint32_t usbcmd;
471 uint32_t usbsts;
472 unsigned int i;
473
474 /* Clear run/stop bit */
475 usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
476 usbcmd &= ~( EHCI_USBCMD_RUN | EHCI_USBCMD_PERIODIC |
477 EHCI_USBCMD_ASYNC );
478 writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
479
480 /* Wait for device to stop */
481 for ( i = 0 ; i < EHCI_STOP_MAX_WAIT_MS ; i++ ) {
482
483 /* Check if device is stopped */
484 usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
485 if ( usbsts & EHCI_USBSTS_HCH )
486 return 0;
487
488 /* Delay */
489 mdelay ( 1 );
490 }
491
492 DBGC ( ehci, "EHCI %s timed out waiting for stop\n", ehci->name );
493 return -ETIMEDOUT;
494 }
495
496 /**
497 * Reset EHCI device
498 *
499 * @v ehci EHCI device
500 * @ret rc Return status code
501 */
502 static int ehci_reset ( struct ehci_device *ehci ) {
503 uint32_t usbcmd;
504 unsigned int i;
505 int rc;
506
507 /* The EHCI specification states that resetting a running
508 * device may result in undefined behaviour, so try stopping
509 * it first.
510 */
511 if ( ( rc = ehci_stop ( ehci ) ) != 0 ) {
512 /* Ignore errors and attempt to reset the device anyway */
513 }
514
515 /* Reset device */
516 writel ( EHCI_USBCMD_HCRST, ehci->op + EHCI_OP_USBCMD );
517
518 /* Wait for reset to complete */
519 for ( i = 0 ; i < EHCI_RESET_MAX_WAIT_MS ; i++ ) {
520
521 /* Check if reset is complete */
522 usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
523 if ( ! ( usbcmd & EHCI_USBCMD_HCRST ) )
524 return 0;
525
526 /* Delay */
527 mdelay ( 1 );
528 }
529
530 DBGC ( ehci, "EHCI %s timed out waiting for reset\n", ehci->name );
531 return -ETIMEDOUT;
532 }
533
534 /******************************************************************************
535 *
536 * Transfer descriptor rings
537 *
538 ******************************************************************************
539 */
540
541 /**
542 * Allocate transfer descriptor ring
543 *
544 * @v ehci EHCI device
545 * @v ring Transfer descriptor ring
546 * @ret rc Return status code
547 */
548 static int ehci_ring_alloc ( struct ehci_device *ehci,
549 struct ehci_ring *ring ) {
550 struct ehci_transfer_descriptor *desc;
551 struct ehci_transfer_descriptor *next;
552 unsigned int i;
553 size_t len;
554 uint32_t link;
555 int rc;
556
557 /* Initialise structure */
558 memset ( ring, 0, sizeof ( *ring ) );
559
560 /* Allocate I/O buffers */
561 ring->iobuf = zalloc ( EHCI_RING_COUNT * sizeof ( ring->iobuf[0] ) );
562 if ( ! ring->iobuf ) {
563 rc = -ENOMEM;
564 goto err_alloc_iobuf;
565 }
566
567 /* Allocate queue head */
568 ring->head = malloc_phys ( sizeof ( *ring->head ),
569 ehci_align ( sizeof ( *ring->head ) ) );
570 if ( ! ring->head ) {
571 rc = -ENOMEM;
572 goto err_alloc_queue;
573 }
574 if ( ( rc = ehci_ctrl_reachable ( ehci, ring->head ) ) != 0 ) {
575 DBGC ( ehci, "EHCI %s queue head unreachable\n", ehci->name );
576 goto err_unreachable_queue;
577 }
578 memset ( ring->head, 0, sizeof ( *ring->head ) );
579
580 /* Allocate transfer descriptors */
581 len = ( EHCI_RING_COUNT * sizeof ( ring->desc[0] ) );
582 ring->desc = malloc_phys ( len, sizeof ( ring->desc[0] ) );
583 if ( ! ring->desc ) {
584 rc = -ENOMEM;
585 goto err_alloc_desc;
586 }
587 memset ( ring->desc, 0, len );
588
589 /* Initialise transfer descriptors */
590 for ( i = 0 ; i < EHCI_RING_COUNT ; i++ ) {
591 desc = &ring->desc[i];
592 if ( ( rc = ehci_ctrl_reachable ( ehci, desc ) ) != 0 ) {
593 DBGC ( ehci, "EHCI %s descriptor unreachable\n",
594 ehci->name );
595 goto err_unreachable_desc;
596 }
597 next = &ring->desc[ ( i + 1 ) % EHCI_RING_COUNT ];
598 link = virt_to_phys ( next );
599 desc->next = cpu_to_le32 ( link );
600 desc->alt = cpu_to_le32 ( link );
601 }
602
603 /* Initialise queue head */
604 link = virt_to_phys ( &ring->desc[0] );
605 ring->head->cache.next = cpu_to_le32 ( link );
606
607 return 0;
608
609 err_unreachable_desc:
610 free_phys ( ring->desc, len );
611 err_alloc_desc:
612 err_unreachable_queue:
613 free_phys ( ring->head, sizeof ( *ring->head ) );
614 err_alloc_queue:
615 free ( ring->iobuf );
616 err_alloc_iobuf:
617 return rc;
618 }
619
620 /**
621 * Free transfer descriptor ring
622 *
623 * @v ring Transfer descriptor ring
624 */
625 static void ehci_ring_free ( struct ehci_ring *ring ) {
626 unsigned int i;
627
628 /* Sanity checks */
629 assert ( ehci_ring_fill ( ring ) == 0 );
630 for ( i = 0 ; i < EHCI_RING_COUNT ; i++ )
631 assert ( ring->iobuf[i] == NULL );
632
633 /* Free transfer descriptors */
634 free_phys ( ring->desc, ( EHCI_RING_COUNT *
635 sizeof ( ring->desc[0] ) ) );
636
637 /* Free queue head */
638 free_phys ( ring->head, sizeof ( *ring->head ) );
639
640 /* Free I/O buffers */
641 free ( ring->iobuf );
642 }
643
644 /**
645 * Enqueue transfer descriptors
646 *
647 * @v ehci EHCI device
648 * @v ring Transfer descriptor ring
649 * @v iobuf I/O buffer
650 * @v xfers Transfers
651 * @v count Number of transfers
652 * @ret rc Return status code
653 */
654 static int ehci_enqueue ( struct ehci_device *ehci, struct ehci_ring *ring,
655 struct io_buffer *iobuf,
656 const struct ehci_transfer *xfer,
657 unsigned int count ) {
658 struct ehci_transfer_descriptor *desc;
659 physaddr_t phys;
660 void *data;
661 size_t len;
662 size_t offset;
663 size_t frag_len;
664 unsigned int toggle;
665 unsigned int index;
666 unsigned int i;
667
668 /* Sanity check */
669 assert ( iobuf != NULL );
670 assert ( count > 0 );
671
672 /* Fail if ring does not have sufficient space */
673 if ( ehci_ring_remaining ( ring ) < count )
674 return -ENOBUFS;
675
676 /* Fail if any portion is unreachable */
677 for ( i = 0 ; i < count ; i++ ) {
678 if ( ! xfer[i].len )
679 continue;
680 phys = ( virt_to_phys ( xfer[i].data ) + xfer[i].len - 1 );
681 if ( ( phys > 0xffffffffUL ) && ( ! ehci->addr64 ) )
682 return -ENOTSUP;
683 }
684
685 /* Enqueue each transfer, recording the I/O buffer with the last */
686 for ( ; count ; ring->prod++, xfer++ ) {
687
688 /* Populate descriptor header */
689 index = ( ring->prod % EHCI_RING_COUNT );
690 desc = &ring->desc[index];
691 toggle = ( xfer->flags & EHCI_FL_TOGGLE );
692 assert ( xfer->len <= EHCI_LEN_MASK );
693 assert ( EHCI_FL_TOGGLE == EHCI_LEN_TOGGLE );
694 desc->len = cpu_to_le16 ( xfer->len | toggle );
695 desc->flags = ( xfer->flags | EHCI_FL_CERR_MAX );
696
697 /* Populate buffer pointers */
698 data = xfer->data;
699 len = xfer->len;
700 for ( i = 0 ; len ; i++ ) {
701
702 /* Calculate length of this fragment */
703 phys = virt_to_phys ( data );
704 offset = ( phys & ( EHCI_PAGE_ALIGN - 1 ) );
705 frag_len = ( EHCI_PAGE_ALIGN - offset );
706 if ( frag_len > len )
707 frag_len = len;
708
709 /* Sanity checks */
710 assert ( ( i == 0 ) || ( offset == 0 ) );
711 assert ( i < ( sizeof ( desc->low ) /
712 sizeof ( desc->low[0] ) ) );
713
714 /* Populate buffer pointer */
715 desc->low[i] = cpu_to_le32 ( phys );
716 if ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) ) {
717 desc->high[i] =
718 cpu_to_le32 ( ((uint64_t) phys) >> 32 );
719 }
720
721 /* Move to next fragment */
722 data += frag_len;
723 len -= frag_len;
724 }
725
726 /* Ensure everything is valid before activating descriptor */
727 wmb();
728 desc->status = EHCI_STATUS_ACTIVE;
729
730 /* Record I/O buffer against last ring index */
731 if ( --count == 0 )
732 ring->iobuf[index] = iobuf;
733 }
734
735 return 0;
736 }
737
738 /**
739 * Dequeue a transfer descriptor
740 *
741 * @v ring Transfer descriptor ring
742 * @ret iobuf I/O buffer (or NULL)
743 */
744 static struct io_buffer * ehci_dequeue ( struct ehci_ring *ring ) {
745 struct ehci_transfer_descriptor *desc;
746 struct io_buffer *iobuf;
747 unsigned int index = ( ring->cons % EHCI_RING_COUNT );
748
749 /* Sanity check */
750 assert ( ehci_ring_fill ( ring ) > 0 );
751
752 /* Mark descriptor as inactive (and not halted) */
753 desc = &ring->desc[index];
754 desc->status = 0;
755
756 /* Retrieve I/O buffer */
757 iobuf = ring->iobuf[index];
758 ring->iobuf[index] = NULL;
759
760 /* Update consumer counter */
761 ring->cons++;
762
763 return iobuf;
764 }
765
766 /******************************************************************************
767 *
768 * Schedule management
769 *
770 ******************************************************************************
771 */
772
773 /**
774 * Get link value for a queue head
775 *
776 * @v queue Queue head
777 * @ret link Link value
778 */
779 static inline uint32_t ehci_link_qh ( struct ehci_queue_head *queue ) {
780
781 return ( virt_to_phys ( queue ) | EHCI_LINK_TYPE_QH );
782 }
783
784 /**
785 * (Re)build asynchronous schedule
786 *
787 * @v ehci EHCI device
788 */
789 static void ehci_async_schedule ( struct ehci_device *ehci ) {
790 struct ehci_endpoint *endpoint;
791 struct ehci_queue_head *queue;
792 uint32_t link;
793
794 /* Build schedule in reverse order of execution. Provided
795 * that we only ever add or remove single endpoints, this can
796 * safely run concurrently with hardware execution of the
797 * schedule.
798 */
799 link = ehci_link_qh ( ehci->head );
800 list_for_each_entry_reverse ( endpoint, &ehci->async, schedule ) {
801 queue = endpoint->ring.head;
802 queue->link = cpu_to_le32 ( link );
803 wmb();
804 link = ehci_link_qh ( queue );
805 }
806 ehci->head->link = cpu_to_le32 ( link );
807 wmb();
808 }
809
810 /**
811 * Add endpoint to asynchronous schedule
812 *
813 * @v endpoint Endpoint
814 */
815 static void ehci_async_add ( struct ehci_endpoint *endpoint ) {
816 struct ehci_device *ehci = endpoint->ehci;
817
818 /* Add to end of schedule */
819 list_add_tail ( &endpoint->schedule, &ehci->async );
820
821 /* Rebuild schedule */
822 ehci_async_schedule ( ehci );
823 }
824
825 /**
826 * Remove endpoint from asynchronous schedule
827 *
828 * @v endpoint Endpoint
829 * @ret rc Return status code
830 */
831 static int ehci_async_del ( struct ehci_endpoint *endpoint ) {
832 struct ehci_device *ehci = endpoint->ehci;
833 uint32_t usbcmd;
834 uint32_t usbsts;
835 unsigned int i;
836
837 /* Remove from schedule */
838 list_check_contains_entry ( endpoint, &ehci->async, schedule );
839 list_del ( &endpoint->schedule );
840
841 /* Rebuild schedule */
842 ehci_async_schedule ( ehci );
843
844 /* Request notification when asynchronous schedule advances */
845 usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
846 usbcmd |= EHCI_USBCMD_ASYNC_ADVANCE;
847 writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
848
849 /* Wait for asynchronous schedule to advance */
850 for ( i = 0 ; i < EHCI_ASYNC_ADVANCE_MAX_WAIT_MS ; i++ ) {
851
852 /* Check for asynchronous schedule advancing */
853 usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
854 if ( usbsts & EHCI_USBSTS_ASYNC_ADVANCE ) {
855 usbsts &= ~EHCI_USBSTS_CHANGE;
856 usbsts |= EHCI_USBSTS_ASYNC_ADVANCE;
857 writel ( usbsts, ehci->op + EHCI_OP_USBSTS );
858 return 0;
859 }
860
861 /* Delay */
862 mdelay ( 1 );
863 }
864
865 /* Bad things will probably happen now */
866 DBGC ( ehci, "EHCI %s timed out waiting for asynchronous schedule "
867 "to advance\n", ehci->name );
868 return -ETIMEDOUT;
869 }
870
871 /**
872 * (Re)build periodic schedule
873 *
874 * @v ehci EHCI device
875 */
876 static void ehci_periodic_schedule ( struct ehci_device *ehci ) {
877 struct ehci_endpoint *endpoint;
878 struct ehci_queue_head *queue;
879 uint32_t link;
880 unsigned int frames;
881 unsigned int max_interval;
882 unsigned int i;
883
884 /* Build schedule in reverse order of execution. Provided
885 * that we only ever add or remove single endpoints, this can
886 * safely run concurrently with hardware execution of the
887 * schedule.
888 */
889 DBGCP ( ehci, "EHCI %s periodic schedule: ", ehci->name );
890 link = EHCI_LINK_TERMINATE;
891 list_for_each_entry_reverse ( endpoint, &ehci->periodic, schedule ) {
892 queue = endpoint->ring.head;
893 queue->link = cpu_to_le32 ( link );
894 wmb();
895 DBGCP ( ehci, "%s%d",
896 ( ( link == EHCI_LINK_TERMINATE ) ? "" : "<-" ),
897 endpoint->ep->interval );
898 link = ehci_link_qh ( queue );
899 }
900 DBGCP ( ehci, "\n" );
901
902 /* Populate periodic frame list */
903 DBGCP ( ehci, "EHCI %s periodic frame list:", ehci->name );
904 frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
905 for ( i = 0 ; i < frames ; i++ ) {
906
907 /* Calculate maximum interval (in microframes) which
908 * may appear as part of this frame list.
909 */
910 if ( i == 0 ) {
911 /* Start of list: include all endpoints */
912 max_interval = -1U;
913 } else {
914 /* Calculate highest power-of-two frame interval */
915 max_interval = ( 1 << ( ffs ( i ) - 1 ) );
916 /* Convert to microframes */
917 max_interval <<= 3;
918 /* Round up to nearest 2^n-1 */
919 max_interval = ( ( max_interval << 1 ) - 1 );
920 }
921
922 /* Find first endpoint in schedule satisfying this
923 * maximum interval constraint.
924 */
925 link = EHCI_LINK_TERMINATE;
926 list_for_each_entry ( endpoint, &ehci->periodic, schedule ) {
927 if ( endpoint->ep->interval <= max_interval ) {
928 queue = endpoint->ring.head;
929 link = ehci_link_qh ( queue );
930 DBGCP ( ehci, " %d:%d",
931 i, endpoint->ep->interval );
932 break;
933 }
934 }
935 ehci->frame[i].link = cpu_to_le32 ( link );
936 }
937 wmb();
938 DBGCP ( ehci, "\n" );
939 }
940
941 /**
942 * Add endpoint to periodic schedule
943 *
944 * @v endpoint Endpoint
945 */
946 static void ehci_periodic_add ( struct ehci_endpoint *endpoint ) {
947 struct ehci_device *ehci = endpoint->ehci;
948 struct ehci_endpoint *before;
949 unsigned int interval = endpoint->ep->interval;
950
951 /* Find first endpoint with a smaller interval */
952 list_for_each_entry ( before, &ehci->periodic, schedule ) {
953 if ( before->ep->interval < interval )
954 break;
955 }
956 list_add_tail ( &endpoint->schedule, &before->schedule );
957
958 /* Rebuild schedule */
959 ehci_periodic_schedule ( ehci );
960 }
961
962 /**
963 * Remove endpoint from periodic schedule
964 *
965 * @v endpoint Endpoint
966 * @ret rc Return status code
967 */
968 static int ehci_periodic_del ( struct ehci_endpoint *endpoint ) {
969 struct ehci_device *ehci = endpoint->ehci;
970
971 /* Remove from schedule */
972 list_check_contains_entry ( endpoint, &ehci->periodic, schedule );
973 list_del ( &endpoint->schedule );
974
975 /* Rebuild schedule */
976 ehci_periodic_schedule ( ehci );
977
978 /* Delay for a whole USB frame (with a 100% safety margin) */
979 mdelay ( 2 );
980
981 return 0;
982 }
983
984 /**
985 * Add endpoint to appropriate schedule
986 *
987 * @v endpoint Endpoint
988 */
989 static void ehci_schedule_add ( struct ehci_endpoint *endpoint ) {
990 struct usb_endpoint *ep = endpoint->ep;
991 unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
992
993 if ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) {
994 ehci_periodic_add ( endpoint );
995 } else {
996 ehci_async_add ( endpoint );
997 }
998 }
999
1000 /**
1001 * Remove endpoint from appropriate schedule
1002 *
1003 * @v endpoint Endpoint
1004 * @ret rc Return status code
1005 */
1006 static int ehci_schedule_del ( struct ehci_endpoint *endpoint ) {
1007 struct usb_endpoint *ep = endpoint->ep;
1008 unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
1009
1010 if ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) {
1011 return ehci_periodic_del ( endpoint );
1012 } else {
1013 return ehci_async_del ( endpoint );
1014 }
1015 }
1016
1017 /******************************************************************************
1018 *
1019 * Endpoint operations
1020 *
1021 ******************************************************************************
1022 */
1023
1024 /**
1025 * Determine endpoint characteristics
1026 *
1027 * @v ep USB endpoint
1028 * @ret chr Endpoint characteristics
1029 */
1030 static uint32_t ehci_endpoint_characteristics ( struct usb_endpoint *ep ) {
1031 struct usb_device *usb = ep->usb;
1032 unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
1033 uint32_t chr;
1034
1035 /* Determine basic characteristics */
1036 chr = ( EHCI_CHR_ADDRESS ( usb->address ) |
1037 EHCI_CHR_ENDPOINT ( ep->address ) |
1038 EHCI_CHR_MAX_LEN ( ep->mtu ) );
1039
1040 /* Control endpoints require manual control of the data toggle */
1041 if ( attr == USB_ENDPOINT_ATTR_CONTROL )
1042 chr |= EHCI_CHR_TOGGLE;
1043
1044 /* Determine endpoint speed */
1045 if ( usb->speed == USB_SPEED_HIGH ) {
1046 chr |= EHCI_CHR_EPS_HIGH;
1047 } else {
1048 if ( usb->speed == USB_SPEED_FULL ) {
1049 chr |= EHCI_CHR_EPS_FULL;
1050 } else {
1051 chr |= EHCI_CHR_EPS_LOW;
1052 }
1053 if ( attr == USB_ENDPOINT_ATTR_CONTROL )
1054 chr |= EHCI_CHR_CONTROL;
1055 }
1056
1057 return chr;
1058 }
1059
1060 /**
1061 * Determine endpoint capabilities
1062 *
1063 * @v ep USB endpoint
1064 * @ret cap Endpoint capabilities
1065 */
1066 static uint32_t ehci_endpoint_capabilities ( struct usb_endpoint *ep ) {
1067 struct usb_device *usb = ep->usb;
1068 struct usb_port *tt = usb_transaction_translator ( usb );
1069 unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
1070 uint32_t cap;
1071 unsigned int i;
1072
1073 /* Determine basic capabilities */
1074 cap = EHCI_CAP_MULT ( ep->burst + 1 );
1075
1076 /* Determine interrupt schedule mask, if applicable */
1077 if ( ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) &&
1078 ( ( ep->interval != 0 ) /* avoid infinite loop */ ) ) {
1079 for ( i = 0 ; i < 8 /* microframes per frame */ ;
1080 i += ep->interval ) {
1081 cap |= EHCI_CAP_INTR_SCHED ( i );
1082 }
1083 }
1084
1085 /* Set transaction translator hub address and port, if applicable */
1086 if ( tt ) {
1087 assert ( tt->hub->usb );
1088 cap |= ( EHCI_CAP_TT_HUB ( tt->hub->usb->address ) |
1089 EHCI_CAP_TT_PORT ( tt->address ) );
1090 if ( attr == USB_ENDPOINT_ATTR_INTERRUPT )
1091 cap |= EHCI_CAP_SPLIT_SCHED_DEFAULT;
1092 }
1093
1094 return cap;
1095 }
1096
1097 /**
1098 * Update endpoint characteristics and capabilities
1099 *
1100 * @v ep USB endpoint
1101 */
1102 static void ehci_endpoint_update ( struct usb_endpoint *ep ) {
1103 struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
1104 struct ehci_queue_head *head;
1105
1106 /* Update queue characteristics and capabilities */
1107 head = endpoint->ring.head;
1108 head->chr = cpu_to_le32 ( ehci_endpoint_characteristics ( ep ) );
1109 head->cap = cpu_to_le32 ( ehci_endpoint_capabilities ( ep ) );
1110 }
1111
1112 /**
1113 * Open endpoint
1114 *
1115 * @v ep USB endpoint
1116 * @ret rc Return status code
1117 */
1118 static int ehci_endpoint_open ( struct usb_endpoint *ep ) {
1119 struct usb_device *usb = ep->usb;
1120 struct ehci_device *ehci = usb_get_hostdata ( usb );
1121 struct ehci_endpoint *endpoint;
1122 int rc;
1123
1124 /* Allocate and initialise structure */
1125 endpoint = zalloc ( sizeof ( *endpoint ) );
1126 if ( ! endpoint ) {
1127 rc = -ENOMEM;
1128 goto err_alloc;
1129 }
1130 endpoint->ehci = ehci;
1131 endpoint->ep = ep;
1132 usb_endpoint_set_hostdata ( ep, endpoint );
1133
1134 /* Initialise descriptor ring */
1135 if ( ( rc = ehci_ring_alloc ( ehci, &endpoint->ring ) ) != 0 )
1136 goto err_ring_alloc;
1137
1138 /* Update queue characteristics and capabilities */
1139 ehci_endpoint_update ( ep );
1140
1141 /* Add to list of endpoints */
1142 list_add_tail ( &endpoint->list, &ehci->endpoints );
1143
1144 /* Add to schedule */
1145 ehci_schedule_add ( endpoint );
1146
1147 return 0;
1148
1149 ehci_ring_free ( &endpoint->ring );
1150 err_ring_alloc:
1151 free ( endpoint );
1152 err_alloc:
1153 return rc;
1154 }
1155
1156 /**
1157 * Close endpoint
1158 *
1159 * @v ep USB endpoint
1160 */
1161 static void ehci_endpoint_close ( struct usb_endpoint *ep ) {
1162 struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
1163 struct ehci_device *ehci = endpoint->ehci;
1164 struct usb_device *usb = ep->usb;
1165 struct io_buffer *iobuf;
1166 int rc;
1167
1168 /* Remove from schedule */
1169 if ( ( rc = ehci_schedule_del ( endpoint ) ) != 0 ) {
1170 /* No way to prevent hardware from continuing to
1171 * access the memory, so leak it.
1172 */
1173 DBGC ( ehci, "EHCI %s %s could not unschedule: %s\n",
1174 usb->name, usb_endpoint_name ( ep ), strerror ( rc ) );
1175 return;
1176 }
1177
1178 /* Cancel any incomplete transfers */
1179 while ( ehci_ring_fill ( &endpoint->ring ) ) {
1180 iobuf = ehci_dequeue ( &endpoint->ring );
1181 if ( iobuf )
1182 usb_complete_err ( ep, iobuf, -ECANCELED );
1183 }
1184
1185 /* Remove from list of endpoints */
1186 list_del ( &endpoint->list );
1187
1188 /* Free descriptor ring */
1189 ehci_ring_free ( &endpoint->ring );
1190
1191 /* Free endpoint */
1192 free ( endpoint );
1193 }
1194
1195 /**
1196 * Reset endpoint
1197 *
1198 * @v ep USB endpoint
1199 * @ret rc Return status code
1200 */
1201 static int ehci_endpoint_reset ( struct usb_endpoint *ep ) {
1202 struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
1203 struct ehci_ring *ring = &endpoint->ring;
1204 struct ehci_transfer_descriptor *cache = &ring->head->cache;
1205 uint32_t link;
1206
1207 /* Sanity checks */
1208 assert ( ! ( cache->status & EHCI_STATUS_ACTIVE ) );
1209 assert ( cache->status & EHCI_STATUS_HALTED );
1210
1211 /* Reset residual count */
1212 ring->residual = 0;
1213
1214 /* Reset data toggle */
1215 cache->len = 0;
1216
1217 /* Prepare to restart at next unconsumed descriptor */
1218 link = virt_to_phys ( &ring->desc[ ring->cons % EHCI_RING_COUNT ] );
1219 cache->next = cpu_to_le32 ( link );
1220
1221 /* Restart ring */
1222 wmb();
1223 cache->status = 0;
1224
1225 return 0;
1226 }
1227
1228 /**
1229 * Update MTU
1230 *
1231 * @v ep USB endpoint
1232 * @ret rc Return status code
1233 */
1234 static int ehci_endpoint_mtu ( struct usb_endpoint *ep ) {
1235
1236 /* Update endpoint characteristics and capabilities */
1237 ehci_endpoint_update ( ep );
1238
1239 return 0;
1240 }
1241
1242 /**
1243 * Enqueue message transfer
1244 *
1245 * @v ep USB endpoint
1246 * @v iobuf I/O buffer
1247 * @ret rc Return status code
1248 */
1249 static int ehci_endpoint_message ( struct usb_endpoint *ep,
1250 struct io_buffer *iobuf ) {
1251 struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
1252 struct ehci_device *ehci = endpoint->ehci;
1253 struct usb_setup_packet *packet;
1254 unsigned int input;
1255 struct ehci_transfer xfers[3];
1256 struct ehci_transfer *xfer = xfers;
1257 size_t len;
1258 int rc;
1259
1260 /* Construct setup stage */
1261 assert ( iob_len ( iobuf ) >= sizeof ( *packet ) );
1262 packet = iobuf->data;
1263 iob_pull ( iobuf, sizeof ( *packet ) );
1264 xfer->data = packet;
1265 xfer->len = sizeof ( *packet );
1266 xfer->flags = EHCI_FL_PID_SETUP;
1267 xfer++;
1268
1269 /* Construct data stage, if applicable */
1270 len = iob_len ( iobuf );
1271 input = ( packet->request & cpu_to_le16 ( USB_DIR_IN ) );
1272 if ( len ) {
1273 xfer->data = iobuf->data;
1274 xfer->len = len;
1275 xfer->flags = ( EHCI_FL_TOGGLE |
1276 ( input ? EHCI_FL_PID_IN : EHCI_FL_PID_OUT ) );
1277 xfer++;
1278 }
1279
1280 /* Construct status stage */
1281 xfer->data = NULL;
1282 xfer->len = 0;
1283 xfer->flags = ( EHCI_FL_TOGGLE | EHCI_FL_IOC |
1284 ( ( len && input ) ? EHCI_FL_PID_OUT : EHCI_FL_PID_IN));
1285 xfer++;
1286
1287 /* Enqueue transfer */
1288 if ( ( rc = ehci_enqueue ( ehci, &endpoint->ring, iobuf, xfers,
1289 ( xfer - xfers ) ) ) != 0 )
1290 return rc;
1291
1292 return 0;
1293 }
1294
1295 /**
1296 * Calculate number of transfer descriptors
1297 *
1298 * @v len Length of data
1299 * @v zlp Append a zero-length packet
1300 * @ret count Number of transfer descriptors
1301 */
1302 static unsigned int ehci_endpoint_count ( size_t len, int zlp ) {
1303 unsigned int count;
1304
1305 /* Split into 16kB transfers. A single transfer can handle up
1306 * to 20kB if it happens to be page-aligned, or up to 16kB
1307 * with arbitrary alignment. We simplify the code by assuming
1308 * that we can fit only 16kB into each transfer.
1309 */
1310 count = ( ( len + EHCI_MTU - 1 ) / EHCI_MTU );
1311
1312 /* Append a zero-length transfer if applicable */
1313 if ( zlp || ( count == 0 ) )
1314 count++;
1315
1316 return count;
1317 }
1318
1319 /**
1320 * Enqueue stream transfer
1321 *
1322 * @v ep USB endpoint
1323 * @v iobuf I/O buffer
1324 * @v zlp Append a zero-length packet
1325 * @ret rc Return status code
1326 */
1327 static int ehci_endpoint_stream ( struct usb_endpoint *ep,
1328 struct io_buffer *iobuf, int zlp ) {
1329 struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
1330 struct ehci_device *ehci = endpoint->ehci;
1331 void *data = iobuf->data;
1332 size_t len = iob_len ( iobuf );
1333 unsigned int count = ehci_endpoint_count ( len, zlp );
1334 unsigned int input = ( ep->address & USB_DIR_IN );
1335 unsigned int flags = ( input ? EHCI_FL_PID_IN : EHCI_FL_PID_OUT );
1336 struct ehci_transfer xfers[count];
1337 struct ehci_transfer *xfer = xfers;
1338 size_t xfer_len;
1339 unsigned int i;
1340 int rc;
1341
1342 /* Create transfers */
1343 for ( i = 0 ; i < count ; i++ ) {
1344
1345 /* Calculate transfer length */
1346 xfer_len = EHCI_MTU;
1347 if ( xfer_len > len )
1348 xfer_len = len;
1349
1350 /* Create transfer */
1351 xfer->data = data;
1352 xfer->len = xfer_len;
1353 xfer->flags = flags;
1354
1355 /* Move to next transfer */
1356 data += xfer_len;
1357 len -= xfer_len;
1358 xfer++;
1359 }
1360 xfer[-1].flags |= EHCI_FL_IOC;
1361
1362 /* Enqueue transfer */
1363 if ( ( rc = ehci_enqueue ( ehci, &endpoint->ring, iobuf, xfers,
1364 count ) ) != 0 )
1365 return rc;
1366
1367 return 0;
1368 }
1369
1370 /**
1371 * Poll for completions
1372 *
1373 * @v endpoint Endpoint
1374 */
1375 static void ehci_endpoint_poll ( struct ehci_endpoint *endpoint ) {
1376 struct ehci_device *ehci = endpoint->ehci;
1377 struct ehci_ring *ring = &endpoint->ring;
1378 struct ehci_transfer_descriptor *desc;
1379 struct usb_endpoint *ep = endpoint->ep;
1380 struct usb_device *usb = ep->usb;
1381 struct io_buffer *iobuf;
1382 unsigned int index;
1383 unsigned int status;
1384 int rc;
1385
1386 /* Consume all completed descriptors */
1387 while ( ehci_ring_fill ( &endpoint->ring ) ) {
1388
1389 /* Stop if we reach an uncompleted descriptor */
1390 rmb();
1391 index = ( ring->cons % EHCI_RING_COUNT );
1392 desc = &ring->desc[index];
1393 status = desc->status;
1394 if ( status & EHCI_STATUS_ACTIVE )
1395 break;
1396
1397 /* Consume this descriptor */
1398 iobuf = ehci_dequeue ( ring );
1399
1400 /* If we have encountered an error, then consume all
1401 * remaining descriptors in this transaction, report
1402 * the error to the USB core, and stop further
1403 * processing.
1404 */
1405 if ( status & EHCI_STATUS_HALTED ) {
1406 rc = -EIO_STATUS ( status );
1407 DBGC ( ehci, "EHCI %s %s completion %d failed (status "
1408 "%02x): %s\n", usb->name,
1409 usb_endpoint_name ( ep ), index, status,
1410 strerror ( rc ) );
1411 while ( ! iobuf )
1412 iobuf = ehci_dequeue ( ring );
1413 usb_complete_err ( endpoint->ep, iobuf, rc );
1414 return;
1415 }
1416
1417 /* Accumulate residual data count */
1418 ring->residual += ( le16_to_cpu ( desc->len ) & EHCI_LEN_MASK );
1419
1420 /* If this is not the end of a transaction (i.e. has
1421 * no I/O buffer), then continue to next descriptor.
1422 */
1423 if ( ! iobuf )
1424 continue;
1425
1426 /* Update I/O buffer length */
1427 iob_unput ( iobuf, ring->residual );
1428 ring->residual = 0;
1429
1430 /* Report completion to USB core */
1431 usb_complete ( endpoint->ep, iobuf );
1432 }
1433 }
1434
1435 /******************************************************************************
1436 *
1437 * Device operations
1438 *
1439 ******************************************************************************
1440 */
1441
1442 /**
1443 * Open device
1444 *
1445 * @v usb USB device
1446 * @ret rc Return status code
1447 */
1448 static int ehci_device_open ( struct usb_device *usb ) {
1449 struct ehci_device *ehci = usb_bus_get_hostdata ( usb->port->hub->bus );
1450
1451 usb_set_hostdata ( usb, ehci );
1452 return 0;
1453 }
1454
1455 /**
1456 * Close device
1457 *
1458 * @v usb USB device
1459 */
1460 static void ehci_device_close ( struct usb_device *usb ) {
1461 struct ehci_device *ehci = usb_get_hostdata ( usb );
1462 struct usb_bus *bus = ehci->bus;
1463
1464 /* Free device address, if assigned */
1465 if ( usb->address )
1466 usb_free_address ( bus, usb->address );
1467 }
1468
1469 /**
1470 * Assign device address
1471 *
1472 * @v usb USB device
1473 * @ret rc Return status code
1474 */
1475 static int ehci_device_address ( struct usb_device *usb ) {
1476 struct ehci_device *ehci = usb_get_hostdata ( usb );
1477 struct usb_bus *bus = ehci->bus;
1478 struct usb_endpoint *ep0 = usb_endpoint ( usb, USB_EP0_ADDRESS );
1479 int address;
1480 int rc;
1481
1482 /* Sanity checks */
1483 assert ( usb->address == 0 );
1484 assert ( ep0 != NULL );
1485
1486 /* Allocate device address */
1487 address = usb_alloc_address ( bus );
1488 if ( address < 0 ) {
1489 rc = address;
1490 DBGC ( ehci, "EHCI %s could not allocate address: %s\n",
1491 usb->name, strerror ( rc ) );
1492 goto err_alloc_address;
1493 }
1494
1495 /* Set address */
1496 if ( ( rc = usb_set_address ( usb, address ) ) != 0 )
1497 goto err_set_address;
1498
1499 /* Update device address */
1500 usb->address = address;
1501
1502 /* Update control endpoint characteristics and capabilities */
1503 ehci_endpoint_update ( ep0 );
1504
1505 return 0;
1506
1507 err_set_address:
1508 usb_free_address ( bus, address );
1509 err_alloc_address:
1510 return rc;
1511 }
1512
1513 /******************************************************************************
1514 *
1515 * Hub operations
1516 *
1517 ******************************************************************************
1518 */
1519
1520 /**
1521 * Open hub
1522 *
1523 * @v hub USB hub
1524 * @ret rc Return status code
1525 */
1526 static int ehci_hub_open ( struct usb_hub *hub __unused ) {
1527
1528 /* Nothing to do */
1529 return 0;
1530 }
1531
1532 /**
1533 * Close hub
1534 *
1535 * @v hub USB hub
1536 */
1537 static void ehci_hub_close ( struct usb_hub *hub __unused ) {
1538
1539 /* Nothing to do */
1540 }
1541
1542 /******************************************************************************
1543 *
1544 * Root hub operations
1545 *
1546 ******************************************************************************
1547 */
1548
1549 /**
1550 * Open root hub
1551 *
1552 * @v hub USB hub
1553 * @ret rc Return status code
1554 */
1555 static int ehci_root_open ( struct usb_hub *hub ) {
1556 struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
1557 uint32_t portsc;
1558 unsigned int i;
1559
1560 /* Route all ports to EHCI controller */
1561 writel ( EHCI_CONFIGFLAG_CF, ehci->op + EHCI_OP_CONFIGFLAG );
1562
1563 /* Enable power to all ports */
1564 for ( i = 1 ; i <= ehci->ports ; i++ ) {
1565 portsc = readl ( ehci->op + EHCI_OP_PORTSC ( i ) );
1566 portsc &= ~EHCI_PORTSC_CHANGE;
1567 portsc |= EHCI_PORTSC_PP;
1568 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( i ) );
1569 }
1570
1571 /* Wait 20ms after potentially enabling power to a port */
1572 mdelay ( EHCI_PORT_POWER_DELAY_MS );
1573
1574 return 0;
1575 }
1576
1577 /**
1578 * Close root hub
1579 *
1580 * @v hub USB hub
1581 */
1582 static void ehci_root_close ( struct usb_hub *hub ) {
1583 struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
1584
1585 /* Route all ports back to companion controllers */
1586 writel ( 0, ehci->op + EHCI_OP_CONFIGFLAG );
1587 }
1588
1589 /**
1590 * Enable port
1591 *
1592 * @v hub USB hub
1593 * @v port USB port
1594 * @ret rc Return status code
1595 */
1596 static int ehci_root_enable ( struct usb_hub *hub, struct usb_port *port ) {
1597 struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
1598 uint32_t portsc;
1599 unsigned int line;
1600 unsigned int i;
1601
1602 /* Check for a low-speed device */
1603 portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
1604 line = EHCI_PORTSC_LINE_STATUS ( portsc );
1605 if ( line == EHCI_PORTSC_LINE_STATUS_LOW ) {
1606 DBGC ( ehci, "EHCI %s-%d detected low-speed device: "
1607 "disowning\n", ehci->name, port->address );
1608 goto disown;
1609 }
1610
1611 /* Reset port */
1612 portsc &= ~( EHCI_PORTSC_PED | EHCI_PORTSC_CHANGE );
1613 portsc |= EHCI_PORTSC_PR;
1614 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
1615 mdelay ( USB_RESET_DELAY_MS );
1616 portsc &= ~EHCI_PORTSC_PR;
1617 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
1618
1619 /* Wait for reset to complete */
1620 for ( i = 0 ; i < EHCI_PORT_RESET_MAX_WAIT_MS ; i++ ) {
1621
1622 /* Check port status */
1623 portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
1624 if ( ! ( portsc & EHCI_PORTSC_PR ) ) {
1625 if ( portsc & EHCI_PORTSC_PED )
1626 return 0;
1627 DBGC ( ehci, "EHCI %s-%d not enabled after reset: "
1628 "disowning\n", ehci->name, port->address );
1629 goto disown;
1630 }
1631
1632 /* Delay */
1633 mdelay ( 1 );
1634 }
1635
1636 DBGC ( ehci, "EHCI %s-%d timed out waiting for port to reset\n",
1637 ehci->name, port->address );
1638 return -ETIMEDOUT;
1639
1640 disown:
1641 /* Disown port */
1642 portsc &= ~EHCI_PORTSC_CHANGE;
1643 portsc |= EHCI_PORTSC_OWNER;
1644 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
1645
1646 /* Delay to allow child companion controllers to settle */
1647 mdelay ( EHCI_DISOWN_DELAY_MS );
1648
1649 /* Poll child companion controllers */
1650 ehci_poll_companions ( ehci );
1651
1652 return -ENODEV;
1653 }
1654
1655 /**
1656 * Disable port
1657 *
1658 * @v hub USB hub
1659 * @v port USB port
1660 * @ret rc Return status code
1661 */
1662 static int ehci_root_disable ( struct usb_hub *hub, struct usb_port *port ) {
1663 struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
1664 uint32_t portsc;
1665
1666 /* Disable port */
1667 portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
1668 portsc &= ~( EHCI_PORTSC_PED | EHCI_PORTSC_CHANGE );
1669 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
1670
1671 return 0;
1672 }
1673
1674 /**
1675 * Update root hub port speed
1676 *
1677 * @v hub USB hub
1678 * @v port USB port
1679 * @ret rc Return status code
1680 */
1681 static int ehci_root_speed ( struct usb_hub *hub, struct usb_port *port ) {
1682 struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
1683 uint32_t portsc;
1684 unsigned int speed;
1685 unsigned int line;
1686 int ccs;
1687 int csc;
1688 int ped;
1689
1690 /* Read port status */
1691 portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
1692 DBGC2 ( ehci, "EHCI %s-%d status is %08x\n",
1693 ehci->name, port->address, portsc );
1694 ccs = ( portsc & EHCI_PORTSC_CCS );
1695 csc = ( portsc & EHCI_PORTSC_CSC );
1696 ped = ( portsc & EHCI_PORTSC_PED );
1697 line = EHCI_PORTSC_LINE_STATUS ( portsc );
1698
1699 /* Record disconnections and clear changes */
1700 port->disconnected |= csc;
1701 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
1702
1703 /* Determine port speed */
1704 if ( ! ccs ) {
1705 /* Port not connected */
1706 speed = USB_SPEED_NONE;
1707 } else if ( line == EHCI_PORTSC_LINE_STATUS_LOW ) {
1708 /* Detected as low-speed */
1709 speed = USB_SPEED_LOW;
1710 } else if ( ped ) {
1711 /* Port already enabled: must be high-speed */
1712 speed = USB_SPEED_HIGH;
1713 } else {
1714 /* Not low-speed and not yet enabled. Could be either
1715 * full-speed or high-speed; we can't yet tell.
1716 */
1717 speed = USB_SPEED_FULL;
1718 }
1719 port->speed = speed;
1720 return 0;
1721 }
1722
1723 /**
1724 * Clear transaction translator buffer
1725 *
1726 * @v hub USB hub
1727 * @v port USB port
1728 * @v ep USB endpoint
1729 * @ret rc Return status code
1730 */
1731 static int ehci_root_clear_tt ( struct usb_hub *hub, struct usb_port *port,
1732 struct usb_endpoint *ep ) {
1733 struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
1734
1735 /* Should never be called; this is a root hub */
1736 DBGC ( ehci, "EHCI %s-%d nonsensical CLEAR_TT for %s %s\n", ehci->name,
1737 port->address, ep->usb->name, usb_endpoint_name ( ep ) );
1738
1739 return -ENOTSUP;
1740 }
1741
1742 /**
1743 * Poll for port status changes
1744 *
1745 * @v hub USB hub
1746 * @v port USB port
1747 */
1748 static void ehci_root_poll ( struct usb_hub *hub, struct usb_port *port ) {
1749 struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
1750 uint32_t portsc;
1751 uint32_t change;
1752
1753 /* Do nothing unless something has changed */
1754 portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
1755 change = ( portsc & EHCI_PORTSC_CHANGE );
1756 if ( ! change )
1757 return;
1758
1759 /* Record disconnections and clear changes */
1760 port->disconnected |= ( portsc & EHCI_PORTSC_CSC );
1761 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
1762
1763 /* Report port status change */
1764 usb_port_changed ( port );
1765 }
1766
1767 /******************************************************************************
1768 *
1769 * Bus operations
1770 *
1771 ******************************************************************************
1772 */
1773
1774 /**
1775 * Open USB bus
1776 *
1777 * @v bus USB bus
1778 * @ret rc Return status code
1779 */
1780 static int ehci_bus_open ( struct usb_bus *bus ) {
1781 struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
1782 unsigned int frames;
1783 size_t len;
1784 int rc;
1785
1786 /* Sanity checks */
1787 assert ( list_empty ( &ehci->async ) );
1788 assert ( list_empty ( &ehci->periodic ) );
1789
1790 /* Allocate and initialise asynchronous queue head */
1791 ehci->head = malloc_phys ( sizeof ( *ehci->head ),
1792 ehci_align ( sizeof ( *ehci->head ) ) );
1793 if ( ! ehci->head ) {
1794 rc = -ENOMEM;
1795 goto err_alloc_head;
1796 }
1797 memset ( ehci->head, 0, sizeof ( *ehci->head ) );
1798 ehci->head->chr = cpu_to_le32 ( EHCI_CHR_HEAD );
1799 ehci->head->cache.next = cpu_to_le32 ( EHCI_LINK_TERMINATE );
1800 ehci->head->cache.status = EHCI_STATUS_HALTED;
1801 ehci_async_schedule ( ehci );
1802 writel ( virt_to_phys ( ehci->head ),
1803 ehci->op + EHCI_OP_ASYNCLISTADDR );
1804
1805 /* Use async queue head to determine control data structure segment */
1806 ehci->ctrldssegment =
1807 ( ( ( uint64_t ) virt_to_phys ( ehci->head ) ) >> 32 );
1808 if ( ehci->addr64 ) {
1809 writel ( ehci->ctrldssegment, ehci->op + EHCI_OP_CTRLDSSEGMENT);
1810 } else if ( ehci->ctrldssegment ) {
1811 DBGC ( ehci, "EHCI %s CTRLDSSEGMENT not supported\n",
1812 ehci->name );
1813 rc = -ENOTSUP;
1814 goto err_ctrldssegment;
1815 }
1816
1817 /* Allocate periodic frame list */
1818 frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
1819 len = ( frames * sizeof ( ehci->frame[0] ) );
1820 ehci->frame = malloc_phys ( len, EHCI_PAGE_ALIGN );
1821 if ( ! ehci->frame ) {
1822 rc = -ENOMEM;
1823 goto err_alloc_frame;
1824 }
1825 if ( ( rc = ehci_ctrl_reachable ( ehci, ehci->frame ) ) != 0 ) {
1826 DBGC ( ehci, "EHCI %s frame list unreachable\n", ehci->name );
1827 goto err_unreachable_frame;
1828 }
1829 ehci_periodic_schedule ( ehci );
1830 writel ( virt_to_phys ( ehci->frame ),
1831 ehci->op + EHCI_OP_PERIODICLISTBASE );
1832
1833 /* Start controller */
1834 ehci_run ( ehci );
1835
1836 return 0;
1837
1838 ehci_stop ( ehci );
1839 err_unreachable_frame:
1840 free_phys ( ehci->frame, len );
1841 err_alloc_frame:
1842 err_ctrldssegment:
1843 free_phys ( ehci->head, sizeof ( *ehci->head ) );
1844 err_alloc_head:
1845 return rc;
1846 }
1847
1848 /**
1849 * Close USB bus
1850 *
1851 * @v bus USB bus
1852 */
1853 static void ehci_bus_close ( struct usb_bus *bus ) {
1854 struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
1855 unsigned int frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
1856
1857 /* Sanity checks */
1858 assert ( list_empty ( &ehci->async ) );
1859 assert ( list_empty ( &ehci->periodic ) );
1860
1861 /* Stop controller */
1862 ehci_stop ( ehci );
1863
1864 /* Free periodic frame list */
1865 free_phys ( ehci->frame, ( frames * sizeof ( ehci->frame[0] ) ) );
1866
1867 /* Free asynchronous schedule */
1868 free_phys ( ehci->head, sizeof ( *ehci->head ) );
1869 }
1870
1871 /**
1872 * Poll USB bus
1873 *
1874 * @v bus USB bus
1875 */
1876 static void ehci_bus_poll ( struct usb_bus *bus ) {
1877 struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
1878 struct usb_hub *hub = bus->hub;
1879 struct ehci_endpoint *endpoint;
1880 unsigned int i;
1881 uint32_t usbsts;
1882 uint32_t change;
1883
1884 /* Do nothing unless something has changed */
1885 usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
1886 assert ( usbsts & EHCI_USBSTS_ASYNC );
1887 assert ( usbsts & EHCI_USBSTS_PERIODIC );
1888 assert ( ! ( usbsts & EHCI_USBSTS_HCH ) );
1889 change = ( usbsts & EHCI_USBSTS_CHANGE );
1890 if ( ! change )
1891 return;
1892
1893 /* Acknowledge changes */
1894 writel ( usbsts, ehci->op + EHCI_OP_USBSTS );
1895
1896 /* Process completions, if applicable */
1897 if ( change & ( EHCI_USBSTS_USBINT | EHCI_USBSTS_USBERRINT ) ) {
1898
1899 /* Iterate over all endpoints looking for completed
1900 * descriptors. We trust that completion handlers are
1901 * minimal and will not do anything that could
1902 * plausibly affect the endpoint list itself.
1903 */
1904 list_for_each_entry ( endpoint, &ehci->endpoints, list )
1905 ehci_endpoint_poll ( endpoint );
1906 }
1907
1908 /* Process port status changes, if applicable */
1909 if ( change & EHCI_USBSTS_PORT ) {
1910
1911 /* Iterate over all ports looking for status changes */
1912 for ( i = 1 ; i <= ehci->ports ; i++ )
1913 ehci_root_poll ( hub, usb_port ( hub, i ) );
1914 }
1915
1916 /* Report fatal errors */
1917 if ( change & EHCI_USBSTS_SYSERR )
1918 DBGC ( ehci, "EHCI %s host system error\n", ehci->name );
1919 }
1920
1921 /******************************************************************************
1922 *
1923 * PCI interface
1924 *
1925 ******************************************************************************
1926 */
1927
1928 /** USB host controller operations */
1929 static struct usb_host_operations ehci_operations = {
1930 .endpoint = {
1931 .open = ehci_endpoint_open,
1932 .close = ehci_endpoint_close,
1933 .reset = ehci_endpoint_reset,
1934 .mtu = ehci_endpoint_mtu,
1935 .message = ehci_endpoint_message,
1936 .stream = ehci_endpoint_stream,
1937 },
1938 .device = {
1939 .open = ehci_device_open,
1940 .close = ehci_device_close,
1941 .address = ehci_device_address,
1942 },
1943 .bus = {
1944 .open = ehci_bus_open,
1945 .close = ehci_bus_close,
1946 .poll = ehci_bus_poll,
1947 },
1948 .hub = {
1949 .open = ehci_hub_open,
1950 .close = ehci_hub_close,
1951 },
1952 .root = {
1953 .open = ehci_root_open,
1954 .close = ehci_root_close,
1955 .enable = ehci_root_enable,
1956 .disable = ehci_root_disable,
1957 .speed = ehci_root_speed,
1958 .clear_tt = ehci_root_clear_tt,
1959 },
1960 };
1961
1962 /**
1963 * Probe PCI device
1964 *
1965 * @v pci PCI device
1966 * @ret rc Return status code
1967 */
1968 static int ehci_probe ( struct pci_device *pci ) {
1969 struct ehci_device *ehci;
1970 struct usb_port *port;
1971 unsigned long bar_start;
1972 size_t bar_size;
1973 unsigned int i;
1974 int rc;
1975
1976 /* Allocate and initialise structure */
1977 ehci = zalloc ( sizeof ( *ehci ) );
1978 if ( ! ehci ) {
1979 rc = -ENOMEM;
1980 goto err_alloc;
1981 }
1982 ehci->name = pci->dev.name;
1983 INIT_LIST_HEAD ( &ehci->endpoints );
1984 INIT_LIST_HEAD ( &ehci->async );
1985 INIT_LIST_HEAD ( &ehci->periodic );
1986
1987 /* Fix up PCI device */
1988 adjust_pci_device ( pci );
1989
1990 /* Map registers */
1991 bar_start = pci_bar_start ( pci, EHCI_BAR );
1992 bar_size = pci_bar_size ( pci, EHCI_BAR );
1993 ehci->regs = pci_ioremap ( pci, bar_start, bar_size );
1994 if ( ! ehci->regs ) {
1995 rc = -ENODEV;
1996 goto err_ioremap;
1997 }
1998
1999 /* Initialise EHCI device */
2000 ehci_init ( ehci, ehci->regs );
2001
2002 /* Initialise USB legacy support and claim ownership */
2003 ehci_legacy_init ( ehci, pci );
2004 ehci_legacy_claim ( ehci, pci );
2005
2006 /* Reset device */
2007 if ( ( rc = ehci_reset ( ehci ) ) != 0 )
2008 goto err_reset;
2009
2010 /* Allocate USB bus */
2011 ehci->bus = alloc_usb_bus ( &pci->dev, ehci->ports, EHCI_MTU,
2012 &ehci_operations );
2013 if ( ! ehci->bus ) {
2014 rc = -ENOMEM;
2015 goto err_alloc_bus;
2016 }
2017 usb_bus_set_hostdata ( ehci->bus, ehci );
2018 usb_hub_set_drvdata ( ehci->bus->hub, ehci );
2019
2020 /* Set port protocols */
2021 for ( i = 1 ; i <= ehci->ports ; i++ ) {
2022 port = usb_port ( ehci->bus->hub, i );
2023 port->protocol = USB_PROTO_2_0;
2024 }
2025
2026 /* Register USB bus */
2027 if ( ( rc = register_usb_bus ( ehci->bus ) ) != 0 )
2028 goto err_register;
2029
2030 pci_set_drvdata ( pci, ehci );
2031 return 0;
2032
2033 unregister_usb_bus ( ehci->bus );
2034 err_register:
2035 free_usb_bus ( ehci->bus );
2036 err_alloc_bus:
2037 ehci_reset ( ehci );
2038 err_reset:
2039 ehci_legacy_release ( ehci, pci );
2040 iounmap ( ehci->regs );
2041 err_ioremap:
2042 free ( ehci );
2043 err_alloc:
2044 return rc;
2045 }
2046
2047 /**
2048 * Remove PCI device
2049 *
2050 * @v pci PCI device
2051 */
2052 static void ehci_remove ( struct pci_device *pci ) {
2053 struct ehci_device *ehci = pci_get_drvdata ( pci );
2054 struct usb_bus *bus = ehci->bus;
2055
2056 unregister_usb_bus ( bus );
2057 assert ( list_empty ( &ehci->async ) );
2058 assert ( list_empty ( &ehci->periodic ) );
2059 free_usb_bus ( bus );
2060 ehci_reset ( ehci );
2061 ehci_legacy_release ( ehci, pci );
2062 iounmap ( ehci->regs );
2063 free ( ehci );
2064 }
2065
2066 /** EHCI PCI device IDs */
2067 static struct pci_device_id ehci_ids[] = {
2068 PCI_ROM ( 0xffff, 0xffff, "ehci", "EHCI", 0 ),
2069 };
2070
2071 /** EHCI PCI driver */
2072 struct pci_driver ehci_driver __pci_driver = {
2073 .ids = ehci_ids,
2074 .id_count = ( sizeof ( ehci_ids ) / sizeof ( ehci_ids[0] ) ),
2075 .class = PCI_CLASS_ID ( PCI_CLASS_SERIAL, PCI_CLASS_SERIAL_USB,
2076 PCI_CLASS_SERIAL_USB_EHCI ),
2077 .probe = ehci_probe,
2078 .remove = ehci_remove,
2079 };
2080
2081 /**
2082 * Prepare for exit
2083 *
2084 * @v booting System is shutting down for OS boot
2085 */
2086 static void ehci_shutdown ( int booting ) {
2087 /* If we are shutting down to boot an OS, then prevent the
2088 * release of ownership back to BIOS.
2089 */
2090 ehci_legacy_prevent_release = booting;
2091 }
2092
2093 /** Startup/shutdown function */
2094 struct startup_fn ehci_startup __startup_fn ( STARTUP_LATE ) = {
2095 .name = "ehci",
2096 .shutdown = ehci_shutdown,
2097 };