[init] Show startup and shutdown function names in debug messages
[ipxe.git] / src / drivers / usb / ehci.c
1 /*
2 * Copyright (C) 2014 Michael Brown <mbrown@fensystems.co.uk>.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of the
7 * License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
17 * 02110-1301, USA.
18 *
19 * You can also choose to distribute this program under the terms of
20 * the Unmodified Binary Distribution Licence (as given in the file
21 * COPYING.UBDL), provided that you have satisfied its requirements.
22 */
23
24 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
25
26 #include <stdlib.h>
27 #include <unistd.h>
28 #include <string.h>
29 #include <strings.h>
30 #include <errno.h>
31 #include <byteswap.h>
32 #include <ipxe/malloc.h>
33 #include <ipxe/pci.h>
34 #include <ipxe/usb.h>
35 #include <ipxe/init.h>
36 #include "ehci.h"
37
38 /** @file
39 *
40 * USB Enhanced Host Controller Interface (EHCI) driver
41 *
42 */
43
44 /**
45 * Construct error code from transfer descriptor status
46 *
47 * @v status Transfer descriptor status
48 * @ret rc Error code
49 *
50 * Bits 2-5 of the status code provide some indication as to the root
51 * cause of the error. We incorporate these into the error code as
52 * reported to usb_complete_err().
53 */
54 #define EIO_STATUS( status ) EUNIQ ( EINFO_EIO, ( ( (status) >> 2 ) & 0xf ) )
55
56 /******************************************************************************
57 *
58 * Register access
59 *
60 ******************************************************************************
61 */
62
63 /**
64 * Initialise device
65 *
66 * @v ehci EHCI device
67 * @v regs MMIO registers
68 */
69 static void ehci_init ( struct ehci_device *ehci, void *regs ) {
70 uint32_t hcsparams;
71 uint32_t hccparams;
72 size_t caplength;
73
74 /* Locate capability and operational registers */
75 ehci->cap = regs;
76 caplength = readb ( ehci->cap + EHCI_CAP_CAPLENGTH );
77 ehci->op = ( ehci->cap + caplength );
78 DBGC2 ( ehci, "EHCI %s cap %08lx op %08lx\n", ehci->name,
79 virt_to_phys ( ehci->cap ), virt_to_phys ( ehci->op ) );
80
81 /* Read structural parameters */
82 hcsparams = readl ( ehci->cap + EHCI_CAP_HCSPARAMS );
83 ehci->ports = EHCI_HCSPARAMS_PORTS ( hcsparams );
84 DBGC ( ehci, "EHCI %s has %d ports\n", ehci->name, ehci->ports );
85
86 /* Read capability parameters 1 */
87 hccparams = readl ( ehci->cap + EHCI_CAP_HCCPARAMS );
88 ehci->addr64 = EHCI_HCCPARAMS_ADDR64 ( hccparams );
89 ehci->flsize = ( EHCI_HCCPARAMS_FLSIZE ( hccparams ) ?
90 EHCI_FLSIZE_SMALL : EHCI_FLSIZE_DEFAULT );
91 ehci->eecp = EHCI_HCCPARAMS_EECP ( hccparams );
92 DBGC2 ( ehci, "EHCI %s %d-bit flsize %d\n", ehci->name,
93 ( ehci->addr64 ? 64 : 32 ), ehci->flsize );
94 }
95
96 /**
97 * Find extended capability
98 *
99 * @v ehci EHCI device
100 * @v pci PCI device
101 * @v id Capability ID
102 * @v offset Offset to previous extended capability instance, or zero
103 * @ret offset Offset to extended capability, or zero if not found
104 */
105 static unsigned int ehci_extended_capability ( struct ehci_device *ehci,
106 struct pci_device *pci,
107 unsigned int id,
108 unsigned int offset ) {
109 uint32_t eecp;
110
111 /* Locate the extended capability */
112 while ( 1 ) {
113
114 /* Locate first or next capability as applicable */
115 if ( offset ) {
116 pci_read_config_dword ( pci, offset, &eecp );
117 offset = EHCI_EECP_NEXT ( eecp );
118 } else {
119 offset = ehci->eecp;
120 }
121 if ( ! offset )
122 return 0;
123
124 /* Check if this is the requested capability */
125 pci_read_config_dword ( pci, offset, &eecp );
126 if ( EHCI_EECP_ID ( eecp ) == id )
127 return offset;
128 }
129 }
130
131 /**
132 * Calculate buffer alignment
133 *
134 * @v len Length
135 * @ret align Buffer alignment
136 *
137 * Determine alignment required for a buffer which must be aligned to
138 * at least EHCI_MIN_ALIGN and which must not cross a page boundary.
139 */
140 static inline size_t ehci_align ( size_t len ) {
141 size_t align;
142
143 /* Align to own length (rounded up to a power of two) */
144 align = ( 1 << fls ( len - 1 ) );
145
146 /* Round up to EHCI_MIN_ALIGN if needed */
147 if ( align < EHCI_MIN_ALIGN )
148 align = EHCI_MIN_ALIGN;
149
150 return align;
151 }
152
153 /**
154 * Check control data structure reachability
155 *
156 * @v ehci EHCI device
157 * @v ptr Data structure pointer
158 * @ret rc Return status code
159 */
160 static int ehci_ctrl_reachable ( struct ehci_device *ehci, void *ptr ) {
161 physaddr_t phys = virt_to_phys ( ptr );
162 uint32_t segment;
163
164 /* Always reachable in a 32-bit build */
165 if ( sizeof ( physaddr_t ) <= sizeof ( uint32_t ) )
166 return 0;
167
168 /* Reachable only if control segment matches in a 64-bit build */
169 segment = ( ( ( uint64_t ) phys ) >> 32 );
170 if ( segment == ehci->ctrldssegment )
171 return 0;
172
173 return -ENOTSUP;
174 }
175
176 /******************************************************************************
177 *
178 * Diagnostics
179 *
180 ******************************************************************************
181 */
182
183 /**
184 * Dump host controller registers
185 *
186 * @v ehci EHCI device
187 */
188 static __unused void ehci_dump ( struct ehci_device *ehci ) {
189 uint8_t caplength;
190 uint16_t hciversion;
191 uint32_t hcsparams;
192 uint32_t hccparams;
193 uint32_t usbcmd;
194 uint32_t usbsts;
195 uint32_t usbintr;
196 uint32_t frindex;
197 uint32_t ctrldssegment;
198 uint32_t periodiclistbase;
199 uint32_t asynclistaddr;
200 uint32_t configflag;
201
202 /* Do nothing unless debugging is enabled */
203 if ( ! DBG_LOG )
204 return;
205
206 /* Dump capability registers */
207 caplength = readb ( ehci->cap + EHCI_CAP_CAPLENGTH );
208 hciversion = readw ( ehci->cap + EHCI_CAP_HCIVERSION );
209 hcsparams = readl ( ehci->cap + EHCI_CAP_HCSPARAMS );
210 hccparams = readl ( ehci->cap + EHCI_CAP_HCCPARAMS );
211 DBGC ( ehci, "EHCI %s caplen %02x hciversion %04x hcsparams %08x "
212 "hccparams %08x\n", ehci->name, caplength, hciversion,
213 hcsparams, hccparams );
214
215 /* Dump operational registers */
216 usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
217 usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
218 usbintr = readl ( ehci->op + EHCI_OP_USBINTR );
219 frindex = readl ( ehci->op + EHCI_OP_FRINDEX );
220 ctrldssegment = readl ( ehci->op + EHCI_OP_CTRLDSSEGMENT );
221 periodiclistbase = readl ( ehci->op + EHCI_OP_PERIODICLISTBASE );
222 asynclistaddr = readl ( ehci->op + EHCI_OP_ASYNCLISTADDR );
223 configflag = readl ( ehci->op + EHCI_OP_CONFIGFLAG );
224 DBGC ( ehci, "EHCI %s usbcmd %08x usbsts %08x usbint %08x frindx "
225 "%08x\n", ehci->name, usbcmd, usbsts, usbintr, frindex );
226 DBGC ( ehci, "EHCI %s ctrlds %08x period %08x asyncl %08x cfgflg "
227 "%08x\n", ehci->name, ctrldssegment, periodiclistbase,
228 asynclistaddr, configflag );
229 }
230
231 /******************************************************************************
232 *
233 * USB legacy support
234 *
235 ******************************************************************************
236 */
237
238 /** Prevent the release of ownership back to BIOS */
239 static int ehci_legacy_prevent_release;
240
241 /**
242 * Initialise USB legacy support
243 *
244 * @v ehci EHCI device
245 * @v pci PCI device
246 */
247 static void ehci_legacy_init ( struct ehci_device *ehci,
248 struct pci_device *pci ) {
249 unsigned int legacy;
250 uint8_t bios;
251
252 /* Locate USB legacy support capability (if present) */
253 legacy = ehci_extended_capability ( ehci, pci, EHCI_EECP_ID_LEGACY, 0 );
254 if ( ! legacy ) {
255 /* Not an error; capability may not be present */
256 DBGC ( ehci, "EHCI %s has no USB legacy support capability\n",
257 ehci->name );
258 return;
259 }
260
261 /* Check if legacy USB support is enabled */
262 pci_read_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_BIOS ), &bios );
263 if ( ! ( bios & EHCI_USBLEGSUP_BIOS_OWNED ) ) {
264 /* Not an error; already owned by OS */
265 DBGC ( ehci, "EHCI %s USB legacy support already disabled\n",
266 ehci->name );
267 return;
268 }
269
270 /* Record presence of USB legacy support capability */
271 ehci->legacy = legacy;
272 }
273
274 /**
275 * Claim ownership from BIOS
276 *
277 * @v ehci EHCI device
278 * @v pci PCI device
279 */
280 static void ehci_legacy_claim ( struct ehci_device *ehci,
281 struct pci_device *pci ) {
282 unsigned int legacy = ehci->legacy;
283 uint32_t ctlsts;
284 uint8_t bios;
285 unsigned int i;
286
287 /* Do nothing unless legacy support capability is present */
288 if ( ! legacy )
289 return;
290
291 /* Dump original SMI usage */
292 pci_read_config_dword ( pci, ( legacy + EHCI_USBLEGSUP_CTLSTS ),
293 &ctlsts );
294 if ( ctlsts ) {
295 DBGC ( ehci, "EHCI %s BIOS using SMIs: %08x\n",
296 ehci->name, ctlsts );
297 }
298
299 /* Claim ownership */
300 pci_write_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_OS ),
301 EHCI_USBLEGSUP_OS_OWNED );
302
303 /* Wait for BIOS to release ownership */
304 for ( i = 0 ; i < EHCI_USBLEGSUP_MAX_WAIT_MS ; i++ ) {
305
306 /* Check if BIOS has released ownership */
307 pci_read_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_BIOS ),
308 &bios );
309 if ( ! ( bios & EHCI_USBLEGSUP_BIOS_OWNED ) ) {
310 DBGC ( ehci, "EHCI %s claimed ownership from BIOS\n",
311 ehci->name );
312 pci_read_config_dword ( pci, ( legacy +
313 EHCI_USBLEGSUP_CTLSTS ),
314 &ctlsts );
315 if ( ctlsts ) {
316 DBGC ( ehci, "EHCI %s warning: BIOS retained "
317 "SMIs: %08x\n", ehci->name, ctlsts );
318 }
319 return;
320 }
321
322 /* Delay */
323 mdelay ( 1 );
324 }
325
326 /* BIOS did not release ownership. Claim it forcibly by
327 * disabling all SMIs.
328 */
329 DBGC ( ehci, "EHCI %s could not claim ownership from BIOS: forcibly "
330 "disabling SMIs\n", ehci->name );
331 pci_write_config_dword ( pci, ( legacy + EHCI_USBLEGSUP_CTLSTS ), 0 );
332 }
333
334 /**
335 * Release ownership back to BIOS
336 *
337 * @v ehci EHCI device
338 * @v pci PCI device
339 */
340 static void ehci_legacy_release ( struct ehci_device *ehci,
341 struct pci_device *pci ) {
342 unsigned int legacy = ehci->legacy;
343 uint32_t ctlsts;
344
345 /* Do nothing unless legacy support capability is present */
346 if ( ! legacy )
347 return;
348
349 /* Do nothing if releasing ownership is prevented */
350 if ( ehci_legacy_prevent_release ) {
351 DBGC ( ehci, "EHCI %s not releasing ownership to BIOS\n",
352 ehci->name );
353 return;
354 }
355
356 /* Release ownership */
357 pci_write_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_OS ), 0 );
358 DBGC ( ehci, "EHCI %s released ownership to BIOS\n", ehci->name );
359
360 /* Dump restored SMI usage */
361 pci_read_config_dword ( pci, ( legacy + EHCI_USBLEGSUP_CTLSTS ),
362 &ctlsts );
363 DBGC ( ehci, "EHCI %s BIOS reclaimed SMIs: %08x\n",
364 ehci->name, ctlsts );
365 }
366
367 /******************************************************************************
368 *
369 * Companion controllers
370 *
371 ******************************************************************************
372 */
373
374 /**
375 * Poll child companion controllers
376 *
377 * @v ehci EHCI device
378 */
379 static void ehci_poll_companions ( struct ehci_device *ehci ) {
380 struct usb_bus *bus;
381 struct device_description *desc;
382
383 /* Poll any USB buses belonging to child companion controllers */
384 for_each_usb_bus ( bus ) {
385
386 /* Get underlying devices description */
387 desc = &bus->dev->desc;
388
389 /* Skip buses that are not PCI devices */
390 if ( desc->bus_type != BUS_TYPE_PCI )
391 continue;
392
393 /* Skip buses that are not part of the same PCI device */
394 if ( PCI_FIRST_FUNC ( desc->location ) !=
395 PCI_FIRST_FUNC ( ehci->bus->dev->desc.location ) )
396 continue;
397
398 /* Skip buses that are not UHCI or OHCI PCI devices */
399 if ( ( desc->class != PCI_CLASS ( PCI_CLASS_SERIAL,
400 PCI_CLASS_SERIAL_USB,
401 PCI_CLASS_SERIAL_USB_UHCI ))&&
402 ( desc->class != PCI_CLASS ( PCI_CLASS_SERIAL,
403 PCI_CLASS_SERIAL_USB,
404 PCI_CLASS_SERIAL_USB_OHCI ) ))
405 continue;
406
407 /* Poll child companion controller bus */
408 DBGC2 ( ehci, "EHCI %s polling companion %s\n",
409 ehci->name, bus->name );
410 usb_poll ( bus );
411 }
412 }
413
414 /**
415 * Locate EHCI companion controller
416 *
417 * @v pci PCI device
418 * @ret busdevfn EHCI companion controller bus:dev.fn (if any)
419 */
420 unsigned int ehci_companion ( struct pci_device *pci ) {
421 struct pci_device tmp;
422 unsigned int busdevfn;
423 int rc;
424
425 /* Look for an EHCI function on the same PCI device */
426 busdevfn = pci->busdevfn;
427 while ( ++busdevfn <= PCI_LAST_FUNC ( pci->busdevfn ) ) {
428 pci_init ( &tmp, busdevfn );
429 if ( ( rc = pci_read_config ( &tmp ) ) != 0 )
430 continue;
431 if ( tmp.class == PCI_CLASS ( PCI_CLASS_SERIAL,
432 PCI_CLASS_SERIAL_USB,
433 PCI_CLASS_SERIAL_USB_EHCI ) )
434 return busdevfn;
435 }
436
437 return 0;
438 }
439
440 /******************************************************************************
441 *
442 * Run / stop / reset
443 *
444 ******************************************************************************
445 */
446
447 /**
448 * Start EHCI device
449 *
450 * @v ehci EHCI device
451 */
452 static void ehci_run ( struct ehci_device *ehci ) {
453 uint32_t usbcmd;
454
455 /* Set run/stop bit */
456 usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
457 usbcmd &= ~EHCI_USBCMD_FLSIZE_MASK;
458 usbcmd |= ( EHCI_USBCMD_RUN | EHCI_USBCMD_FLSIZE ( ehci->flsize ) |
459 EHCI_USBCMD_PERIODIC | EHCI_USBCMD_ASYNC );
460 writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
461 }
462
463 /**
464 * Stop EHCI device
465 *
466 * @v ehci EHCI device
467 * @ret rc Return status code
468 */
469 static int ehci_stop ( struct ehci_device *ehci ) {
470 uint32_t usbcmd;
471 uint32_t usbsts;
472 unsigned int i;
473
474 /* Clear run/stop bit */
475 usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
476 usbcmd &= ~( EHCI_USBCMD_RUN | EHCI_USBCMD_PERIODIC |
477 EHCI_USBCMD_ASYNC );
478 writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
479
480 /* Wait for device to stop */
481 for ( i = 0 ; i < EHCI_STOP_MAX_WAIT_MS ; i++ ) {
482
483 /* Check if device is stopped */
484 usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
485 if ( usbsts & EHCI_USBSTS_HCH )
486 return 0;
487
488 /* Delay */
489 mdelay ( 1 );
490 }
491
492 DBGC ( ehci, "EHCI %s timed out waiting for stop\n", ehci->name );
493 return -ETIMEDOUT;
494 }
495
496 /**
497 * Reset EHCI device
498 *
499 * @v ehci EHCI device
500 * @ret rc Return status code
501 */
502 static int ehci_reset ( struct ehci_device *ehci ) {
503 uint32_t usbcmd;
504 unsigned int i;
505 int rc;
506
507 /* The EHCI specification states that resetting a running
508 * device may result in undefined behaviour, so try stopping
509 * it first.
510 */
511 if ( ( rc = ehci_stop ( ehci ) ) != 0 ) {
512 /* Ignore errors and attempt to reset the device anyway */
513 }
514
515 /* Reset device */
516 writel ( EHCI_USBCMD_HCRST, ehci->op + EHCI_OP_USBCMD );
517
518 /* Wait for reset to complete */
519 for ( i = 0 ; i < EHCI_RESET_MAX_WAIT_MS ; i++ ) {
520
521 /* Check if reset is complete */
522 usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
523 if ( ! ( usbcmd & EHCI_USBCMD_HCRST ) )
524 return 0;
525
526 /* Delay */
527 mdelay ( 1 );
528 }
529
530 DBGC ( ehci, "EHCI %s timed out waiting for reset\n", ehci->name );
531 return -ETIMEDOUT;
532 }
533
534 /******************************************************************************
535 *
536 * Transfer descriptor rings
537 *
538 ******************************************************************************
539 */
540
541 /**
542 * Allocate transfer descriptor ring
543 *
544 * @v ehci EHCI device
545 * @v ring Transfer descriptor ring
546 * @ret rc Return status code
547 */
548 static int ehci_ring_alloc ( struct ehci_device *ehci,
549 struct ehci_ring *ring ) {
550 struct ehci_transfer_descriptor *desc;
551 struct ehci_transfer_descriptor *next;
552 unsigned int i;
553 size_t len;
554 uint32_t link;
555 int rc;
556
557 /* Initialise structure */
558 memset ( ring, 0, sizeof ( *ring ) );
559
560 /* Allocate I/O buffers */
561 ring->iobuf = zalloc ( EHCI_RING_COUNT * sizeof ( ring->iobuf[0] ) );
562 if ( ! ring->iobuf ) {
563 rc = -ENOMEM;
564 goto err_alloc_iobuf;
565 }
566
567 /* Allocate queue head */
568 ring->head = malloc_dma ( sizeof ( *ring->head ),
569 ehci_align ( sizeof ( *ring->head ) ) );
570 if ( ! ring->head ) {
571 rc = -ENOMEM;
572 goto err_alloc_queue;
573 }
574 if ( ( rc = ehci_ctrl_reachable ( ehci, ring->head ) ) != 0 ) {
575 DBGC ( ehci, "EHCI %s queue head unreachable\n", ehci->name );
576 goto err_unreachable_queue;
577 }
578 memset ( ring->head, 0, sizeof ( *ring->head ) );
579
580 /* Allocate transfer descriptors */
581 len = ( EHCI_RING_COUNT * sizeof ( ring->desc[0] ) );
582 ring->desc = malloc_dma ( len, sizeof ( ring->desc[0] ) );
583 if ( ! ring->desc ) {
584 rc = -ENOMEM;
585 goto err_alloc_desc;
586 }
587 memset ( ring->desc, 0, len );
588
589 /* Initialise transfer descriptors */
590 for ( i = 0 ; i < EHCI_RING_COUNT ; i++ ) {
591 desc = &ring->desc[i];
592 if ( ( rc = ehci_ctrl_reachable ( ehci, desc ) ) != 0 ) {
593 DBGC ( ehci, "EHCI %s descriptor unreachable\n",
594 ehci->name );
595 goto err_unreachable_desc;
596 }
597 next = &ring->desc[ ( i + 1 ) % EHCI_RING_COUNT ];
598 link = virt_to_phys ( next );
599 desc->next = cpu_to_le32 ( link );
600 desc->alt = cpu_to_le32 ( link );
601 }
602
603 /* Initialise queue head */
604 link = virt_to_phys ( &ring->desc[0] );
605 ring->head->cache.next = cpu_to_le32 ( link );
606
607 return 0;
608
609 err_unreachable_desc:
610 free_dma ( ring->desc, len );
611 err_alloc_desc:
612 err_unreachable_queue:
613 free_dma ( ring->head, sizeof ( *ring->head ) );
614 err_alloc_queue:
615 free ( ring->iobuf );
616 err_alloc_iobuf:
617 return rc;
618 }
619
620 /**
621 * Free transfer descriptor ring
622 *
623 * @v ring Transfer descriptor ring
624 */
625 static void ehci_ring_free ( struct ehci_ring *ring ) {
626 unsigned int i;
627
628 /* Sanity checks */
629 assert ( ehci_ring_fill ( ring ) == 0 );
630 for ( i = 0 ; i < EHCI_RING_COUNT ; i++ )
631 assert ( ring->iobuf[i] == NULL );
632
633 /* Free transfer descriptors */
634 free_dma ( ring->desc, ( EHCI_RING_COUNT * sizeof ( ring->desc[0] ) ) );
635
636 /* Free queue head */
637 free_dma ( ring->head, sizeof ( *ring->head ) );
638
639 /* Free I/O buffers */
640 free ( ring->iobuf );
641 }
642
643 /**
644 * Enqueue transfer descriptors
645 *
646 * @v ehci EHCI device
647 * @v ring Transfer descriptor ring
648 * @v iobuf I/O buffer
649 * @v xfers Transfers
650 * @v count Number of transfers
651 * @ret rc Return status code
652 */
653 static int ehci_enqueue ( struct ehci_device *ehci, struct ehci_ring *ring,
654 struct io_buffer *iobuf,
655 const struct ehci_transfer *xfer,
656 unsigned int count ) {
657 struct ehci_transfer_descriptor *desc;
658 physaddr_t phys;
659 void *data;
660 size_t len;
661 size_t offset;
662 size_t frag_len;
663 unsigned int toggle;
664 unsigned int index;
665 unsigned int i;
666
667 /* Sanity check */
668 assert ( iobuf != NULL );
669 assert ( count > 0 );
670
671 /* Fail if ring does not have sufficient space */
672 if ( ehci_ring_remaining ( ring ) < count )
673 return -ENOBUFS;
674
675 /* Fail if any portion is unreachable */
676 for ( i = 0 ; i < count ; i++ ) {
677 if ( ! xfer[i].len )
678 continue;
679 phys = ( virt_to_phys ( xfer[i].data ) + xfer[i].len - 1 );
680 if ( ( phys > 0xffffffffUL ) && ( ! ehci->addr64 ) )
681 return -ENOTSUP;
682 }
683
684 /* Enqueue each transfer, recording the I/O buffer with the last */
685 for ( ; count ; ring->prod++, xfer++ ) {
686
687 /* Populate descriptor header */
688 index = ( ring->prod % EHCI_RING_COUNT );
689 desc = &ring->desc[index];
690 toggle = ( xfer->flags & EHCI_FL_TOGGLE );
691 assert ( xfer->len <= EHCI_LEN_MASK );
692 assert ( EHCI_FL_TOGGLE == EHCI_LEN_TOGGLE );
693 desc->len = cpu_to_le16 ( xfer->len | toggle );
694 desc->flags = ( xfer->flags | EHCI_FL_CERR_MAX );
695
696 /* Populate buffer pointers */
697 data = xfer->data;
698 len = xfer->len;
699 for ( i = 0 ; len ; i++ ) {
700
701 /* Calculate length of this fragment */
702 phys = virt_to_phys ( data );
703 offset = ( phys & ( EHCI_PAGE_ALIGN - 1 ) );
704 frag_len = ( EHCI_PAGE_ALIGN - offset );
705 if ( frag_len > len )
706 frag_len = len;
707
708 /* Sanity checks */
709 assert ( ( i == 0 ) || ( offset == 0 ) );
710 assert ( i < ( sizeof ( desc->low ) /
711 sizeof ( desc->low[0] ) ) );
712
713 /* Populate buffer pointer */
714 desc->low[i] = cpu_to_le32 ( phys );
715 if ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) ) {
716 desc->high[i] =
717 cpu_to_le32 ( ((uint64_t) phys) >> 32 );
718 }
719
720 /* Move to next fragment */
721 data += frag_len;
722 len -= frag_len;
723 }
724
725 /* Ensure everything is valid before activating descriptor */
726 wmb();
727 desc->status = EHCI_STATUS_ACTIVE;
728
729 /* Record I/O buffer against last ring index */
730 if ( --count == 0 )
731 ring->iobuf[index] = iobuf;
732 }
733
734 return 0;
735 }
736
737 /**
738 * Dequeue a transfer descriptor
739 *
740 * @v ring Transfer descriptor ring
741 * @ret iobuf I/O buffer (or NULL)
742 */
743 static struct io_buffer * ehci_dequeue ( struct ehci_ring *ring ) {
744 struct ehci_transfer_descriptor *desc;
745 struct io_buffer *iobuf;
746 unsigned int index = ( ring->cons % EHCI_RING_COUNT );
747
748 /* Sanity check */
749 assert ( ehci_ring_fill ( ring ) > 0 );
750
751 /* Mark descriptor as inactive (and not halted) */
752 desc = &ring->desc[index];
753 desc->status = 0;
754
755 /* Retrieve I/O buffer */
756 iobuf = ring->iobuf[index];
757 ring->iobuf[index] = NULL;
758
759 /* Update consumer counter */
760 ring->cons++;
761
762 return iobuf;
763 }
764
765 /******************************************************************************
766 *
767 * Schedule management
768 *
769 ******************************************************************************
770 */
771
772 /**
773 * Get link value for a queue head
774 *
775 * @v queue Queue head
776 * @ret link Link value
777 */
778 static inline uint32_t ehci_link_qh ( struct ehci_queue_head *queue ) {
779
780 return ( virt_to_phys ( queue ) | EHCI_LINK_TYPE_QH );
781 }
782
783 /**
784 * (Re)build asynchronous schedule
785 *
786 * @v ehci EHCI device
787 */
788 static void ehci_async_schedule ( struct ehci_device *ehci ) {
789 struct ehci_endpoint *endpoint;
790 struct ehci_queue_head *queue;
791 uint32_t link;
792
793 /* Build schedule in reverse order of execution. Provided
794 * that we only ever add or remove single endpoints, this can
795 * safely run concurrently with hardware execution of the
796 * schedule.
797 */
798 link = ehci_link_qh ( ehci->head );
799 list_for_each_entry_reverse ( endpoint, &ehci->async, schedule ) {
800 queue = endpoint->ring.head;
801 queue->link = cpu_to_le32 ( link );
802 wmb();
803 link = ehci_link_qh ( queue );
804 }
805 ehci->head->link = cpu_to_le32 ( link );
806 wmb();
807 }
808
809 /**
810 * Add endpoint to asynchronous schedule
811 *
812 * @v endpoint Endpoint
813 */
814 static void ehci_async_add ( struct ehci_endpoint *endpoint ) {
815 struct ehci_device *ehci = endpoint->ehci;
816
817 /* Add to end of schedule */
818 list_add_tail ( &endpoint->schedule, &ehci->async );
819
820 /* Rebuild schedule */
821 ehci_async_schedule ( ehci );
822 }
823
824 /**
825 * Remove endpoint from asynchronous schedule
826 *
827 * @v endpoint Endpoint
828 * @ret rc Return status code
829 */
830 static int ehci_async_del ( struct ehci_endpoint *endpoint ) {
831 struct ehci_device *ehci = endpoint->ehci;
832 uint32_t usbcmd;
833 uint32_t usbsts;
834 unsigned int i;
835
836 /* Remove from schedule */
837 list_check_contains_entry ( endpoint, &ehci->async, schedule );
838 list_del ( &endpoint->schedule );
839
840 /* Rebuild schedule */
841 ehci_async_schedule ( ehci );
842
843 /* Request notification when asynchronous schedule advances */
844 usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
845 usbcmd |= EHCI_USBCMD_ASYNC_ADVANCE;
846 writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
847
848 /* Wait for asynchronous schedule to advance */
849 for ( i = 0 ; i < EHCI_ASYNC_ADVANCE_MAX_WAIT_MS ; i++ ) {
850
851 /* Check for asynchronous schedule advancing */
852 usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
853 if ( usbsts & EHCI_USBSTS_ASYNC_ADVANCE ) {
854 usbsts &= ~EHCI_USBSTS_CHANGE;
855 usbsts |= EHCI_USBSTS_ASYNC_ADVANCE;
856 writel ( usbsts, ehci->op + EHCI_OP_USBSTS );
857 return 0;
858 }
859
860 /* Delay */
861 mdelay ( 1 );
862 }
863
864 /* Bad things will probably happen now */
865 DBGC ( ehci, "EHCI %s timed out waiting for asynchronous schedule "
866 "to advance\n", ehci->name );
867 return -ETIMEDOUT;
868 }
869
870 /**
871 * (Re)build periodic schedule
872 *
873 * @v ehci EHCI device
874 */
875 static void ehci_periodic_schedule ( struct ehci_device *ehci ) {
876 struct ehci_endpoint *endpoint;
877 struct ehci_queue_head *queue;
878 uint32_t link;
879 unsigned int frames;
880 unsigned int max_interval;
881 unsigned int i;
882
883 /* Build schedule in reverse order of execution. Provided
884 * that we only ever add or remove single endpoints, this can
885 * safely run concurrently with hardware execution of the
886 * schedule.
887 */
888 DBGCP ( ehci, "EHCI %s periodic schedule: ", ehci->name );
889 link = EHCI_LINK_TERMINATE;
890 list_for_each_entry_reverse ( endpoint, &ehci->periodic, schedule ) {
891 queue = endpoint->ring.head;
892 queue->link = cpu_to_le32 ( link );
893 wmb();
894 DBGCP ( ehci, "%s%d",
895 ( ( link == EHCI_LINK_TERMINATE ) ? "" : "<-" ),
896 endpoint->ep->interval );
897 link = ehci_link_qh ( queue );
898 }
899 DBGCP ( ehci, "\n" );
900
901 /* Populate periodic frame list */
902 DBGCP ( ehci, "EHCI %s periodic frame list:", ehci->name );
903 frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
904 for ( i = 0 ; i < frames ; i++ ) {
905
906 /* Calculate maximum interval (in microframes) which
907 * may appear as part of this frame list.
908 */
909 if ( i == 0 ) {
910 /* Start of list: include all endpoints */
911 max_interval = -1U;
912 } else {
913 /* Calculate highest power-of-two frame interval */
914 max_interval = ( 1 << ( ffs ( i ) - 1 ) );
915 /* Convert to microframes */
916 max_interval <<= 3;
917 /* Round up to nearest 2^n-1 */
918 max_interval = ( ( max_interval << 1 ) - 1 );
919 }
920
921 /* Find first endpoint in schedule satisfying this
922 * maximum interval constraint.
923 */
924 link = EHCI_LINK_TERMINATE;
925 list_for_each_entry ( endpoint, &ehci->periodic, schedule ) {
926 if ( endpoint->ep->interval <= max_interval ) {
927 queue = endpoint->ring.head;
928 link = ehci_link_qh ( queue );
929 DBGCP ( ehci, " %d:%d",
930 i, endpoint->ep->interval );
931 break;
932 }
933 }
934 ehci->frame[i].link = cpu_to_le32 ( link );
935 }
936 wmb();
937 DBGCP ( ehci, "\n" );
938 }
939
940 /**
941 * Add endpoint to periodic schedule
942 *
943 * @v endpoint Endpoint
944 */
945 static void ehci_periodic_add ( struct ehci_endpoint *endpoint ) {
946 struct ehci_device *ehci = endpoint->ehci;
947 struct ehci_endpoint *before;
948 unsigned int interval = endpoint->ep->interval;
949
950 /* Find first endpoint with a smaller interval */
951 list_for_each_entry ( before, &ehci->periodic, schedule ) {
952 if ( before->ep->interval < interval )
953 break;
954 }
955 list_add_tail ( &endpoint->schedule, &before->schedule );
956
957 /* Rebuild schedule */
958 ehci_periodic_schedule ( ehci );
959 }
960
961 /**
962 * Remove endpoint from periodic schedule
963 *
964 * @v endpoint Endpoint
965 * @ret rc Return status code
966 */
967 static int ehci_periodic_del ( struct ehci_endpoint *endpoint ) {
968 struct ehci_device *ehci = endpoint->ehci;
969
970 /* Remove from schedule */
971 list_check_contains_entry ( endpoint, &ehci->periodic, schedule );
972 list_del ( &endpoint->schedule );
973
974 /* Rebuild schedule */
975 ehci_periodic_schedule ( ehci );
976
977 /* Delay for a whole USB frame (with a 100% safety margin) */
978 mdelay ( 2 );
979
980 return 0;
981 }
982
983 /**
984 * Add endpoint to appropriate schedule
985 *
986 * @v endpoint Endpoint
987 */
988 static void ehci_schedule_add ( struct ehci_endpoint *endpoint ) {
989 struct usb_endpoint *ep = endpoint->ep;
990 unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
991
992 if ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) {
993 ehci_periodic_add ( endpoint );
994 } else {
995 ehci_async_add ( endpoint );
996 }
997 }
998
999 /**
1000 * Remove endpoint from appropriate schedule
1001 *
1002 * @v endpoint Endpoint
1003 * @ret rc Return status code
1004 */
1005 static int ehci_schedule_del ( struct ehci_endpoint *endpoint ) {
1006 struct usb_endpoint *ep = endpoint->ep;
1007 unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
1008
1009 if ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) {
1010 return ehci_periodic_del ( endpoint );
1011 } else {
1012 return ehci_async_del ( endpoint );
1013 }
1014 }
1015
1016 /******************************************************************************
1017 *
1018 * Endpoint operations
1019 *
1020 ******************************************************************************
1021 */
1022
1023 /**
1024 * Determine endpoint characteristics
1025 *
1026 * @v ep USB endpoint
1027 * @ret chr Endpoint characteristics
1028 */
1029 static uint32_t ehci_endpoint_characteristics ( struct usb_endpoint *ep ) {
1030 struct usb_device *usb = ep->usb;
1031 unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
1032 uint32_t chr;
1033
1034 /* Determine basic characteristics */
1035 chr = ( EHCI_CHR_ADDRESS ( usb->address ) |
1036 EHCI_CHR_ENDPOINT ( ep->address ) |
1037 EHCI_CHR_MAX_LEN ( ep->mtu ) );
1038
1039 /* Control endpoints require manual control of the data toggle */
1040 if ( attr == USB_ENDPOINT_ATTR_CONTROL )
1041 chr |= EHCI_CHR_TOGGLE;
1042
1043 /* Determine endpoint speed */
1044 if ( usb->speed == USB_SPEED_HIGH ) {
1045 chr |= EHCI_CHR_EPS_HIGH;
1046 } else {
1047 if ( usb->speed == USB_SPEED_FULL ) {
1048 chr |= EHCI_CHR_EPS_FULL;
1049 } else {
1050 chr |= EHCI_CHR_EPS_LOW;
1051 }
1052 if ( attr == USB_ENDPOINT_ATTR_CONTROL )
1053 chr |= EHCI_CHR_CONTROL;
1054 }
1055
1056 return chr;
1057 }
1058
1059 /**
1060 * Determine endpoint capabilities
1061 *
1062 * @v ep USB endpoint
1063 * @ret cap Endpoint capabilities
1064 */
1065 static uint32_t ehci_endpoint_capabilities ( struct usb_endpoint *ep ) {
1066 struct usb_device *usb = ep->usb;
1067 struct usb_port *tt = usb_transaction_translator ( usb );
1068 unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
1069 uint32_t cap;
1070 unsigned int i;
1071
1072 /* Determine basic capabilities */
1073 cap = EHCI_CAP_MULT ( ep->burst + 1 );
1074
1075 /* Determine interrupt schedule mask, if applicable */
1076 if ( ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) &&
1077 ( ( ep->interval != 0 ) /* avoid infinite loop */ ) ) {
1078 for ( i = 0 ; i < 8 /* microframes per frame */ ;
1079 i += ep->interval ) {
1080 cap |= EHCI_CAP_INTR_SCHED ( i );
1081 }
1082 }
1083
1084 /* Set transaction translator hub address and port, if applicable */
1085 if ( tt ) {
1086 assert ( tt->hub->usb );
1087 cap |= ( EHCI_CAP_TT_HUB ( tt->hub->usb->address ) |
1088 EHCI_CAP_TT_PORT ( tt->address ) );
1089 if ( attr == USB_ENDPOINT_ATTR_INTERRUPT )
1090 cap |= EHCI_CAP_SPLIT_SCHED_DEFAULT;
1091 }
1092
1093 return cap;
1094 }
1095
1096 /**
1097 * Update endpoint characteristics and capabilities
1098 *
1099 * @v ep USB endpoint
1100 */
1101 static void ehci_endpoint_update ( struct usb_endpoint *ep ) {
1102 struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
1103 struct ehci_queue_head *head;
1104
1105 /* Update queue characteristics and capabilities */
1106 head = endpoint->ring.head;
1107 head->chr = cpu_to_le32 ( ehci_endpoint_characteristics ( ep ) );
1108 head->cap = cpu_to_le32 ( ehci_endpoint_capabilities ( ep ) );
1109 }
1110
1111 /**
1112 * Open endpoint
1113 *
1114 * @v ep USB endpoint
1115 * @ret rc Return status code
1116 */
1117 static int ehci_endpoint_open ( struct usb_endpoint *ep ) {
1118 struct usb_device *usb = ep->usb;
1119 struct ehci_device *ehci = usb_get_hostdata ( usb );
1120 struct ehci_endpoint *endpoint;
1121 int rc;
1122
1123 /* Allocate and initialise structure */
1124 endpoint = zalloc ( sizeof ( *endpoint ) );
1125 if ( ! endpoint ) {
1126 rc = -ENOMEM;
1127 goto err_alloc;
1128 }
1129 endpoint->ehci = ehci;
1130 endpoint->ep = ep;
1131 usb_endpoint_set_hostdata ( ep, endpoint );
1132
1133 /* Initialise descriptor ring */
1134 if ( ( rc = ehci_ring_alloc ( ehci, &endpoint->ring ) ) != 0 )
1135 goto err_ring_alloc;
1136
1137 /* Update queue characteristics and capabilities */
1138 ehci_endpoint_update ( ep );
1139
1140 /* Add to list of endpoints */
1141 list_add_tail ( &endpoint->list, &ehci->endpoints );
1142
1143 /* Add to schedule */
1144 ehci_schedule_add ( endpoint );
1145
1146 return 0;
1147
1148 ehci_ring_free ( &endpoint->ring );
1149 err_ring_alloc:
1150 free ( endpoint );
1151 err_alloc:
1152 return rc;
1153 }
1154
1155 /**
1156 * Close endpoint
1157 *
1158 * @v ep USB endpoint
1159 */
1160 static void ehci_endpoint_close ( struct usb_endpoint *ep ) {
1161 struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
1162 struct ehci_device *ehci = endpoint->ehci;
1163 struct usb_device *usb = ep->usb;
1164 struct io_buffer *iobuf;
1165 int rc;
1166
1167 /* Remove from schedule */
1168 if ( ( rc = ehci_schedule_del ( endpoint ) ) != 0 ) {
1169 /* No way to prevent hardware from continuing to
1170 * access the memory, so leak it.
1171 */
1172 DBGC ( ehci, "EHCI %s %s could not unschedule: %s\n",
1173 usb->name, usb_endpoint_name ( ep ), strerror ( rc ) );
1174 return;
1175 }
1176
1177 /* Cancel any incomplete transfers */
1178 while ( ehci_ring_fill ( &endpoint->ring ) ) {
1179 iobuf = ehci_dequeue ( &endpoint->ring );
1180 if ( iobuf )
1181 usb_complete_err ( ep, iobuf, -ECANCELED );
1182 }
1183
1184 /* Remove from list of endpoints */
1185 list_del ( &endpoint->list );
1186
1187 /* Free descriptor ring */
1188 ehci_ring_free ( &endpoint->ring );
1189
1190 /* Free endpoint */
1191 free ( endpoint );
1192 }
1193
1194 /**
1195 * Reset endpoint
1196 *
1197 * @v ep USB endpoint
1198 * @ret rc Return status code
1199 */
1200 static int ehci_endpoint_reset ( struct usb_endpoint *ep ) {
1201 struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
1202 struct ehci_ring *ring = &endpoint->ring;
1203 struct ehci_transfer_descriptor *cache = &ring->head->cache;
1204 uint32_t link;
1205
1206 /* Sanity checks */
1207 assert ( ! ( cache->status & EHCI_STATUS_ACTIVE ) );
1208 assert ( cache->status & EHCI_STATUS_HALTED );
1209
1210 /* Reset residual count */
1211 ring->residual = 0;
1212
1213 /* Reset data toggle */
1214 cache->len = 0;
1215
1216 /* Prepare to restart at next unconsumed descriptor */
1217 link = virt_to_phys ( &ring->desc[ ring->cons % EHCI_RING_COUNT ] );
1218 cache->next = cpu_to_le32 ( link );
1219
1220 /* Restart ring */
1221 wmb();
1222 cache->status = 0;
1223
1224 return 0;
1225 }
1226
1227 /**
1228 * Update MTU
1229 *
1230 * @v ep USB endpoint
1231 * @ret rc Return status code
1232 */
1233 static int ehci_endpoint_mtu ( struct usb_endpoint *ep ) {
1234
1235 /* Update endpoint characteristics and capabilities */
1236 ehci_endpoint_update ( ep );
1237
1238 return 0;
1239 }
1240
1241 /**
1242 * Enqueue message transfer
1243 *
1244 * @v ep USB endpoint
1245 * @v iobuf I/O buffer
1246 * @ret rc Return status code
1247 */
1248 static int ehci_endpoint_message ( struct usb_endpoint *ep,
1249 struct io_buffer *iobuf ) {
1250 struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
1251 struct ehci_device *ehci = endpoint->ehci;
1252 struct usb_setup_packet *packet;
1253 unsigned int input;
1254 struct ehci_transfer xfers[3];
1255 struct ehci_transfer *xfer = xfers;
1256 size_t len;
1257 int rc;
1258
1259 /* Construct setup stage */
1260 assert ( iob_len ( iobuf ) >= sizeof ( *packet ) );
1261 packet = iobuf->data;
1262 iob_pull ( iobuf, sizeof ( *packet ) );
1263 xfer->data = packet;
1264 xfer->len = sizeof ( *packet );
1265 xfer->flags = EHCI_FL_PID_SETUP;
1266 xfer++;
1267
1268 /* Construct data stage, if applicable */
1269 len = iob_len ( iobuf );
1270 input = ( packet->request & cpu_to_le16 ( USB_DIR_IN ) );
1271 if ( len ) {
1272 xfer->data = iobuf->data;
1273 xfer->len = len;
1274 xfer->flags = ( EHCI_FL_TOGGLE |
1275 ( input ? EHCI_FL_PID_IN : EHCI_FL_PID_OUT ) );
1276 xfer++;
1277 }
1278
1279 /* Construct status stage */
1280 xfer->data = NULL;
1281 xfer->len = 0;
1282 xfer->flags = ( EHCI_FL_TOGGLE | EHCI_FL_IOC |
1283 ( ( len && input ) ? EHCI_FL_PID_OUT : EHCI_FL_PID_IN));
1284 xfer++;
1285
1286 /* Enqueue transfer */
1287 if ( ( rc = ehci_enqueue ( ehci, &endpoint->ring, iobuf, xfers,
1288 ( xfer - xfers ) ) ) != 0 )
1289 return rc;
1290
1291 return 0;
1292 }
1293
1294 /**
1295 * Calculate number of transfer descriptors
1296 *
1297 * @v len Length of data
1298 * @v zlp Append a zero-length packet
1299 * @ret count Number of transfer descriptors
1300 */
1301 static unsigned int ehci_endpoint_count ( size_t len, int zlp ) {
1302 unsigned int count;
1303
1304 /* Split into 16kB transfers. A single transfer can handle up
1305 * to 20kB if it happens to be page-aligned, or up to 16kB
1306 * with arbitrary alignment. We simplify the code by assuming
1307 * that we can fit only 16kB into each transfer.
1308 */
1309 count = ( ( len + EHCI_MTU - 1 ) / EHCI_MTU );
1310
1311 /* Append a zero-length transfer if applicable */
1312 if ( zlp || ( count == 0 ) )
1313 count++;
1314
1315 return count;
1316 }
1317
1318 /**
1319 * Enqueue stream transfer
1320 *
1321 * @v ep USB endpoint
1322 * @v iobuf I/O buffer
1323 * @v zlp Append a zero-length packet
1324 * @ret rc Return status code
1325 */
1326 static int ehci_endpoint_stream ( struct usb_endpoint *ep,
1327 struct io_buffer *iobuf, int zlp ) {
1328 struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
1329 struct ehci_device *ehci = endpoint->ehci;
1330 void *data = iobuf->data;
1331 size_t len = iob_len ( iobuf );
1332 unsigned int count = ehci_endpoint_count ( len, zlp );
1333 unsigned int input = ( ep->address & USB_DIR_IN );
1334 unsigned int flags = ( input ? EHCI_FL_PID_IN : EHCI_FL_PID_OUT );
1335 struct ehci_transfer xfers[count];
1336 struct ehci_transfer *xfer = xfers;
1337 size_t xfer_len;
1338 unsigned int i;
1339 int rc;
1340
1341 /* Create transfers */
1342 for ( i = 0 ; i < count ; i++ ) {
1343
1344 /* Calculate transfer length */
1345 xfer_len = EHCI_MTU;
1346 if ( xfer_len > len )
1347 xfer_len = len;
1348
1349 /* Create transfer */
1350 xfer->data = data;
1351 xfer->len = xfer_len;
1352 xfer->flags = flags;
1353
1354 /* Move to next transfer */
1355 data += xfer_len;
1356 len -= xfer_len;
1357 xfer++;
1358 }
1359 xfer[-1].flags |= EHCI_FL_IOC;
1360
1361 /* Enqueue transfer */
1362 if ( ( rc = ehci_enqueue ( ehci, &endpoint->ring, iobuf, xfers,
1363 count ) ) != 0 )
1364 return rc;
1365
1366 return 0;
1367 }
1368
1369 /**
1370 * Poll for completions
1371 *
1372 * @v endpoint Endpoint
1373 */
1374 static void ehci_endpoint_poll ( struct ehci_endpoint *endpoint ) {
1375 struct ehci_device *ehci = endpoint->ehci;
1376 struct ehci_ring *ring = &endpoint->ring;
1377 struct ehci_transfer_descriptor *desc;
1378 struct usb_endpoint *ep = endpoint->ep;
1379 struct usb_device *usb = ep->usb;
1380 struct io_buffer *iobuf;
1381 unsigned int index;
1382 unsigned int status;
1383 int rc;
1384
1385 /* Consume all completed descriptors */
1386 while ( ehci_ring_fill ( &endpoint->ring ) ) {
1387
1388 /* Stop if we reach an uncompleted descriptor */
1389 rmb();
1390 index = ( ring->cons % EHCI_RING_COUNT );
1391 desc = &ring->desc[index];
1392 status = desc->status;
1393 if ( status & EHCI_STATUS_ACTIVE )
1394 break;
1395
1396 /* Consume this descriptor */
1397 iobuf = ehci_dequeue ( ring );
1398
1399 /* If we have encountered an error, then consume all
1400 * remaining descriptors in this transaction, report
1401 * the error to the USB core, and stop further
1402 * processing.
1403 */
1404 if ( status & EHCI_STATUS_HALTED ) {
1405 rc = -EIO_STATUS ( status );
1406 DBGC ( ehci, "EHCI %s %s completion %d failed (status "
1407 "%02x): %s\n", usb->name,
1408 usb_endpoint_name ( ep ), index, status,
1409 strerror ( rc ) );
1410 while ( ! iobuf )
1411 iobuf = ehci_dequeue ( ring );
1412 usb_complete_err ( endpoint->ep, iobuf, rc );
1413 return;
1414 }
1415
1416 /* Accumulate residual data count */
1417 ring->residual += ( le16_to_cpu ( desc->len ) & EHCI_LEN_MASK );
1418
1419 /* If this is not the end of a transaction (i.e. has
1420 * no I/O buffer), then continue to next descriptor.
1421 */
1422 if ( ! iobuf )
1423 continue;
1424
1425 /* Update I/O buffer length */
1426 iob_unput ( iobuf, ring->residual );
1427 ring->residual = 0;
1428
1429 /* Report completion to USB core */
1430 usb_complete ( endpoint->ep, iobuf );
1431 }
1432 }
1433
1434 /******************************************************************************
1435 *
1436 * Device operations
1437 *
1438 ******************************************************************************
1439 */
1440
1441 /**
1442 * Open device
1443 *
1444 * @v usb USB device
1445 * @ret rc Return status code
1446 */
1447 static int ehci_device_open ( struct usb_device *usb ) {
1448 struct ehci_device *ehci = usb_bus_get_hostdata ( usb->port->hub->bus );
1449
1450 usb_set_hostdata ( usb, ehci );
1451 return 0;
1452 }
1453
1454 /**
1455 * Close device
1456 *
1457 * @v usb USB device
1458 */
1459 static void ehci_device_close ( struct usb_device *usb ) {
1460 struct ehci_device *ehci = usb_get_hostdata ( usb );
1461 struct usb_bus *bus = ehci->bus;
1462
1463 /* Free device address, if assigned */
1464 if ( usb->address )
1465 usb_free_address ( bus, usb->address );
1466 }
1467
1468 /**
1469 * Assign device address
1470 *
1471 * @v usb USB device
1472 * @ret rc Return status code
1473 */
1474 static int ehci_device_address ( struct usb_device *usb ) {
1475 struct ehci_device *ehci = usb_get_hostdata ( usb );
1476 struct usb_bus *bus = ehci->bus;
1477 struct usb_endpoint *ep0 = usb_endpoint ( usb, USB_EP0_ADDRESS );
1478 int address;
1479 int rc;
1480
1481 /* Sanity checks */
1482 assert ( usb->address == 0 );
1483 assert ( ep0 != NULL );
1484
1485 /* Allocate device address */
1486 address = usb_alloc_address ( bus );
1487 if ( address < 0 ) {
1488 rc = address;
1489 DBGC ( ehci, "EHCI %s could not allocate address: %s\n",
1490 usb->name, strerror ( rc ) );
1491 goto err_alloc_address;
1492 }
1493
1494 /* Set address */
1495 if ( ( rc = usb_set_address ( usb, address ) ) != 0 )
1496 goto err_set_address;
1497
1498 /* Update device address */
1499 usb->address = address;
1500
1501 /* Update control endpoint characteristics and capabilities */
1502 ehci_endpoint_update ( ep0 );
1503
1504 return 0;
1505
1506 err_set_address:
1507 usb_free_address ( bus, address );
1508 err_alloc_address:
1509 return rc;
1510 }
1511
1512 /******************************************************************************
1513 *
1514 * Hub operations
1515 *
1516 ******************************************************************************
1517 */
1518
1519 /**
1520 * Open hub
1521 *
1522 * @v hub USB hub
1523 * @ret rc Return status code
1524 */
1525 static int ehci_hub_open ( struct usb_hub *hub __unused ) {
1526
1527 /* Nothing to do */
1528 return 0;
1529 }
1530
1531 /**
1532 * Close hub
1533 *
1534 * @v hub USB hub
1535 */
1536 static void ehci_hub_close ( struct usb_hub *hub __unused ) {
1537
1538 /* Nothing to do */
1539 }
1540
1541 /******************************************************************************
1542 *
1543 * Root hub operations
1544 *
1545 ******************************************************************************
1546 */
1547
1548 /**
1549 * Open root hub
1550 *
1551 * @v hub USB hub
1552 * @ret rc Return status code
1553 */
1554 static int ehci_root_open ( struct usb_hub *hub ) {
1555 struct usb_bus *bus = hub->bus;
1556 struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
1557 uint32_t portsc;
1558 unsigned int i;
1559
1560 /* Route all ports to EHCI controller */
1561 writel ( EHCI_CONFIGFLAG_CF, ehci->op + EHCI_OP_CONFIGFLAG );
1562
1563 /* Enable power to all ports */
1564 for ( i = 1 ; i <= ehci->ports ; i++ ) {
1565 portsc = readl ( ehci->op + EHCI_OP_PORTSC ( i ) );
1566 portsc &= ~EHCI_PORTSC_CHANGE;
1567 portsc |= EHCI_PORTSC_PP;
1568 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( i ) );
1569 }
1570
1571 /* Wait 20ms after potentially enabling power to a port */
1572 mdelay ( EHCI_PORT_POWER_DELAY_MS );
1573
1574 /* Record hub driver private data */
1575 usb_hub_set_drvdata ( hub, ehci );
1576
1577 return 0;
1578 }
1579
1580 /**
1581 * Close root hub
1582 *
1583 * @v hub USB hub
1584 */
1585 static void ehci_root_close ( struct usb_hub *hub ) {
1586 struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
1587
1588 /* Route all ports back to companion controllers */
1589 writel ( 0, ehci->op + EHCI_OP_CONFIGFLAG );
1590
1591 /* Clear hub driver private data */
1592 usb_hub_set_drvdata ( hub, NULL );
1593 }
1594
1595 /**
1596 * Enable port
1597 *
1598 * @v hub USB hub
1599 * @v port USB port
1600 * @ret rc Return status code
1601 */
1602 static int ehci_root_enable ( struct usb_hub *hub, struct usb_port *port ) {
1603 struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
1604 uint32_t portsc;
1605 unsigned int line;
1606 unsigned int i;
1607
1608 /* Check for a low-speed device */
1609 portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
1610 line = EHCI_PORTSC_LINE_STATUS ( portsc );
1611 if ( line == EHCI_PORTSC_LINE_STATUS_LOW ) {
1612 DBGC ( ehci, "EHCI %s-%d detected low-speed device: "
1613 "disowning\n", ehci->name, port->address );
1614 goto disown;
1615 }
1616
1617 /* Reset port */
1618 portsc &= ~( EHCI_PORTSC_PED | EHCI_PORTSC_CHANGE );
1619 portsc |= EHCI_PORTSC_PR;
1620 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
1621 mdelay ( USB_RESET_DELAY_MS );
1622 portsc &= ~EHCI_PORTSC_PR;
1623 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
1624
1625 /* Wait for reset to complete */
1626 for ( i = 0 ; i < EHCI_PORT_RESET_MAX_WAIT_MS ; i++ ) {
1627
1628 /* Check port status */
1629 portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
1630 if ( ! ( portsc & EHCI_PORTSC_PR ) ) {
1631 if ( portsc & EHCI_PORTSC_PED )
1632 return 0;
1633 DBGC ( ehci, "EHCI %s-%d not enabled after reset: "
1634 "disowning\n", ehci->name, port->address );
1635 goto disown;
1636 }
1637
1638 /* Delay */
1639 mdelay ( 1 );
1640 }
1641
1642 DBGC ( ehci, "EHCI %s-%d timed out waiting for port to reset\n",
1643 ehci->name, port->address );
1644 return -ETIMEDOUT;
1645
1646 disown:
1647 /* Disown port */
1648 portsc &= ~EHCI_PORTSC_CHANGE;
1649 portsc |= EHCI_PORTSC_OWNER;
1650 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
1651
1652 /* Delay to allow child companion controllers to settle */
1653 mdelay ( EHCI_DISOWN_DELAY_MS );
1654
1655 /* Poll child companion controllers */
1656 ehci_poll_companions ( ehci );
1657
1658 return -ENODEV;
1659 }
1660
1661 /**
1662 * Disable port
1663 *
1664 * @v hub USB hub
1665 * @v port USB port
1666 * @ret rc Return status code
1667 */
1668 static int ehci_root_disable ( struct usb_hub *hub, struct usb_port *port ) {
1669 struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
1670 uint32_t portsc;
1671
1672 /* Disable port */
1673 portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
1674 portsc &= ~( EHCI_PORTSC_PED | EHCI_PORTSC_CHANGE );
1675 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
1676
1677 return 0;
1678 }
1679
1680 /**
1681 * Update root hub port speed
1682 *
1683 * @v hub USB hub
1684 * @v port USB port
1685 * @ret rc Return status code
1686 */
1687 static int ehci_root_speed ( struct usb_hub *hub, struct usb_port *port ) {
1688 struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
1689 uint32_t portsc;
1690 unsigned int speed;
1691 unsigned int line;
1692 int ccs;
1693 int csc;
1694 int ped;
1695
1696 /* Read port status */
1697 portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
1698 DBGC2 ( ehci, "EHCI %s-%d status is %08x\n",
1699 ehci->name, port->address, portsc );
1700 ccs = ( portsc & EHCI_PORTSC_CCS );
1701 csc = ( portsc & EHCI_PORTSC_CSC );
1702 ped = ( portsc & EHCI_PORTSC_PED );
1703 line = EHCI_PORTSC_LINE_STATUS ( portsc );
1704
1705 /* Record disconnections and clear changes */
1706 port->disconnected |= csc;
1707 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
1708
1709 /* Determine port speed */
1710 if ( ! ccs ) {
1711 /* Port not connected */
1712 speed = USB_SPEED_NONE;
1713 } else if ( line == EHCI_PORTSC_LINE_STATUS_LOW ) {
1714 /* Detected as low-speed */
1715 speed = USB_SPEED_LOW;
1716 } else if ( ped ) {
1717 /* Port already enabled: must be high-speed */
1718 speed = USB_SPEED_HIGH;
1719 } else {
1720 /* Not low-speed and not yet enabled. Could be either
1721 * full-speed or high-speed; we can't yet tell.
1722 */
1723 speed = USB_SPEED_FULL;
1724 }
1725 port->speed = speed;
1726 return 0;
1727 }
1728
1729 /**
1730 * Clear transaction translator buffer
1731 *
1732 * @v hub USB hub
1733 * @v port USB port
1734 * @v ep USB endpoint
1735 * @ret rc Return status code
1736 */
1737 static int ehci_root_clear_tt ( struct usb_hub *hub, struct usb_port *port,
1738 struct usb_endpoint *ep ) {
1739 struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
1740
1741 /* Should never be called; this is a root hub */
1742 DBGC ( ehci, "EHCI %s-%d nonsensical CLEAR_TT for %s %s\n", ehci->name,
1743 port->address, ep->usb->name, usb_endpoint_name ( ep ) );
1744
1745 return -ENOTSUP;
1746 }
1747
1748 /**
1749 * Poll for port status changes
1750 *
1751 * @v hub USB hub
1752 * @v port USB port
1753 */
1754 static void ehci_root_poll ( struct usb_hub *hub, struct usb_port *port ) {
1755 struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
1756 uint32_t portsc;
1757 uint32_t change;
1758
1759 /* Do nothing unless something has changed */
1760 portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
1761 change = ( portsc & EHCI_PORTSC_CHANGE );
1762 if ( ! change )
1763 return;
1764
1765 /* Record disconnections and clear changes */
1766 port->disconnected |= ( portsc & EHCI_PORTSC_CSC );
1767 writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
1768
1769 /* Report port status change */
1770 usb_port_changed ( port );
1771 }
1772
1773 /******************************************************************************
1774 *
1775 * Bus operations
1776 *
1777 ******************************************************************************
1778 */
1779
1780 /**
1781 * Open USB bus
1782 *
1783 * @v bus USB bus
1784 * @ret rc Return status code
1785 */
1786 static int ehci_bus_open ( struct usb_bus *bus ) {
1787 struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
1788 unsigned int frames;
1789 size_t len;
1790 int rc;
1791
1792 /* Sanity checks */
1793 assert ( list_empty ( &ehci->async ) );
1794 assert ( list_empty ( &ehci->periodic ) );
1795
1796 /* Allocate and initialise asynchronous queue head */
1797 ehci->head = malloc_dma ( sizeof ( *ehci->head ),
1798 ehci_align ( sizeof ( *ehci->head ) ) );
1799 if ( ! ehci->head ) {
1800 rc = -ENOMEM;
1801 goto err_alloc_head;
1802 }
1803 memset ( ehci->head, 0, sizeof ( *ehci->head ) );
1804 ehci->head->chr = cpu_to_le32 ( EHCI_CHR_HEAD );
1805 ehci->head->cache.next = cpu_to_le32 ( EHCI_LINK_TERMINATE );
1806 ehci->head->cache.status = EHCI_STATUS_HALTED;
1807 ehci_async_schedule ( ehci );
1808 writel ( virt_to_phys ( ehci->head ),
1809 ehci->op + EHCI_OP_ASYNCLISTADDR );
1810
1811 /* Use async queue head to determine control data structure segment */
1812 ehci->ctrldssegment =
1813 ( ( ( uint64_t ) virt_to_phys ( ehci->head ) ) >> 32 );
1814 if ( ehci->addr64 ) {
1815 writel ( ehci->ctrldssegment, ehci->op + EHCI_OP_CTRLDSSEGMENT);
1816 } else if ( ehci->ctrldssegment ) {
1817 DBGC ( ehci, "EHCI %s CTRLDSSEGMENT not supported\n",
1818 ehci->name );
1819 rc = -ENOTSUP;
1820 goto err_ctrldssegment;
1821 }
1822
1823 /* Allocate periodic frame list */
1824 frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
1825 len = ( frames * sizeof ( ehci->frame[0] ) );
1826 ehci->frame = malloc_dma ( len, EHCI_PAGE_ALIGN );
1827 if ( ! ehci->frame ) {
1828 rc = -ENOMEM;
1829 goto err_alloc_frame;
1830 }
1831 if ( ( rc = ehci_ctrl_reachable ( ehci, ehci->frame ) ) != 0 ) {
1832 DBGC ( ehci, "EHCI %s frame list unreachable\n", ehci->name );
1833 goto err_unreachable_frame;
1834 }
1835 ehci_periodic_schedule ( ehci );
1836 writel ( virt_to_phys ( ehci->frame ),
1837 ehci->op + EHCI_OP_PERIODICLISTBASE );
1838
1839 /* Start controller */
1840 ehci_run ( ehci );
1841
1842 return 0;
1843
1844 ehci_stop ( ehci );
1845 err_unreachable_frame:
1846 free_dma ( ehci->frame, len );
1847 err_alloc_frame:
1848 err_ctrldssegment:
1849 free_dma ( ehci->head, sizeof ( *ehci->head ) );
1850 err_alloc_head:
1851 return rc;
1852 }
1853
1854 /**
1855 * Close USB bus
1856 *
1857 * @v bus USB bus
1858 */
1859 static void ehci_bus_close ( struct usb_bus *bus ) {
1860 struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
1861 unsigned int frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
1862
1863 /* Sanity checks */
1864 assert ( list_empty ( &ehci->async ) );
1865 assert ( list_empty ( &ehci->periodic ) );
1866
1867 /* Stop controller */
1868 ehci_stop ( ehci );
1869
1870 /* Free periodic frame list */
1871 free_dma ( ehci->frame, ( frames * sizeof ( ehci->frame[0] ) ) );
1872
1873 /* Free asynchronous schedule */
1874 free_dma ( ehci->head, sizeof ( *ehci->head ) );
1875 }
1876
1877 /**
1878 * Poll USB bus
1879 *
1880 * @v bus USB bus
1881 */
1882 static void ehci_bus_poll ( struct usb_bus *bus ) {
1883 struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
1884 struct usb_hub *hub = bus->hub;
1885 struct ehci_endpoint *endpoint;
1886 unsigned int i;
1887 uint32_t usbsts;
1888 uint32_t change;
1889
1890 /* Do nothing unless something has changed */
1891 usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
1892 assert ( usbsts & EHCI_USBSTS_ASYNC );
1893 assert ( usbsts & EHCI_USBSTS_PERIODIC );
1894 assert ( ! ( usbsts & EHCI_USBSTS_HCH ) );
1895 change = ( usbsts & EHCI_USBSTS_CHANGE );
1896 if ( ! change )
1897 return;
1898
1899 /* Acknowledge changes */
1900 writel ( usbsts, ehci->op + EHCI_OP_USBSTS );
1901
1902 /* Process completions, if applicable */
1903 if ( change & ( EHCI_USBSTS_USBINT | EHCI_USBSTS_USBERRINT ) ) {
1904
1905 /* Iterate over all endpoints looking for completed
1906 * descriptors. We trust that completion handlers are
1907 * minimal and will not do anything that could
1908 * plausibly affect the endpoint list itself.
1909 */
1910 list_for_each_entry ( endpoint, &ehci->endpoints, list )
1911 ehci_endpoint_poll ( endpoint );
1912 }
1913
1914 /* Process port status changes, if applicable */
1915 if ( change & EHCI_USBSTS_PORT ) {
1916
1917 /* Iterate over all ports looking for status changes */
1918 for ( i = 1 ; i <= ehci->ports ; i++ )
1919 ehci_root_poll ( hub, usb_port ( hub, i ) );
1920 }
1921
1922 /* Report fatal errors */
1923 if ( change & EHCI_USBSTS_SYSERR )
1924 DBGC ( ehci, "EHCI %s host system error\n", ehci->name );
1925 }
1926
1927 /******************************************************************************
1928 *
1929 * PCI interface
1930 *
1931 ******************************************************************************
1932 */
1933
1934 /** USB host controller operations */
1935 static struct usb_host_operations ehci_operations = {
1936 .endpoint = {
1937 .open = ehci_endpoint_open,
1938 .close = ehci_endpoint_close,
1939 .reset = ehci_endpoint_reset,
1940 .mtu = ehci_endpoint_mtu,
1941 .message = ehci_endpoint_message,
1942 .stream = ehci_endpoint_stream,
1943 },
1944 .device = {
1945 .open = ehci_device_open,
1946 .close = ehci_device_close,
1947 .address = ehci_device_address,
1948 },
1949 .bus = {
1950 .open = ehci_bus_open,
1951 .close = ehci_bus_close,
1952 .poll = ehci_bus_poll,
1953 },
1954 .hub = {
1955 .open = ehci_hub_open,
1956 .close = ehci_hub_close,
1957 },
1958 .root = {
1959 .open = ehci_root_open,
1960 .close = ehci_root_close,
1961 .enable = ehci_root_enable,
1962 .disable = ehci_root_disable,
1963 .speed = ehci_root_speed,
1964 .clear_tt = ehci_root_clear_tt,
1965 },
1966 };
1967
1968 /**
1969 * Probe PCI device
1970 *
1971 * @v pci PCI device
1972 * @ret rc Return status code
1973 */
1974 static int ehci_probe ( struct pci_device *pci ) {
1975 struct ehci_device *ehci;
1976 struct usb_port *port;
1977 unsigned long bar_start;
1978 size_t bar_size;
1979 unsigned int i;
1980 int rc;
1981
1982 /* Allocate and initialise structure */
1983 ehci = zalloc ( sizeof ( *ehci ) );
1984 if ( ! ehci ) {
1985 rc = -ENOMEM;
1986 goto err_alloc;
1987 }
1988 ehci->name = pci->dev.name;
1989 INIT_LIST_HEAD ( &ehci->endpoints );
1990 INIT_LIST_HEAD ( &ehci->async );
1991 INIT_LIST_HEAD ( &ehci->periodic );
1992
1993 /* Fix up PCI device */
1994 adjust_pci_device ( pci );
1995
1996 /* Map registers */
1997 bar_start = pci_bar_start ( pci, EHCI_BAR );
1998 bar_size = pci_bar_size ( pci, EHCI_BAR );
1999 ehci->regs = ioremap ( bar_start, bar_size );
2000 if ( ! ehci->regs ) {
2001 rc = -ENODEV;
2002 goto err_ioremap;
2003 }
2004
2005 /* Initialise EHCI device */
2006 ehci_init ( ehci, ehci->regs );
2007
2008 /* Initialise USB legacy support and claim ownership */
2009 ehci_legacy_init ( ehci, pci );
2010 ehci_legacy_claim ( ehci, pci );
2011
2012 /* Reset device */
2013 if ( ( rc = ehci_reset ( ehci ) ) != 0 )
2014 goto err_reset;
2015
2016 /* Allocate USB bus */
2017 ehci->bus = alloc_usb_bus ( &pci->dev, ehci->ports, EHCI_MTU,
2018 &ehci_operations );
2019 if ( ! ehci->bus ) {
2020 rc = -ENOMEM;
2021 goto err_alloc_bus;
2022 }
2023 usb_bus_set_hostdata ( ehci->bus, ehci );
2024 usb_hub_set_drvdata ( ehci->bus->hub, ehci );
2025
2026 /* Set port protocols */
2027 for ( i = 1 ; i <= ehci->ports ; i++ ) {
2028 port = usb_port ( ehci->bus->hub, i );
2029 port->protocol = USB_PROTO_2_0;
2030 }
2031
2032 /* Register USB bus */
2033 if ( ( rc = register_usb_bus ( ehci->bus ) ) != 0 )
2034 goto err_register;
2035
2036 pci_set_drvdata ( pci, ehci );
2037 return 0;
2038
2039 unregister_usb_bus ( ehci->bus );
2040 err_register:
2041 free_usb_bus ( ehci->bus );
2042 err_alloc_bus:
2043 ehci_reset ( ehci );
2044 err_reset:
2045 ehci_legacy_release ( ehci, pci );
2046 iounmap ( ehci->regs );
2047 err_ioremap:
2048 free ( ehci );
2049 err_alloc:
2050 return rc;
2051 }
2052
2053 /**
2054 * Remove PCI device
2055 *
2056 * @v pci PCI device
2057 */
2058 static void ehci_remove ( struct pci_device *pci ) {
2059 struct ehci_device *ehci = pci_get_drvdata ( pci );
2060 struct usb_bus *bus = ehci->bus;
2061
2062 unregister_usb_bus ( bus );
2063 assert ( list_empty ( &ehci->async ) );
2064 assert ( list_empty ( &ehci->periodic ) );
2065 free_usb_bus ( bus );
2066 ehci_reset ( ehci );
2067 ehci_legacy_release ( ehci, pci );
2068 iounmap ( ehci->regs );
2069 free ( ehci );
2070 }
2071
2072 /** EHCI PCI device IDs */
2073 static struct pci_device_id ehci_ids[] = {
2074 PCI_ROM ( 0xffff, 0xffff, "ehci", "EHCI", 0 ),
2075 };
2076
2077 /** EHCI PCI driver */
2078 struct pci_driver ehci_driver __pci_driver = {
2079 .ids = ehci_ids,
2080 .id_count = ( sizeof ( ehci_ids ) / sizeof ( ehci_ids[0] ) ),
2081 .class = PCI_CLASS_ID ( PCI_CLASS_SERIAL, PCI_CLASS_SERIAL_USB,
2082 PCI_CLASS_SERIAL_USB_EHCI ),
2083 .probe = ehci_probe,
2084 .remove = ehci_remove,
2085 };
2086
2087 /**
2088 * Prepare for exit
2089 *
2090 * @v booting System is shutting down for OS boot
2091 */
2092 static void ehci_shutdown ( int booting ) {
2093 /* If we are shutting down to boot an OS, then prevent the
2094 * release of ownership back to BIOS.
2095 */
2096 ehci_legacy_prevent_release = booting;
2097 }
2098
2099 /** Startup/shutdown function */
2100 struct startup_fn ehci_startup __startup_fn ( STARTUP_LATE ) = {
2101 .name = "ehci",
2102 .shutdown = ehci_shutdown,
2103 };