cirrus: fix off-by-one in cirrus_bitblt_rop_bkwd_transp_*_16
[qemu.git] / disas.c
1 /* General "disassemble this chunk" code. Used for debugging. */
2 #include "qemu/osdep.h"
3 #include "qemu-common.h"
4 #include "disas/bfd.h"
5 #include "elf.h"
6
7 #include "cpu.h"
8 #include "disas/disas.h"
9
10 typedef struct CPUDebug {
11 struct disassemble_info info;
12 CPUState *cpu;
13 } CPUDebug;
14
15 /* Filled in by elfload.c. Simplistic, but will do for now. */
16 struct syminfo *syminfos = NULL;
17
18 /* Get LENGTH bytes from info's buffer, at target address memaddr.
19 Transfer them to myaddr. */
20 int
21 buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
22 struct disassemble_info *info)
23 {
24 if (memaddr < info->buffer_vma
25 || memaddr + length > info->buffer_vma + info->buffer_length)
26 /* Out of bounds. Use EIO because GDB uses it. */
27 return EIO;
28 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
29 return 0;
30 }
31
32 /* Get LENGTH bytes from info's buffer, at target address memaddr.
33 Transfer them to myaddr. */
34 static int
35 target_read_memory (bfd_vma memaddr,
36 bfd_byte *myaddr,
37 int length,
38 struct disassemble_info *info)
39 {
40 CPUDebug *s = container_of(info, CPUDebug, info);
41
42 cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
43 return 0;
44 }
45
46 /* Print an error message. We can assume that this is in response to
47 an error return from buffer_read_memory. */
48 void
49 perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
50 {
51 if (status != EIO)
52 /* Can't happen. */
53 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
54 else
55 /* Actually, address between memaddr and memaddr + len was
56 out of bounds. */
57 (*info->fprintf_func) (info->stream,
58 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
59 }
60
61 /* This could be in a separate file, to save minuscule amounts of space
62 in statically linked executables. */
63
64 /* Just print the address is hex. This is included for completeness even
65 though both GDB and objdump provide their own (to print symbolic
66 addresses). */
67
68 void
69 generic_print_address (bfd_vma addr, struct disassemble_info *info)
70 {
71 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
72 }
73
74 /* Print address in hex, truncated to the width of a host virtual address. */
75 static void
76 generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
77 {
78 uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
79 generic_print_address(addr & mask, info);
80 }
81
82 /* Just return the given address. */
83
84 int
85 generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
86 {
87 return 1;
88 }
89
90 bfd_vma bfd_getl64 (const bfd_byte *addr)
91 {
92 unsigned long long v;
93
94 v = (unsigned long long) addr[0];
95 v |= (unsigned long long) addr[1] << 8;
96 v |= (unsigned long long) addr[2] << 16;
97 v |= (unsigned long long) addr[3] << 24;
98 v |= (unsigned long long) addr[4] << 32;
99 v |= (unsigned long long) addr[5] << 40;
100 v |= (unsigned long long) addr[6] << 48;
101 v |= (unsigned long long) addr[7] << 56;
102 return (bfd_vma) v;
103 }
104
105 bfd_vma bfd_getl32 (const bfd_byte *addr)
106 {
107 unsigned long v;
108
109 v = (unsigned long) addr[0];
110 v |= (unsigned long) addr[1] << 8;
111 v |= (unsigned long) addr[2] << 16;
112 v |= (unsigned long) addr[3] << 24;
113 return (bfd_vma) v;
114 }
115
116 bfd_vma bfd_getb32 (const bfd_byte *addr)
117 {
118 unsigned long v;
119
120 v = (unsigned long) addr[0] << 24;
121 v |= (unsigned long) addr[1] << 16;
122 v |= (unsigned long) addr[2] << 8;
123 v |= (unsigned long) addr[3];
124 return (bfd_vma) v;
125 }
126
127 bfd_vma bfd_getl16 (const bfd_byte *addr)
128 {
129 unsigned long v;
130
131 v = (unsigned long) addr[0];
132 v |= (unsigned long) addr[1] << 8;
133 return (bfd_vma) v;
134 }
135
136 bfd_vma bfd_getb16 (const bfd_byte *addr)
137 {
138 unsigned long v;
139
140 v = (unsigned long) addr[0] << 24;
141 v |= (unsigned long) addr[1] << 16;
142 return (bfd_vma) v;
143 }
144
145 static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
146 const char *prefix)
147 {
148 int i, n = info->buffer_length;
149 uint8_t *buf = g_malloc(n);
150
151 info->read_memory_func(pc, buf, n, info);
152
153 for (i = 0; i < n; ++i) {
154 if (i % 32 == 0) {
155 info->fprintf_func(info->stream, "\n%s: ", prefix);
156 }
157 info->fprintf_func(info->stream, "%02x", buf[i]);
158 }
159
160 g_free(buf);
161 return n;
162 }
163
164 static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
165 {
166 return print_insn_objdump(pc, info, "OBJD-H");
167 }
168
169 static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
170 {
171 return print_insn_objdump(pc, info, "OBJD-T");
172 }
173
174 /* Disassemble this for me please... (debugging). 'flags' has the following
175 values:
176 i386 - 1 means 16 bit code, 2 means 64 bit code
177 ppc - bits 0:15 specify (optionally) the machine instruction set;
178 bit 16 indicates little endian.
179 other targets - unused
180 */
181 void target_disas(FILE *out, CPUState *cpu, target_ulong code,
182 target_ulong size, int flags)
183 {
184 CPUClass *cc = CPU_GET_CLASS(cpu);
185 target_ulong pc;
186 int count;
187 CPUDebug s;
188
189 INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
190
191 s.cpu = cpu;
192 s.info.read_memory_func = target_read_memory;
193 s.info.read_memory_inner_func = NULL;
194 s.info.buffer_vma = code;
195 s.info.buffer_length = size;
196 s.info.print_address_func = generic_print_address;
197
198 #ifdef TARGET_WORDS_BIGENDIAN
199 s.info.endian = BFD_ENDIAN_BIG;
200 #else
201 s.info.endian = BFD_ENDIAN_LITTLE;
202 #endif
203
204 if (cc->disas_set_info) {
205 cc->disas_set_info(cpu, &s.info);
206 }
207
208 #if defined(TARGET_I386)
209 if (flags == 2) {
210 s.info.mach = bfd_mach_x86_64;
211 } else if (flags == 1) {
212 s.info.mach = bfd_mach_i386_i8086;
213 } else {
214 s.info.mach = bfd_mach_i386_i386;
215 }
216 s.info.print_insn = print_insn_i386;
217 #elif defined(TARGET_PPC)
218 if ((flags >> 16) & 1) {
219 s.info.endian = BFD_ENDIAN_LITTLE;
220 }
221 if (flags & 0xFFFF) {
222 /* If we have a precise definition of the instruction set, use it. */
223 s.info.mach = flags & 0xFFFF;
224 } else {
225 #ifdef TARGET_PPC64
226 s.info.mach = bfd_mach_ppc64;
227 #else
228 s.info.mach = bfd_mach_ppc;
229 #endif
230 }
231 s.info.disassembler_options = (char *)"any";
232 s.info.print_insn = print_insn_ppc;
233 #endif
234 if (s.info.print_insn == NULL) {
235 s.info.print_insn = print_insn_od_target;
236 }
237
238 for (pc = code; size > 0; pc += count, size -= count) {
239 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
240 count = s.info.print_insn(pc, &s.info);
241 #if 0
242 {
243 int i;
244 uint8_t b;
245 fprintf(out, " {");
246 for(i = 0; i < count; i++) {
247 target_read_memory(pc + i, &b, 1, &s.info);
248 fprintf(out, " %02x", b);
249 }
250 fprintf(out, " }");
251 }
252 #endif
253 fprintf(out, "\n");
254 if (count < 0)
255 break;
256 if (size < count) {
257 fprintf(out,
258 "Disassembler disagrees with translator over instruction "
259 "decoding\n"
260 "Please report this to qemu-devel@nongnu.org\n");
261 break;
262 }
263 }
264 }
265
266 /* Disassemble this for me please... (debugging). */
267 void disas(FILE *out, void *code, unsigned long size)
268 {
269 uintptr_t pc;
270 int count;
271 CPUDebug s;
272 int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;
273
274 INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
275 s.info.print_address_func = generic_print_host_address;
276
277 s.info.buffer = code;
278 s.info.buffer_vma = (uintptr_t)code;
279 s.info.buffer_length = size;
280
281 #ifdef HOST_WORDS_BIGENDIAN
282 s.info.endian = BFD_ENDIAN_BIG;
283 #else
284 s.info.endian = BFD_ENDIAN_LITTLE;
285 #endif
286 #if defined(CONFIG_TCG_INTERPRETER)
287 print_insn = print_insn_tci;
288 #elif defined(__i386__)
289 s.info.mach = bfd_mach_i386_i386;
290 print_insn = print_insn_i386;
291 #elif defined(__x86_64__)
292 s.info.mach = bfd_mach_x86_64;
293 print_insn = print_insn_i386;
294 #elif defined(_ARCH_PPC)
295 s.info.disassembler_options = (char *)"any";
296 print_insn = print_insn_ppc;
297 #elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
298 print_insn = print_insn_arm_a64;
299 #elif defined(__alpha__)
300 print_insn = print_insn_alpha;
301 #elif defined(__sparc__)
302 print_insn = print_insn_sparc;
303 s.info.mach = bfd_mach_sparc_v9b;
304 #elif defined(__arm__)
305 print_insn = print_insn_arm;
306 #elif defined(__MIPSEB__)
307 print_insn = print_insn_big_mips;
308 #elif defined(__MIPSEL__)
309 print_insn = print_insn_little_mips;
310 #elif defined(__m68k__)
311 print_insn = print_insn_m68k;
312 #elif defined(__s390__)
313 print_insn = print_insn_s390;
314 #elif defined(__hppa__)
315 print_insn = print_insn_hppa;
316 #elif defined(__ia64__)
317 print_insn = print_insn_ia64;
318 #endif
319 if (print_insn == NULL) {
320 print_insn = print_insn_od_host;
321 }
322 for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
323 fprintf(out, "0x%08" PRIxPTR ": ", pc);
324 count = print_insn(pc, &s.info);
325 fprintf(out, "\n");
326 if (count < 0)
327 break;
328 }
329 }
330
331 /* Look up symbol for debugging purpose. Returns "" if unknown. */
332 const char *lookup_symbol(target_ulong orig_addr)
333 {
334 const char *symbol = "";
335 struct syminfo *s;
336
337 for (s = syminfos; s; s = s->next) {
338 symbol = s->lookup_symbol(s, orig_addr);
339 if (symbol[0] != '\0') {
340 break;
341 }
342 }
343
344 return symbol;
345 }
346
347 #if !defined(CONFIG_USER_ONLY)
348
349 #include "monitor/monitor.h"
350
351 static int monitor_disas_is_physical;
352
353 static int
354 monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
355 struct disassemble_info *info)
356 {
357 CPUDebug *s = container_of(info, CPUDebug, info);
358
359 if (monitor_disas_is_physical) {
360 cpu_physical_memory_read(memaddr, myaddr, length);
361 } else {
362 cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
363 }
364 return 0;
365 }
366
367 /* Disassembler for the monitor.
368 See target_disas for a description of flags. */
369 void monitor_disas(Monitor *mon, CPUState *cpu,
370 target_ulong pc, int nb_insn, int is_physical, int flags)
371 {
372 CPUClass *cc = CPU_GET_CLASS(cpu);
373 int count, i;
374 CPUDebug s;
375
376 INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
377
378 s.cpu = cpu;
379 monitor_disas_is_physical = is_physical;
380 s.info.read_memory_func = monitor_read_memory;
381 s.info.print_address_func = generic_print_address;
382
383 s.info.buffer_vma = pc;
384
385 #ifdef TARGET_WORDS_BIGENDIAN
386 s.info.endian = BFD_ENDIAN_BIG;
387 #else
388 s.info.endian = BFD_ENDIAN_LITTLE;
389 #endif
390
391 if (cc->disas_set_info) {
392 cc->disas_set_info(cpu, &s.info);
393 }
394
395 #if defined(TARGET_I386)
396 if (flags == 2) {
397 s.info.mach = bfd_mach_x86_64;
398 } else if (flags == 1) {
399 s.info.mach = bfd_mach_i386_i8086;
400 } else {
401 s.info.mach = bfd_mach_i386_i386;
402 }
403 s.info.print_insn = print_insn_i386;
404 #elif defined(TARGET_PPC)
405 if (flags & 0xFFFF) {
406 /* If we have a precise definition of the instruction set, use it. */
407 s.info.mach = flags & 0xFFFF;
408 } else {
409 #ifdef TARGET_PPC64
410 s.info.mach = bfd_mach_ppc64;
411 #else
412 s.info.mach = bfd_mach_ppc;
413 #endif
414 }
415 if ((flags >> 16) & 1) {
416 s.info.endian = BFD_ENDIAN_LITTLE;
417 }
418 s.info.print_insn = print_insn_ppc;
419 #endif
420 if (!s.info.print_insn) {
421 monitor_printf(mon, "0x" TARGET_FMT_lx
422 ": Asm output not supported on this arch\n", pc);
423 return;
424 }
425
426 for(i = 0; i < nb_insn; i++) {
427 monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
428 count = s.info.print_insn(pc, &s.info);
429 monitor_printf(mon, "\n");
430 if (count < 0)
431 break;
432 pc += count;
433 }
434 }
435 #endif