trap signals for "-serial mon:stdio"
[qemu.git] / disas.c
1 /* General "disassemble this chunk" code. Used for debugging. */
2 #include "config.h"
3 #include "disas/bfd.h"
4 #include "elf.h"
5 #include <errno.h>
6
7 #include "cpu.h"
8 #include "disas/disas.h"
9
10 typedef struct CPUDebug {
11 struct disassemble_info info;
12 CPUArchState *env;
13 } CPUDebug;
14
15 /* Filled in by elfload.c. Simplistic, but will do for now. */
16 struct syminfo *syminfos = NULL;
17
18 /* Get LENGTH bytes from info's buffer, at target address memaddr.
19 Transfer them to myaddr. */
20 int
21 buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
22 struct disassemble_info *info)
23 {
24 if (memaddr < info->buffer_vma
25 || memaddr + length > info->buffer_vma + info->buffer_length)
26 /* Out of bounds. Use EIO because GDB uses it. */
27 return EIO;
28 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
29 return 0;
30 }
31
32 /* Get LENGTH bytes from info's buffer, at target address memaddr.
33 Transfer them to myaddr. */
34 static int
35 target_read_memory (bfd_vma memaddr,
36 bfd_byte *myaddr,
37 int length,
38 struct disassemble_info *info)
39 {
40 CPUDebug *s = container_of(info, CPUDebug, info);
41
42 cpu_memory_rw_debug(s->env, memaddr, myaddr, length, 0);
43 return 0;
44 }
45
46 /* Print an error message. We can assume that this is in response to
47 an error return from buffer_read_memory. */
48 void
49 perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
50 {
51 if (status != EIO)
52 /* Can't happen. */
53 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
54 else
55 /* Actually, address between memaddr and memaddr + len was
56 out of bounds. */
57 (*info->fprintf_func) (info->stream,
58 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
59 }
60
61 /* This could be in a separate file, to save minuscule amounts of space
62 in statically linked executables. */
63
64 /* Just print the address is hex. This is included for completeness even
65 though both GDB and objdump provide their own (to print symbolic
66 addresses). */
67
68 void
69 generic_print_address (bfd_vma addr, struct disassemble_info *info)
70 {
71 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
72 }
73
74 /* Print address in hex, truncated to the width of a target virtual address. */
75 static void
76 generic_print_target_address(bfd_vma addr, struct disassemble_info *info)
77 {
78 uint64_t mask = ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS);
79 generic_print_address(addr & mask, info);
80 }
81
82 /* Print address in hex, truncated to the width of a host virtual address. */
83 static void
84 generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
85 {
86 uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
87 generic_print_address(addr & mask, info);
88 }
89
90 /* Just return the given address. */
91
92 int
93 generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
94 {
95 return 1;
96 }
97
98 bfd_vma bfd_getl64 (const bfd_byte *addr)
99 {
100 unsigned long long v;
101
102 v = (unsigned long long) addr[0];
103 v |= (unsigned long long) addr[1] << 8;
104 v |= (unsigned long long) addr[2] << 16;
105 v |= (unsigned long long) addr[3] << 24;
106 v |= (unsigned long long) addr[4] << 32;
107 v |= (unsigned long long) addr[5] << 40;
108 v |= (unsigned long long) addr[6] << 48;
109 v |= (unsigned long long) addr[7] << 56;
110 return (bfd_vma) v;
111 }
112
113 bfd_vma bfd_getl32 (const bfd_byte *addr)
114 {
115 unsigned long v;
116
117 v = (unsigned long) addr[0];
118 v |= (unsigned long) addr[1] << 8;
119 v |= (unsigned long) addr[2] << 16;
120 v |= (unsigned long) addr[3] << 24;
121 return (bfd_vma) v;
122 }
123
124 bfd_vma bfd_getb32 (const bfd_byte *addr)
125 {
126 unsigned long v;
127
128 v = (unsigned long) addr[0] << 24;
129 v |= (unsigned long) addr[1] << 16;
130 v |= (unsigned long) addr[2] << 8;
131 v |= (unsigned long) addr[3];
132 return (bfd_vma) v;
133 }
134
135 bfd_vma bfd_getl16 (const bfd_byte *addr)
136 {
137 unsigned long v;
138
139 v = (unsigned long) addr[0];
140 v |= (unsigned long) addr[1] << 8;
141 return (bfd_vma) v;
142 }
143
144 bfd_vma bfd_getb16 (const bfd_byte *addr)
145 {
146 unsigned long v;
147
148 v = (unsigned long) addr[0] << 24;
149 v |= (unsigned long) addr[1] << 16;
150 return (bfd_vma) v;
151 }
152
153 #ifdef TARGET_ARM
154 static int
155 print_insn_thumb1(bfd_vma pc, disassemble_info *info)
156 {
157 return print_insn_arm(pc | 1, info);
158 }
159 #endif
160
161 /* Disassemble this for me please... (debugging). 'flags' has the following
162 values:
163 i386 - 1 means 16 bit code, 2 means 64 bit code
164 arm - bit 0 = thumb, bit 1 = reverse endian
165 ppc - nonzero means little endian
166 other targets - unused
167 */
168 void target_disas(FILE *out, CPUArchState *env, target_ulong code,
169 target_ulong size, int flags)
170 {
171 target_ulong pc;
172 int count;
173 CPUDebug s;
174 int (*print_insn)(bfd_vma pc, disassemble_info *info);
175
176 INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
177
178 s.env = env;
179 s.info.read_memory_func = target_read_memory;
180 s.info.buffer_vma = code;
181 s.info.buffer_length = size;
182 s.info.print_address_func = generic_print_target_address;
183
184 #ifdef TARGET_WORDS_BIGENDIAN
185 s.info.endian = BFD_ENDIAN_BIG;
186 #else
187 s.info.endian = BFD_ENDIAN_LITTLE;
188 #endif
189 #if defined(TARGET_I386)
190 if (flags == 2) {
191 s.info.mach = bfd_mach_x86_64;
192 } else if (flags == 1) {
193 s.info.mach = bfd_mach_i386_i8086;
194 } else {
195 s.info.mach = bfd_mach_i386_i386;
196 }
197 print_insn = print_insn_i386;
198 #elif defined(TARGET_ARM)
199 if (flags & 1) {
200 print_insn = print_insn_thumb1;
201 } else {
202 print_insn = print_insn_arm;
203 }
204 if (flags & 2) {
205 #ifdef TARGET_WORDS_BIGENDIAN
206 s.info.endian = BFD_ENDIAN_LITTLE;
207 #else
208 s.info.endian = BFD_ENDIAN_BIG;
209 #endif
210 }
211 #elif defined(TARGET_SPARC)
212 print_insn = print_insn_sparc;
213 #ifdef TARGET_SPARC64
214 s.info.mach = bfd_mach_sparc_v9b;
215 #endif
216 #elif defined(TARGET_PPC)
217 if (flags >> 16) {
218 s.info.endian = BFD_ENDIAN_LITTLE;
219 }
220 if (flags & 0xFFFF) {
221 /* If we have a precise definitions of the instructions set, use it */
222 s.info.mach = flags & 0xFFFF;
223 } else {
224 #ifdef TARGET_PPC64
225 s.info.mach = bfd_mach_ppc64;
226 #else
227 s.info.mach = bfd_mach_ppc;
228 #endif
229 }
230 s.info.disassembler_options = (char *)"any";
231 print_insn = print_insn_ppc;
232 #elif defined(TARGET_M68K)
233 print_insn = print_insn_m68k;
234 #elif defined(TARGET_MIPS)
235 #ifdef TARGET_WORDS_BIGENDIAN
236 print_insn = print_insn_big_mips;
237 #else
238 print_insn = print_insn_little_mips;
239 #endif
240 #elif defined(TARGET_SH4)
241 s.info.mach = bfd_mach_sh4;
242 print_insn = print_insn_sh;
243 #elif defined(TARGET_ALPHA)
244 s.info.mach = bfd_mach_alpha_ev6;
245 print_insn = print_insn_alpha;
246 #elif defined(TARGET_CRIS)
247 if (flags != 32) {
248 s.info.mach = bfd_mach_cris_v0_v10;
249 print_insn = print_insn_crisv10;
250 } else {
251 s.info.mach = bfd_mach_cris_v32;
252 print_insn = print_insn_crisv32;
253 }
254 #elif defined(TARGET_S390X)
255 s.info.mach = bfd_mach_s390_64;
256 print_insn = print_insn_s390;
257 #elif defined(TARGET_MICROBLAZE)
258 s.info.mach = bfd_arch_microblaze;
259 print_insn = print_insn_microblaze;
260 #elif defined(TARGET_MOXIE)
261 s.info.mach = bfd_arch_moxie;
262 print_insn = print_insn_moxie;
263 #elif defined(TARGET_LM32)
264 s.info.mach = bfd_mach_lm32;
265 print_insn = print_insn_lm32;
266 #else
267 fprintf(out, "0x" TARGET_FMT_lx
268 ": Asm output not supported on this arch\n", code);
269 return;
270 #endif
271
272 for (pc = code; size > 0; pc += count, size -= count) {
273 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
274 count = print_insn(pc, &s.info);
275 #if 0
276 {
277 int i;
278 uint8_t b;
279 fprintf(out, " {");
280 for(i = 0; i < count; i++) {
281 target_read_memory(pc + i, &b, 1, &s.info);
282 fprintf(out, " %02x", b);
283 }
284 fprintf(out, " }");
285 }
286 #endif
287 fprintf(out, "\n");
288 if (count < 0)
289 break;
290 if (size < count) {
291 fprintf(out,
292 "Disassembler disagrees with translator over instruction "
293 "decoding\n"
294 "Please report this to qemu-devel@nongnu.org\n");
295 break;
296 }
297 }
298 }
299
300 /* Disassemble this for me please... (debugging). */
301 void disas(FILE *out, void *code, unsigned long size)
302 {
303 uintptr_t pc;
304 int count;
305 CPUDebug s;
306 int (*print_insn)(bfd_vma pc, disassemble_info *info);
307
308 INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
309 s.info.print_address_func = generic_print_host_address;
310
311 s.info.buffer = code;
312 s.info.buffer_vma = (uintptr_t)code;
313 s.info.buffer_length = size;
314
315 #ifdef HOST_WORDS_BIGENDIAN
316 s.info.endian = BFD_ENDIAN_BIG;
317 #else
318 s.info.endian = BFD_ENDIAN_LITTLE;
319 #endif
320 #if defined(CONFIG_TCG_INTERPRETER)
321 print_insn = print_insn_tci;
322 #elif defined(__i386__)
323 s.info.mach = bfd_mach_i386_i386;
324 print_insn = print_insn_i386;
325 #elif defined(__x86_64__)
326 s.info.mach = bfd_mach_x86_64;
327 print_insn = print_insn_i386;
328 #elif defined(_ARCH_PPC)
329 s.info.disassembler_options = (char *)"any";
330 print_insn = print_insn_ppc;
331 #elif defined(__alpha__)
332 print_insn = print_insn_alpha;
333 #elif defined(__sparc__)
334 print_insn = print_insn_sparc;
335 s.info.mach = bfd_mach_sparc_v9b;
336 #elif defined(__arm__)
337 print_insn = print_insn_arm;
338 #elif defined(__MIPSEB__)
339 print_insn = print_insn_big_mips;
340 #elif defined(__MIPSEL__)
341 print_insn = print_insn_little_mips;
342 #elif defined(__m68k__)
343 print_insn = print_insn_m68k;
344 #elif defined(__s390__)
345 print_insn = print_insn_s390;
346 #elif defined(__hppa__)
347 print_insn = print_insn_hppa;
348 #elif defined(__ia64__)
349 print_insn = print_insn_ia64;
350 #else
351 fprintf(out, "0x%lx: Asm output not supported on this arch\n",
352 (long) code);
353 return;
354 #endif
355 for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
356 fprintf(out, "0x%08" PRIxPTR ": ", pc);
357 count = print_insn(pc, &s.info);
358 fprintf(out, "\n");
359 if (count < 0)
360 break;
361 }
362 }
363
364 /* Look up symbol for debugging purpose. Returns "" if unknown. */
365 const char *lookup_symbol(target_ulong orig_addr)
366 {
367 const char *symbol = "";
368 struct syminfo *s;
369
370 for (s = syminfos; s; s = s->next) {
371 symbol = s->lookup_symbol(s, orig_addr);
372 if (symbol[0] != '\0') {
373 break;
374 }
375 }
376
377 return symbol;
378 }
379
380 #if !defined(CONFIG_USER_ONLY)
381
382 #include "monitor/monitor.h"
383
384 static int monitor_disas_is_physical;
385
386 static int
387 monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
388 struct disassemble_info *info)
389 {
390 CPUDebug *s = container_of(info, CPUDebug, info);
391
392 if (monitor_disas_is_physical) {
393 cpu_physical_memory_read(memaddr, myaddr, length);
394 } else {
395 cpu_memory_rw_debug(s->env, memaddr,myaddr, length, 0);
396 }
397 return 0;
398 }
399
400 static int GCC_FMT_ATTR(2, 3)
401 monitor_fprintf(FILE *stream, const char *fmt, ...)
402 {
403 va_list ap;
404 va_start(ap, fmt);
405 monitor_vprintf((Monitor *)stream, fmt, ap);
406 va_end(ap);
407 return 0;
408 }
409
410 void monitor_disas(Monitor *mon, CPUArchState *env,
411 target_ulong pc, int nb_insn, int is_physical, int flags)
412 {
413 int count, i;
414 CPUDebug s;
415 int (*print_insn)(bfd_vma pc, disassemble_info *info);
416
417 INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
418
419 s.env = env;
420 monitor_disas_is_physical = is_physical;
421 s.info.read_memory_func = monitor_read_memory;
422 s.info.print_address_func = generic_print_target_address;
423
424 s.info.buffer_vma = pc;
425
426 #ifdef TARGET_WORDS_BIGENDIAN
427 s.info.endian = BFD_ENDIAN_BIG;
428 #else
429 s.info.endian = BFD_ENDIAN_LITTLE;
430 #endif
431 #if defined(TARGET_I386)
432 if (flags == 2) {
433 s.info.mach = bfd_mach_x86_64;
434 } else if (flags == 1) {
435 s.info.mach = bfd_mach_i386_i8086;
436 } else {
437 s.info.mach = bfd_mach_i386_i386;
438 }
439 print_insn = print_insn_i386;
440 #elif defined(TARGET_ARM)
441 print_insn = print_insn_arm;
442 #elif defined(TARGET_ALPHA)
443 print_insn = print_insn_alpha;
444 #elif defined(TARGET_SPARC)
445 print_insn = print_insn_sparc;
446 #ifdef TARGET_SPARC64
447 s.info.mach = bfd_mach_sparc_v9b;
448 #endif
449 #elif defined(TARGET_PPC)
450 #ifdef TARGET_PPC64
451 s.info.mach = bfd_mach_ppc64;
452 #else
453 s.info.mach = bfd_mach_ppc;
454 #endif
455 print_insn = print_insn_ppc;
456 #elif defined(TARGET_M68K)
457 print_insn = print_insn_m68k;
458 #elif defined(TARGET_MIPS)
459 #ifdef TARGET_WORDS_BIGENDIAN
460 print_insn = print_insn_big_mips;
461 #else
462 print_insn = print_insn_little_mips;
463 #endif
464 #elif defined(TARGET_SH4)
465 s.info.mach = bfd_mach_sh4;
466 print_insn = print_insn_sh;
467 #elif defined(TARGET_S390X)
468 s.info.mach = bfd_mach_s390_64;
469 print_insn = print_insn_s390;
470 #elif defined(TARGET_MOXIE)
471 s.info.mach = bfd_arch_moxie;
472 print_insn = print_insn_moxie;
473 #elif defined(TARGET_LM32)
474 s.info.mach = bfd_mach_lm32;
475 print_insn = print_insn_lm32;
476 #else
477 monitor_printf(mon, "0x" TARGET_FMT_lx
478 ": Asm output not supported on this arch\n", pc);
479 return;
480 #endif
481
482 for(i = 0; i < nb_insn; i++) {
483 monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
484 count = print_insn(pc, &s.info);
485 monitor_printf(mon, "\n");
486 if (count < 0)
487 break;
488 pc += count;
489 }
490 }
491 #endif