1 /* opcodes/i386-dis.c r1.126 */
2 /* Print i386 instructions for GDB, the GNU debugger.
3 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
4 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, see <http://www.gnu.org/licenses/>. */
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
34 #include "qemu/osdep.h"
35 #include "disas/dis-asm.h"
36 #include "qemu/cutils.h"
38 /* include/opcode/i386.h r1.78 */
40 /* opcode/i386.h -- Intel 80386 opcode macros
41 Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
42 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
43 Free Software Foundation, Inc.
45 This file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger.
47 This program is free software; you can redistribute it and/or modify
48 it under the terms of the GNU General Public License as published by
49 the Free Software Foundation; either version 2 of the License, or
50 (at your option) any later version.
52 This program is distributed in the hope that it will be useful,
53 but WITHOUT ANY WARRANTY; without even the implied warranty of
54 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
55 GNU General Public License for more details.
57 You should have received a copy of the GNU General Public License
58 along with this program; if not, see <http://www.gnu.org/licenses/>. */
60 /* The SystemV/386 SVR3.2 assembler, and probably all AT&T derived
61 ix86 Unix assemblers, generate floating point instructions with
62 reversed source and destination registers in certain cases.
63 Unfortunately, gcc and possibly many other programs use this
64 reversed syntax, so we're stuck with it.
66 eg. `fsub %st(3),%st' results in st = st - st(3) as expected, but
67 `fsub %st,%st(3)' results in st(3) = st - st(3), rather than
68 the expected st(3) = st(3) - st
70 This happens with all the non-commutative arithmetic floating point
71 operations with two register operands, where the source register is
72 %st, and destination register is %st(i).
74 The affected opcode map is dceX, dcfX, deeX, defX. */
76 #ifndef SYSV386_COMPAT
77 /* Set non-zero for broken, compatible instructions. Set to zero for
78 non-broken opcodes at your peril. gcc generates SystemV/386
79 compatible instructions. */
80 #define SYSV386_COMPAT 1
83 /* Set non-zero to cater for old (<= 2.8.1) versions of gcc that could
84 generate nonsense fsubp, fsubrp, fdivp and fdivrp with operands
86 #define OLDGCC_COMPAT SYSV386_COMPAT
89 #define MOV_AX_DISP32 0xa0
90 #define POP_SEG_SHORT 0x07
91 #define JUMP_PC_RELATIVE 0xeb
92 #define INT_OPCODE 0xcd
93 #define INT3_OPCODE 0xcc
94 /* The opcode for the fwait instruction, which disassembler treats as a
95 prefix when it can. */
96 #define FWAIT_OPCODE 0x9b
97 #define ADDR_PREFIX_OPCODE 0x67
98 #define DATA_PREFIX_OPCODE 0x66
99 #define LOCK_PREFIX_OPCODE 0xf0
100 #define CS_PREFIX_OPCODE 0x2e
101 #define DS_PREFIX_OPCODE 0x3e
102 #define ES_PREFIX_OPCODE 0x26
103 #define FS_PREFIX_OPCODE 0x64
104 #define GS_PREFIX_OPCODE 0x65
105 #define SS_PREFIX_OPCODE 0x36
106 #define REPNE_PREFIX_OPCODE 0xf2
107 #define REPE_PREFIX_OPCODE 0xf3
109 #define TWO_BYTE_OPCODE_ESCAPE 0x0f
110 #define NOP_OPCODE (char) 0x90
112 /* register numbers */
113 #define EBP_REG_NUM 5
114 #define ESP_REG_NUM 4
116 /* modrm_byte.regmem for twobyte escape */
117 #define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
118 /* index_base_byte.index for no index register addressing */
119 #define NO_INDEX_REGISTER ESP_REG_NUM
120 /* index_base_byte.base for no base register addressing */
121 #define NO_BASE_REGISTER EBP_REG_NUM
122 #define NO_BASE_REGISTER_16 6
124 /* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
125 #define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
126 #define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
128 /* x86-64 extension prefix. */
129 #define REX_OPCODE 0x40
131 /* Indicates 64 bit operand size. */
133 /* High extension to reg field of modrm byte. */
135 /* High extension to SIB index field. */
137 /* High extension to base field of modrm or SIB, or reg field of opcode. */
140 /* max operands per insn */
141 #define MAX_OPERANDS 4
143 /* max immediates per insn (lcall, ljmp, insertq, extrq) */
144 #define MAX_IMMEDIATE_OPERANDS 2
146 /* max memory refs per insn (string ops) */
147 #define MAX_MEMORY_OPERANDS 2
149 /* max size of insn mnemonics. */
150 #define MAX_MNEM_SIZE 16
152 /* max size of register name in insn mnemonics. */
153 #define MAX_REG_NAME_SIZE 8
155 /* opcodes/i386-dis.c r1.126 */
157 static int fetch_data2(struct disassemble_info
*, bfd_byte
*);
158 static int fetch_data(struct disassemble_info
*, bfd_byte
*);
159 static void ckprefix (void);
160 static const char *prefix_name (int, int);
161 static int print_insn (bfd_vma
, disassemble_info
*);
162 static void dofloat (int);
163 static void OP_ST (int, int);
164 static void OP_STi (int, int);
165 static int putop (const char *, int);
166 static void oappend (const char *);
167 static void append_seg (void);
168 static void OP_indirE (int, int);
169 static void print_operand_value (char *buf
, size_t bufsize
, int hex
, bfd_vma disp
);
170 static void print_displacement (char *, bfd_vma
);
171 static void OP_E (int, int);
172 static void OP_G (int, int);
173 static void OP_vvvv (int, int);
174 static bfd_vma
get64 (void);
175 static bfd_signed_vma
get32 (void);
176 static bfd_signed_vma
get32s (void);
177 static int get16 (void);
178 static void set_op (bfd_vma
, int);
179 static void OP_REG (int, int);
180 static void OP_IMREG (int, int);
181 static void OP_I (int, int);
182 static void OP_I64 (int, int);
183 static void OP_sI (int, int);
184 static void OP_J (int, int);
185 static void OP_SEG (int, int);
186 static void OP_DIR (int, int);
187 static void OP_OFF (int, int);
188 static void OP_OFF64 (int, int);
189 static void ptr_reg (int, int);
190 static void OP_ESreg (int, int);
191 static void OP_DSreg (int, int);
192 static void OP_C (int, int);
193 static void OP_D (int, int);
194 static void OP_T (int, int);
195 static void OP_R (int, int);
196 static void OP_MMX (int, int);
197 static void OP_XMM (int, int);
198 static void OP_EM (int, int);
199 static void OP_EX (int, int);
200 static void OP_EMC (int,int);
201 static void OP_MXC (int,int);
202 static void OP_MS (int, int);
203 static void OP_XS (int, int);
204 static void OP_M (int, int);
205 static void OP_VMX (int, int);
206 static void OP_0fae (int, int);
207 static void OP_0f07 (int, int);
208 static void NOP_Fixup1 (int, int);
209 static void NOP_Fixup2 (int, int);
210 static void OP_3DNowSuffix (int, int);
211 static void OP_SIMD_Suffix (int, int);
212 static void SIMD_Fixup (int, int);
213 static void PNI_Fixup (int, int);
214 static void SVME_Fixup (int, int);
215 static void INVLPG_Fixup (int, int);
216 static void BadOp (void);
217 static void VMX_Fixup (int, int);
218 static void REP_Fixup (int, int);
219 static void CMPXCHG8B_Fixup (int, int);
220 static void XMM_Fixup (int, int);
221 static void CRC32_Fixup (int, int);
224 /* Points to first byte not fetched. */
225 bfd_byte
*max_fetched
;
226 bfd_byte the_buffer
[MAX_MNEM_SIZE
];
239 static enum address_mode address_mode
;
241 /* Flags for the prefixes for the current instruction. See below. */
244 /* REX prefix the current instruction. See below. */
246 /* Bits of REX we've already used. */
248 /* Mark parts used in the REX prefix. When we are testing for
249 empty prefix (for 8bit register REX extension), just mask it
250 out. Otherwise test for REX bit is excuse for existence of REX
251 only in case value is nonzero. */
252 #define USED_REX(value) \
257 rex_used |= (value) | REX_OPCODE; \
260 rex_used |= REX_OPCODE; \
263 /* Flags for prefixes which we somehow handled when printing the
264 current instruction. */
265 static int used_prefixes
;
267 /* The VEX.vvvv register, unencoded. */
270 /* Flags stored in PREFIXES. */
271 #define PREFIX_REPZ 1
272 #define PREFIX_REPNZ 2
273 #define PREFIX_LOCK 4
275 #define PREFIX_SS 0x10
276 #define PREFIX_DS 0x20
277 #define PREFIX_ES 0x40
278 #define PREFIX_FS 0x80
279 #define PREFIX_GS 0x100
280 #define PREFIX_DATA 0x200
281 #define PREFIX_ADDR 0x400
282 #define PREFIX_FWAIT 0x800
284 #define PREFIX_VEX_0F 0x1000
285 #define PREFIX_VEX_0F38 0x2000
286 #define PREFIX_VEX_0F3A 0x4000
288 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
289 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
292 fetch_data2(struct disassemble_info
*info
, bfd_byte
*addr
)
295 struct dis_private
*priv
= (struct dis_private
*) info
->private_data
;
296 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
298 if (addr
<= priv
->the_buffer
+ MAX_MNEM_SIZE
)
299 status
= (*info
->read_memory_func
) (start
,
301 addr
- priv
->max_fetched
,
307 /* If we did manage to read at least one byte, then
308 print_insn_i386 will do something sensible. Otherwise, print
309 an error. We do that here because this is where we know
311 if (priv
->max_fetched
== priv
->the_buffer
)
312 (*info
->memory_error_func
) (status
, start
, info
);
313 siglongjmp(priv
->bailout
, 1);
316 priv
->max_fetched
= addr
;
321 fetch_data(struct disassemble_info
*info
, bfd_byte
*addr
)
323 if (addr
<= ((struct dis_private
*) (info
->private_data
))->max_fetched
) {
326 return fetch_data2(info
, addr
);
331 #define XX { NULL, 0 }
333 #define Bv { OP_vvvv, v_mode }
334 #define Eb { OP_E, b_mode }
335 #define Ev { OP_E, v_mode }
336 #define Ed { OP_E, d_mode }
337 #define Edq { OP_E, dq_mode }
338 #define Edqw { OP_E, dqw_mode }
339 #define Edqb { OP_E, dqb_mode }
340 #define Edqd { OP_E, dqd_mode }
341 #define indirEv { OP_indirE, stack_v_mode }
342 #define indirEp { OP_indirE, f_mode }
343 #define stackEv { OP_E, stack_v_mode }
344 #define Em { OP_E, m_mode }
345 #define Ew { OP_E, w_mode }
346 #define M { OP_M, 0 } /* lea, lgdt, etc. */
347 #define Ma { OP_M, v_mode }
348 #define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
349 #define Mq { OP_M, q_mode }
350 #define Gb { OP_G, b_mode }
351 #define Gv { OP_G, v_mode }
352 #define Gd { OP_G, d_mode }
353 #define Gdq { OP_G, dq_mode }
354 #define Gm { OP_G, m_mode }
355 #define Gw { OP_G, w_mode }
356 #define Rd { OP_R, d_mode }
357 #define Rm { OP_R, m_mode }
358 #define Ib { OP_I, b_mode }
359 #define sIb { OP_sI, b_mode } /* sign extended byte */
360 #define Iv { OP_I, v_mode }
361 #define Iq { OP_I, q_mode }
362 #define Iv64 { OP_I64, v_mode }
363 #define Iw { OP_I, w_mode }
364 #define I1 { OP_I, const_1_mode }
365 #define Jb { OP_J, b_mode }
366 #define Jv { OP_J, v_mode }
367 #define Cm { OP_C, m_mode }
368 #define Dm { OP_D, m_mode }
369 #define Td { OP_T, d_mode }
371 #define RMeAX { OP_REG, eAX_reg }
372 #define RMeBX { OP_REG, eBX_reg }
373 #define RMeCX { OP_REG, eCX_reg }
374 #define RMeDX { OP_REG, eDX_reg }
375 #define RMeSP { OP_REG, eSP_reg }
376 #define RMeBP { OP_REG, eBP_reg }
377 #define RMeSI { OP_REG, eSI_reg }
378 #define RMeDI { OP_REG, eDI_reg }
379 #define RMrAX { OP_REG, rAX_reg }
380 #define RMrBX { OP_REG, rBX_reg }
381 #define RMrCX { OP_REG, rCX_reg }
382 #define RMrDX { OP_REG, rDX_reg }
383 #define RMrSP { OP_REG, rSP_reg }
384 #define RMrBP { OP_REG, rBP_reg }
385 #define RMrSI { OP_REG, rSI_reg }
386 #define RMrDI { OP_REG, rDI_reg }
387 #define RMAL { OP_REG, al_reg }
388 #define RMAL { OP_REG, al_reg }
389 #define RMCL { OP_REG, cl_reg }
390 #define RMDL { OP_REG, dl_reg }
391 #define RMBL { OP_REG, bl_reg }
392 #define RMAH { OP_REG, ah_reg }
393 #define RMCH { OP_REG, ch_reg }
394 #define RMDH { OP_REG, dh_reg }
395 #define RMBH { OP_REG, bh_reg }
396 #define RMAX { OP_REG, ax_reg }
397 #define RMDX { OP_REG, dx_reg }
399 #define eAX { OP_IMREG, eAX_reg }
400 #define eBX { OP_IMREG, eBX_reg }
401 #define eCX { OP_IMREG, eCX_reg }
402 #define eDX { OP_IMREG, eDX_reg }
403 #define eSP { OP_IMREG, eSP_reg }
404 #define eBP { OP_IMREG, eBP_reg }
405 #define eSI { OP_IMREG, eSI_reg }
406 #define eDI { OP_IMREG, eDI_reg }
407 #define AL { OP_IMREG, al_reg }
408 #define CL { OP_IMREG, cl_reg }
409 #define DL { OP_IMREG, dl_reg }
410 #define BL { OP_IMREG, bl_reg }
411 #define AH { OP_IMREG, ah_reg }
412 #define CH { OP_IMREG, ch_reg }
413 #define DH { OP_IMREG, dh_reg }
414 #define BH { OP_IMREG, bh_reg }
415 #define AX { OP_IMREG, ax_reg }
416 #define DX { OP_IMREG, dx_reg }
417 #define zAX { OP_IMREG, z_mode_ax_reg }
418 #define indirDX { OP_IMREG, indir_dx_reg }
420 #define Sw { OP_SEG, w_mode }
421 #define Sv { OP_SEG, v_mode }
422 #define Ap { OP_DIR, 0 }
423 #define Ob { OP_OFF64, b_mode }
424 #define Ov { OP_OFF64, v_mode }
425 #define Xb { OP_DSreg, eSI_reg }
426 #define Xv { OP_DSreg, eSI_reg }
427 #define Xz { OP_DSreg, eSI_reg }
428 #define Yb { OP_ESreg, eDI_reg }
429 #define Yv { OP_ESreg, eDI_reg }
430 #define DSBX { OP_DSreg, eBX_reg }
432 #define es { OP_REG, es_reg }
433 #define ss { OP_REG, ss_reg }
434 #define cs { OP_REG, cs_reg }
435 #define ds { OP_REG, ds_reg }
436 #define fs { OP_REG, fs_reg }
437 #define gs { OP_REG, gs_reg }
439 #define MX { OP_MMX, 0 }
440 #define XM { OP_XMM, 0 }
441 #define EM { OP_EM, v_mode }
442 #define EMd { OP_EM, d_mode }
443 #define EMq { OP_EM, q_mode }
444 #define EXd { OP_EX, d_mode }
445 #define EXq { OP_EX, q_mode }
446 #define EXx { OP_EX, x_mode }
447 #define MS { OP_MS, v_mode }
448 #define XS { OP_XS, v_mode }
449 #define EMC { OP_EMC, v_mode }
450 #define MXC { OP_MXC, 0 }
451 #define VM { OP_VMX, q_mode }
452 #define OPSUF { OP_3DNowSuffix, 0 }
453 #define OPSIMD { OP_SIMD_Suffix, 0 }
454 #define XMM0 { XMM_Fixup, 0 }
456 /* Used handle "rep" prefix for string instructions. */
457 #define Xbr { REP_Fixup, eSI_reg }
458 #define Xvr { REP_Fixup, eSI_reg }
459 #define Ybr { REP_Fixup, eDI_reg }
460 #define Yvr { REP_Fixup, eDI_reg }
461 #define Yzr { REP_Fixup, eDI_reg }
462 #define indirDXr { REP_Fixup, indir_dx_reg }
463 #define ALr { REP_Fixup, al_reg }
464 #define eAXr { REP_Fixup, eAX_reg }
466 #define cond_jump_flag { NULL, cond_jump_mode }
467 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
469 /* bits in sizeflag */
470 #define SUFFIX_ALWAYS 4
474 #define b_mode 1 /* byte operand */
475 #define v_mode 2 /* operand size depends on prefixes */
476 #define w_mode 3 /* word operand */
477 #define d_mode 4 /* double word operand */
478 #define q_mode 5 /* quad word operand */
479 #define t_mode 6 /* ten-byte operand */
480 #define x_mode 7 /* 16-byte XMM operand */
481 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
482 #define cond_jump_mode 9
483 #define loop_jcxz_mode 10
484 #define dq_mode 11 /* operand size depends on REX prefixes. */
485 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
486 #define f_mode 13 /* 4- or 6-byte pointer operand */
487 #define const_1_mode 14
488 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
489 #define z_mode 16 /* non-quad operand size depends on prefixes */
490 #define o_mode 17 /* 16-byte operand */
491 #define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
492 #define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
537 #define z_mode_ax_reg 149
538 #define indir_dx_reg 150
542 #define USE_PREFIX_USER_TABLE 3
543 #define X86_64_SPECIAL 4
544 #define IS_3BYTE_OPCODE 5
546 #define FLOAT NULL, { { NULL, FLOATCODE } }
548 #define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
549 #define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
550 #define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
551 #define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
552 #define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
553 #define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
554 #define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
555 #define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
556 #define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
557 #define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
558 #define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
559 #define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
560 #define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
561 #define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
562 #define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
563 #define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
564 #define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
565 #define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
566 #define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
567 #define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
568 #define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
569 #define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
570 #define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
571 #define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
572 #define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
573 #define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
574 #define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
575 #define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
577 #define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
578 #define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
579 #define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
580 #define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
581 #define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
582 #define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
583 #define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
584 #define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
585 #define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
586 #define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
587 #define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
588 #define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
589 #define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
590 #define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
591 #define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
592 #define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
593 #define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
594 #define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
595 #define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
596 #define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
597 #define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
598 #define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
599 #define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
600 #define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
601 #define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
602 #define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
603 #define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
604 #define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
605 #define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
606 #define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
607 #define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
608 #define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
609 #define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
610 #define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
611 #define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
612 #define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
613 #define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
614 #define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
615 #define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
616 #define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
617 #define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
618 #define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
619 #define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
620 #define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
621 #define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
622 #define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
623 #define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
624 #define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
625 #define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
626 #define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
627 #define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
628 #define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
629 #define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
630 #define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
631 #define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
632 #define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
633 #define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
634 #define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
635 #define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
636 #define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
637 #define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
638 #define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
639 #define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
640 #define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
641 #define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
642 #define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
643 #define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
644 #define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
645 #define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
646 #define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
647 #define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
648 #define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
649 #define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
650 #define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
651 #define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
652 #define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
653 #define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
654 #define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
655 #define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
656 #define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
657 #define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
658 #define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
659 #define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
660 #define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
661 #define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
662 #define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
663 #define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
664 #define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
665 #define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
666 #define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
667 #define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
668 #define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
669 #define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
670 #define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
671 #define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
672 #define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
673 #define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
674 #define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
675 #define PREGRP98 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 98 } }
676 #define PREGRP99 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 99 } }
677 #define PREGRP100 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 100 } }
678 #define PREGRP101 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 101 } }
679 #define PREGRP102 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 102 } }
680 #define PREGRP103 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 103 } }
681 #define PREGRP104 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 104 } }
682 #define PREGRP105 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 105 } }
683 #define PREGRP106 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 106 } }
684 #define PREGRP107 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 107 } }
685 #define PREGRP108 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 108 } }
686 #define PREGRP109 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 109 } }
688 #define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
689 #define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
690 #define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
691 #define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
693 #define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
694 #define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
696 typedef void (*op_rtn
) (int bytemode
, int sizeflag
);
707 /* Upper case letters in the instruction names here are macros.
708 'A' => print 'b' if no register operands or suffix_always is true
709 'B' => print 'b' if suffix_always is true
710 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
712 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
713 . suffix_always is true
714 'E' => print 'e' if 32-bit form of jcxz
715 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
716 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
717 'H' => print ",pt" or ",pn" branch hint
718 'I' => honor following macro letter even in Intel mode (implemented only
719 . for some of the macro letters)
721 'K' => print 'd' or 'q' if rex prefix is present.
722 'L' => print 'l' if suffix_always is true
723 'N' => print 'n' if instruction has no wait "prefix"
724 'O' => print 'd' or 'o' (or 'q' in Intel mode)
725 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
726 . or suffix_always is true. print 'q' if rex prefix is present.
727 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
729 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
730 'S' => print 'w', 'l' or 'q' if suffix_always is true
731 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
732 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
733 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
734 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
735 'X' => print 's', 'd' depending on data16 prefix (for XMM)
736 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
737 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
739 Many of the above letters print nothing in Intel mode. See "putop"
742 Braces '{' and '}', and vertical bars '|', indicate alternative
743 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
744 modes. In cases where there are only two alternatives, the X86_64
745 instruction is reserved, and "(bad)" is printed.
748 static const struct dis386 dis386
[] = {
750 { "addB", { Eb
, Gb
} },
751 { "addS", { Ev
, Gv
} },
752 { "addB", { Gb
, Eb
} },
753 { "addS", { Gv
, Ev
} },
754 { "addB", { AL
, Ib
} },
755 { "addS", { eAX
, Iv
} },
756 { "push{T|}", { es
} },
757 { "pop{T|}", { es
} },
759 { "orB", { Eb
, Gb
} },
760 { "orS", { Ev
, Gv
} },
761 { "orB", { Gb
, Eb
} },
762 { "orS", { Gv
, Ev
} },
763 { "orB", { AL
, Ib
} },
764 { "orS", { eAX
, Iv
} },
765 { "push{T|}", { cs
} },
766 { "(bad)", { XX
} }, /* 0x0f extended opcode escape */
768 { "adcB", { Eb
, Gb
} },
769 { "adcS", { Ev
, Gv
} },
770 { "adcB", { Gb
, Eb
} },
771 { "adcS", { Gv
, Ev
} },
772 { "adcB", { AL
, Ib
} },
773 { "adcS", { eAX
, Iv
} },
774 { "push{T|}", { ss
} },
775 { "pop{T|}", { ss
} },
777 { "sbbB", { Eb
, Gb
} },
778 { "sbbS", { Ev
, Gv
} },
779 { "sbbB", { Gb
, Eb
} },
780 { "sbbS", { Gv
, Ev
} },
781 { "sbbB", { AL
, Ib
} },
782 { "sbbS", { eAX
, Iv
} },
783 { "push{T|}", { ds
} },
784 { "pop{T|}", { ds
} },
786 { "andB", { Eb
, Gb
} },
787 { "andS", { Ev
, Gv
} },
788 { "andB", { Gb
, Eb
} },
789 { "andS", { Gv
, Ev
} },
790 { "andB", { AL
, Ib
} },
791 { "andS", { eAX
, Iv
} },
792 { "(bad)", { XX
} }, /* SEG ES prefix */
793 { "daa{|}", { XX
} },
795 { "subB", { Eb
, Gb
} },
796 { "subS", { Ev
, Gv
} },
797 { "subB", { Gb
, Eb
} },
798 { "subS", { Gv
, Ev
} },
799 { "subB", { AL
, Ib
} },
800 { "subS", { eAX
, Iv
} },
801 { "(bad)", { XX
} }, /* SEG CS prefix */
802 { "das{|}", { XX
} },
804 { "xorB", { Eb
, Gb
} },
805 { "xorS", { Ev
, Gv
} },
806 { "xorB", { Gb
, Eb
} },
807 { "xorS", { Gv
, Ev
} },
808 { "xorB", { AL
, Ib
} },
809 { "xorS", { eAX
, Iv
} },
810 { "(bad)", { XX
} }, /* SEG SS prefix */
811 { "aaa{|}", { XX
} },
813 { "cmpB", { Eb
, Gb
} },
814 { "cmpS", { Ev
, Gv
} },
815 { "cmpB", { Gb
, Eb
} },
816 { "cmpS", { Gv
, Ev
} },
817 { "cmpB", { AL
, Ib
} },
818 { "cmpS", { eAX
, Iv
} },
819 { "(bad)", { XX
} }, /* SEG DS prefix */
820 { "aas{|}", { XX
} },
822 { "inc{S|}", { RMeAX
} },
823 { "inc{S|}", { RMeCX
} },
824 { "inc{S|}", { RMeDX
} },
825 { "inc{S|}", { RMeBX
} },
826 { "inc{S|}", { RMeSP
} },
827 { "inc{S|}", { RMeBP
} },
828 { "inc{S|}", { RMeSI
} },
829 { "inc{S|}", { RMeDI
} },
831 { "dec{S|}", { RMeAX
} },
832 { "dec{S|}", { RMeCX
} },
833 { "dec{S|}", { RMeDX
} },
834 { "dec{S|}", { RMeBX
} },
835 { "dec{S|}", { RMeSP
} },
836 { "dec{S|}", { RMeBP
} },
837 { "dec{S|}", { RMeSI
} },
838 { "dec{S|}", { RMeDI
} },
840 { "pushV", { RMrAX
} },
841 { "pushV", { RMrCX
} },
842 { "pushV", { RMrDX
} },
843 { "pushV", { RMrBX
} },
844 { "pushV", { RMrSP
} },
845 { "pushV", { RMrBP
} },
846 { "pushV", { RMrSI
} },
847 { "pushV", { RMrDI
} },
849 { "popV", { RMrAX
} },
850 { "popV", { RMrCX
} },
851 { "popV", { RMrDX
} },
852 { "popV", { RMrBX
} },
853 { "popV", { RMrSP
} },
854 { "popV", { RMrBP
} },
855 { "popV", { RMrSI
} },
856 { "popV", { RMrDI
} },
862 { "(bad)", { XX
} }, /* seg fs */
863 { "(bad)", { XX
} }, /* seg gs */
864 { "(bad)", { XX
} }, /* op size prefix */
865 { "(bad)", { XX
} }, /* adr size prefix */
868 { "imulS", { Gv
, Ev
, Iv
} },
869 { "pushT", { sIb
} },
870 { "imulS", { Gv
, Ev
, sIb
} },
871 { "ins{b||b|}", { Ybr
, indirDX
} },
872 { "ins{R||G|}", { Yzr
, indirDX
} },
873 { "outs{b||b|}", { indirDXr
, Xb
} },
874 { "outs{R||G|}", { indirDXr
, Xz
} },
876 { "joH", { Jb
, XX
, cond_jump_flag
} },
877 { "jnoH", { Jb
, XX
, cond_jump_flag
} },
878 { "jbH", { Jb
, XX
, cond_jump_flag
} },
879 { "jaeH", { Jb
, XX
, cond_jump_flag
} },
880 { "jeH", { Jb
, XX
, cond_jump_flag
} },
881 { "jneH", { Jb
, XX
, cond_jump_flag
} },
882 { "jbeH", { Jb
, XX
, cond_jump_flag
} },
883 { "jaH", { Jb
, XX
, cond_jump_flag
} },
885 { "jsH", { Jb
, XX
, cond_jump_flag
} },
886 { "jnsH", { Jb
, XX
, cond_jump_flag
} },
887 { "jpH", { Jb
, XX
, cond_jump_flag
} },
888 { "jnpH", { Jb
, XX
, cond_jump_flag
} },
889 { "jlH", { Jb
, XX
, cond_jump_flag
} },
890 { "jgeH", { Jb
, XX
, cond_jump_flag
} },
891 { "jleH", { Jb
, XX
, cond_jump_flag
} },
892 { "jgH", { Jb
, XX
, cond_jump_flag
} },
898 { "testB", { Eb
, Gb
} },
899 { "testS", { Ev
, Gv
} },
900 { "xchgB", { Eb
, Gb
} },
901 { "xchgS", { Ev
, Gv
} },
903 { "movB", { Eb
, Gb
} },
904 { "movS", { Ev
, Gv
} },
905 { "movB", { Gb
, Eb
} },
906 { "movS", { Gv
, Ev
} },
907 { "movD", { Sv
, Sw
} },
908 { "leaS", { Gv
, M
} },
909 { "movD", { Sw
, Sv
} },
913 { "xchgS", { RMeCX
, eAX
} },
914 { "xchgS", { RMeDX
, eAX
} },
915 { "xchgS", { RMeBX
, eAX
} },
916 { "xchgS", { RMeSP
, eAX
} },
917 { "xchgS", { RMeBP
, eAX
} },
918 { "xchgS", { RMeSI
, eAX
} },
919 { "xchgS", { RMeDI
, eAX
} },
921 { "cW{t||t|}R", { XX
} },
922 { "cR{t||t|}O", { XX
} },
923 { "Jcall{T|}", { Ap
} },
924 { "(bad)", { XX
} }, /* fwait */
925 { "pushfT", { XX
} },
927 { "sahf{|}", { XX
} },
928 { "lahf{|}", { XX
} },
930 { "movB", { AL
, Ob
} },
931 { "movS", { eAX
, Ov
} },
932 { "movB", { Ob
, AL
} },
933 { "movS", { Ov
, eAX
} },
934 { "movs{b||b|}", { Ybr
, Xb
} },
935 { "movs{R||R|}", { Yvr
, Xv
} },
936 { "cmps{b||b|}", { Xb
, Yb
} },
937 { "cmps{R||R|}", { Xv
, Yv
} },
939 { "testB", { AL
, Ib
} },
940 { "testS", { eAX
, Iv
} },
941 { "stosB", { Ybr
, AL
} },
942 { "stosS", { Yvr
, eAX
} },
943 { "lodsB", { ALr
, Xb
} },
944 { "lodsS", { eAXr
, Xv
} },
945 { "scasB", { AL
, Yb
} },
946 { "scasS", { eAX
, Yv
} },
948 { "movB", { RMAL
, Ib
} },
949 { "movB", { RMCL
, Ib
} },
950 { "movB", { RMDL
, Ib
} },
951 { "movB", { RMBL
, Ib
} },
952 { "movB", { RMAH
, Ib
} },
953 { "movB", { RMCH
, Ib
} },
954 { "movB", { RMDH
, Ib
} },
955 { "movB", { RMBH
, Ib
} },
957 { "movS", { RMeAX
, Iv64
} },
958 { "movS", { RMeCX
, Iv64
} },
959 { "movS", { RMeDX
, Iv64
} },
960 { "movS", { RMeBX
, Iv64
} },
961 { "movS", { RMeSP
, Iv64
} },
962 { "movS", { RMeBP
, Iv64
} },
963 { "movS", { RMeSI
, Iv64
} },
964 { "movS", { RMeDI
, Iv64
} },
970 { "les{S|}", { Gv
, Mp
} },
971 { "ldsS", { Gv
, Mp
} },
975 { "enterT", { Iw
, Ib
} },
976 { "leaveT", { XX
} },
981 { "into{|}", { XX
} },
988 { "aam{|}", { sIb
} },
989 { "aad{|}", { sIb
} },
991 { "xlat", { DSBX
} },
1002 { "loopneFH", { Jb
, XX
, loop_jcxz_flag
} },
1003 { "loopeFH", { Jb
, XX
, loop_jcxz_flag
} },
1004 { "loopFH", { Jb
, XX
, loop_jcxz_flag
} },
1005 { "jEcxzH", { Jb
, XX
, loop_jcxz_flag
} },
1006 { "inB", { AL
, Ib
} },
1007 { "inG", { zAX
, Ib
} },
1008 { "outB", { Ib
, AL
} },
1009 { "outG", { Ib
, zAX
} },
1011 { "callT", { Jv
} },
1013 { "Jjmp{T|}", { Ap
} },
1015 { "inB", { AL
, indirDX
} },
1016 { "inG", { zAX
, indirDX
} },
1017 { "outB", { indirDX
, AL
} },
1018 { "outG", { indirDX
, zAX
} },
1020 { "(bad)", { XX
} }, /* lock prefix */
1021 { "icebp", { XX
} },
1022 { "(bad)", { XX
} }, /* repne */
1023 { "(bad)", { XX
} }, /* repz */
1039 static const struct dis386 dis386_twobyte
[] = {
1043 { "larS", { Gv
, Ew
} },
1044 { "lslS", { Gv
, Ew
} },
1045 { "(bad)", { XX
} },
1046 { "syscall", { XX
} },
1048 { "sysretP", { XX
} },
1051 { "wbinvd", { XX
} },
1052 { "(bad)", { XX
} },
1054 { "(bad)", { XX
} },
1056 { "femms", { XX
} },
1057 { "", { MX
, EM
, OPSUF
} }, /* See OP_3DNowSuffix. */
1062 { "movlpX", { EXq
, XM
, { SIMD_Fixup
, 'h' } } },
1063 { "unpcklpX", { XM
, EXq
} },
1064 { "unpckhpX", { XM
, EXq
} },
1066 { "movhpX", { EXq
, XM
, { SIMD_Fixup
, 'l' } } },
1069 { "(bad)", { XX
} },
1070 { "(bad)", { XX
} },
1071 { "(bad)", { XX
} },
1072 { "(bad)", { XX
} },
1073 { "(bad)", { XX
} },
1074 { "(bad)", { XX
} },
1077 { "movZ", { Rm
, Cm
} },
1078 { "movZ", { Rm
, Dm
} },
1079 { "movZ", { Cm
, Rm
} },
1080 { "movZ", { Dm
, Rm
} },
1081 { "movL", { Rd
, Td
} },
1082 { "(bad)", { XX
} },
1083 { "movL", { Td
, Rd
} },
1084 { "(bad)", { XX
} },
1086 { "movapX", { XM
, EXx
} },
1087 { "movapX", { EXx
, XM
} },
1095 { "wrmsr", { XX
} },
1096 { "rdtsc", { XX
} },
1097 { "rdmsr", { XX
} },
1098 { "rdpmc", { XX
} },
1099 { "sysenter", { XX
} },
1100 { "sysexit", { XX
} },
1101 { "(bad)", { XX
} },
1102 { "(bad)", { XX
} },
1105 { "(bad)", { XX
} },
1107 { "(bad)", { XX
} },
1108 { "(bad)", { XX
} },
1109 { "(bad)", { XX
} },
1110 { "(bad)", { XX
} },
1111 { "(bad)", { XX
} },
1113 { "cmovo", { Gv
, Ev
} },
1114 { "cmovno", { Gv
, Ev
} },
1115 { "cmovb", { Gv
, Ev
} },
1116 { "cmovae", { Gv
, Ev
} },
1117 { "cmove", { Gv
, Ev
} },
1118 { "cmovne", { Gv
, Ev
} },
1119 { "cmovbe", { Gv
, Ev
} },
1120 { "cmova", { Gv
, Ev
} },
1122 { "cmovs", { Gv
, Ev
} },
1123 { "cmovns", { Gv
, Ev
} },
1124 { "cmovp", { Gv
, Ev
} },
1125 { "cmovnp", { Gv
, Ev
} },
1126 { "cmovl", { Gv
, Ev
} },
1127 { "cmovge", { Gv
, Ev
} },
1128 { "cmovle", { Gv
, Ev
} },
1129 { "cmovg", { Gv
, Ev
} },
1131 { "movmskpX", { Gdq
, XS
} },
1135 { "andpX", { XM
, EXx
} },
1136 { "andnpX", { XM
, EXx
} },
1137 { "orpX", { XM
, EXx
} },
1138 { "xorpX", { XM
, EXx
} },
1152 { "packsswb", { MX
, EM
} },
1153 { "pcmpgtb", { MX
, EM
} },
1154 { "pcmpgtw", { MX
, EM
} },
1155 { "pcmpgtd", { MX
, EM
} },
1156 { "packuswb", { MX
, EM
} },
1158 { "punpckhbw", { MX
, EM
} },
1159 { "punpckhwd", { MX
, EM
} },
1160 { "punpckhdq", { MX
, EM
} },
1161 { "packssdw", { MX
, EM
} },
1164 { "movd", { MX
, Edq
} },
1171 { "pcmpeqb", { MX
, EM
} },
1172 { "pcmpeqw", { MX
, EM
} },
1173 { "pcmpeqd", { MX
, EM
} },
1178 { "(bad)", { XX
} },
1179 { "(bad)", { XX
} },
1185 { "joH", { Jv
, XX
, cond_jump_flag
} },
1186 { "jnoH", { Jv
, XX
, cond_jump_flag
} },
1187 { "jbH", { Jv
, XX
, cond_jump_flag
} },
1188 { "jaeH", { Jv
, XX
, cond_jump_flag
} },
1189 { "jeH", { Jv
, XX
, cond_jump_flag
} },
1190 { "jneH", { Jv
, XX
, cond_jump_flag
} },
1191 { "jbeH", { Jv
, XX
, cond_jump_flag
} },
1192 { "jaH", { Jv
, XX
, cond_jump_flag
} },
1194 { "jsH", { Jv
, XX
, cond_jump_flag
} },
1195 { "jnsH", { Jv
, XX
, cond_jump_flag
} },
1196 { "jpH", { Jv
, XX
, cond_jump_flag
} },
1197 { "jnpH", { Jv
, XX
, cond_jump_flag
} },
1198 { "jlH", { Jv
, XX
, cond_jump_flag
} },
1199 { "jgeH", { Jv
, XX
, cond_jump_flag
} },
1200 { "jleH", { Jv
, XX
, cond_jump_flag
} },
1201 { "jgH", { Jv
, XX
, cond_jump_flag
} },
1204 { "setno", { Eb
} },
1206 { "setae", { Eb
} },
1208 { "setne", { Eb
} },
1209 { "setbe", { Eb
} },
1213 { "setns", { Eb
} },
1215 { "setnp", { Eb
} },
1217 { "setge", { Eb
} },
1218 { "setle", { Eb
} },
1221 { "pushT", { fs
} },
1223 { "cpuid", { XX
} },
1224 { "btS", { Ev
, Gv
} },
1225 { "shldS", { Ev
, Gv
, Ib
} },
1226 { "shldS", { Ev
, Gv
, CL
} },
1230 { "pushT", { gs
} },
1233 { "btsS", { Ev
, Gv
} },
1234 { "shrdS", { Ev
, Gv
, Ib
} },
1235 { "shrdS", { Ev
, Gv
, CL
} },
1237 { "imulS", { Gv
, Ev
} },
1239 { "cmpxchgB", { Eb
, Gb
} },
1240 { "cmpxchgS", { Ev
, Gv
} },
1241 { "lssS", { Gv
, Mp
} },
1242 { "btrS", { Ev
, Gv
} },
1243 { "lfsS", { Gv
, Mp
} },
1244 { "lgsS", { Gv
, Mp
} },
1245 { "movz{bR|x|bR|x}", { Gv
, Eb
} },
1246 { "movz{wR|x|wR|x}", { Gv
, Ew
} }, /* yes, there really is movzww ! */
1251 { "btcS", { Ev
, Gv
} },
1254 { "movs{bR|x|bR|x}", { Gv
, Eb
} },
1255 { "movs{wR|x|wR|x}", { Gv
, Ew
} }, /* yes, there really is movsww ! */
1257 { "xaddB", { Eb
, Gb
} },
1258 { "xaddS", { Ev
, Gv
} },
1260 { "movntiS", { Ev
, Gv
} },
1261 { "pinsrw", { MX
, Edqw
, Ib
} },
1262 { "pextrw", { Gdq
, MS
, Ib
} },
1263 { "shufpX", { XM
, EXx
, Ib
} },
1266 { "bswap", { RMeAX
} },
1267 { "bswap", { RMeCX
} },
1268 { "bswap", { RMeDX
} },
1269 { "bswap", { RMeBX
} },
1270 { "bswap", { RMeSP
} },
1271 { "bswap", { RMeBP
} },
1272 { "bswap", { RMeSI
} },
1273 { "bswap", { RMeDI
} },
1276 { "psrlw", { MX
, EM
} },
1277 { "psrld", { MX
, EM
} },
1278 { "psrlq", { MX
, EM
} },
1279 { "paddq", { MX
, EM
} },
1280 { "pmullw", { MX
, EM
} },
1282 { "pmovmskb", { Gdq
, MS
} },
1284 { "psubusb", { MX
, EM
} },
1285 { "psubusw", { MX
, EM
} },
1286 { "pminub", { MX
, EM
} },
1287 { "pand", { MX
, EM
} },
1288 { "paddusb", { MX
, EM
} },
1289 { "paddusw", { MX
, EM
} },
1290 { "pmaxub", { MX
, EM
} },
1291 { "pandn", { MX
, EM
} },
1293 { "pavgb", { MX
, EM
} },
1294 { "psraw", { MX
, EM
} },
1295 { "psrad", { MX
, EM
} },
1296 { "pavgw", { MX
, EM
} },
1297 { "pmulhuw", { MX
, EM
} },
1298 { "pmulhw", { MX
, EM
} },
1302 { "psubsb", { MX
, EM
} },
1303 { "psubsw", { MX
, EM
} },
1304 { "pminsw", { MX
, EM
} },
1305 { "por", { MX
, EM
} },
1306 { "paddsb", { MX
, EM
} },
1307 { "paddsw", { MX
, EM
} },
1308 { "pmaxsw", { MX
, EM
} },
1309 { "pxor", { MX
, EM
} },
1312 { "psllw", { MX
, EM
} },
1313 { "pslld", { MX
, EM
} },
1314 { "psllq", { MX
, EM
} },
1315 { "pmuludq", { MX
, EM
} },
1316 { "pmaddwd", { MX
, EM
} },
1317 { "psadbw", { MX
, EM
} },
1320 { "psubb", { MX
, EM
} },
1321 { "psubw", { MX
, EM
} },
1322 { "psubd", { MX
, EM
} },
1323 { "psubq", { MX
, EM
} },
1324 { "paddb", { MX
, EM
} },
1325 { "paddw", { MX
, EM
} },
1326 { "paddd", { MX
, EM
} },
1327 { "(bad)", { XX
} },
1330 static const unsigned char onebyte_has_modrm
[256] = {
1331 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1332 /* ------------------------------- */
1333 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1334 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1335 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1336 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1337 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1338 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1339 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1340 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1341 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1342 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1343 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1344 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1345 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1346 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1347 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1348 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1349 /* ------------------------------- */
1350 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1353 static const unsigned char twobyte_has_modrm
[256] = {
1354 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1355 /* ------------------------------- */
1356 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1357 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1358 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1359 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1360 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1361 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1362 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1363 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1364 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1365 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1366 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1367 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1368 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1369 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1370 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1371 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1372 /* ------------------------------- */
1373 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1376 static const unsigned char twobyte_uses_DATA_prefix
[256] = {
1377 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1378 /* ------------------------------- */
1379 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1380 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1381 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1382 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1383 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1384 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1385 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1386 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
1387 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1388 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1389 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1390 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1391 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1392 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1393 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1394 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1395 /* ------------------------------- */
1396 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1399 static const unsigned char twobyte_uses_REPNZ_prefix
[256] = {
1400 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1401 /* ------------------------------- */
1402 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1403 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1404 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1405 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1406 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1407 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
1408 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1409 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
1410 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1411 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1412 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1413 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1414 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1415 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1416 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1417 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1418 /* ------------------------------- */
1419 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1422 static const unsigned char twobyte_uses_REPZ_prefix
[256] = {
1423 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1424 /* ------------------------------- */
1425 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1426 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1427 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1428 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1429 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1430 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1431 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
1432 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1433 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1434 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1435 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1436 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,1,1,0,0, /* bf */
1437 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1438 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1439 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1440 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1441 /* ------------------------------- */
1442 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1445 /* This is used to determine if opcode 0f 38 XX uses DATA prefix. */
1446 static const unsigned char threebyte_0x38_uses_DATA_prefix
[256] = {
1447 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1448 /* ------------------------------- */
1449 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
1450 /* 10 */ 1,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */
1451 /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */
1452 /* 30 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* 3f */
1453 /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1454 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1455 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1456 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1457 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1458 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1459 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1460 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1461 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1462 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1, /* df */
1463 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1464 /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0, /* ff */
1465 /* ------------------------------- */
1466 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1469 /* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */
1470 static const unsigned char threebyte_0x38_uses_REPNZ_prefix
[256] = {
1471 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1472 /* ------------------------------- */
1473 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1474 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1475 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1476 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1477 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1478 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1479 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1480 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1481 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1482 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1483 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1484 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1485 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1486 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1487 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1488 /* f0 */ 1,1,0,0,0,1,0,1,0,0,0,0,0,0,0,0, /* ff */
1489 /* ------------------------------- */
1490 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1493 /* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */
1494 static const unsigned char threebyte_0x38_uses_REPZ_prefix
[256] = {
1495 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1496 /* ------------------------------- */
1497 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1498 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1499 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1500 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1501 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1502 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1503 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1504 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1505 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1506 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1507 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1508 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1509 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1510 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1511 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1512 /* f0 */ 0,0,0,0,0,1,0,1,0,0,0,0,0,0,0,0, /* ff */
1513 /* ------------------------------- */
1514 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1517 /* This is used to determine if opcode 0f 3a XX uses DATA prefix. */
1518 static const unsigned char threebyte_0x3a_uses_DATA_prefix
[256] = {
1519 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1520 /* ------------------------------- */
1521 /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */
1522 /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */
1523 /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1524 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1525 /* 40 */ 1,1,1,0,1,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1526 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1527 /* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1528 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1529 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1530 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1531 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1532 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1533 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1534 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* df */
1535 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1536 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1537 /* ------------------------------- */
1538 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1541 /* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */
1542 static const unsigned char threebyte_0x3a_uses_REPNZ_prefix
[256] = {
1543 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1544 /* ------------------------------- */
1545 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1546 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1547 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1548 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1549 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1550 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1551 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1552 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1553 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1554 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1555 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1556 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1557 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1558 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1559 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1560 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1561 /* ------------------------------- */
1562 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1565 /* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */
1566 static const unsigned char threebyte_0x3a_uses_REPZ_prefix
[256] = {
1567 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1568 /* ------------------------------- */
1569 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1570 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1571 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1572 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1573 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1574 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1575 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1576 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1577 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1578 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1579 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1580 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1581 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1582 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1583 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1584 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1585 /* ------------------------------- */
1586 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1589 static char obuf
[100];
1591 static char scratchbuf
[100];
1592 static unsigned char *start_codep
;
1593 static unsigned char *insn_codep
;
1594 static unsigned char *codep
;
1595 static disassemble_info
*the_info
;
1603 static unsigned char need_modrm
;
1605 /* If we are accessing mod/rm/reg without need_modrm set, then the
1606 values are stale. Hitting this abort likely indicates that you
1607 need to update onebyte_has_modrm or twobyte_has_modrm. */
1608 #define MODRM_CHECK if (!need_modrm) abort ()
1610 static const char * const *names64
;
1611 static const char * const *names32
;
1612 static const char * const *names16
;
1613 static const char * const *names8
;
1614 static const char * const *names8rex
;
1615 static const char * const *names_seg
;
1616 static const char * const *index16
;
1618 static const char * const intel_names64
[] = {
1619 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1620 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1622 static const char * const intel_names32
[] = {
1623 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1624 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1626 static const char * const intel_names16
[] = {
1627 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1628 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1630 static const char * const intel_names8
[] = {
1631 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1633 static const char * const intel_names8rex
[] = {
1634 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1635 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1637 static const char * const intel_names_seg
[] = {
1638 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1640 static const char * const intel_index16
[] = {
1641 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1644 static const char * const att_names64
[] = {
1645 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1646 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1648 static const char * const att_names32
[] = {
1649 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1650 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1652 static const char * const att_names16
[] = {
1653 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1654 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1656 static const char * const att_names8
[] = {
1657 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1659 static const char * const att_names8rex
[] = {
1660 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1661 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1663 static const char * const att_names_seg
[] = {
1664 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1666 static const char * const att_index16
[] = {
1667 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1670 static const struct dis386 grps
[][8] = {
1673 { "popU", { stackEv
} },
1674 { "(bad)", { XX
} },
1675 { "(bad)", { XX
} },
1676 { "(bad)", { XX
} },
1677 { "(bad)", { XX
} },
1678 { "(bad)", { XX
} },
1679 { "(bad)", { XX
} },
1680 { "(bad)", { XX
} },
1684 { "addA", { Eb
, Ib
} },
1685 { "orA", { Eb
, Ib
} },
1686 { "adcA", { Eb
, Ib
} },
1687 { "sbbA", { Eb
, Ib
} },
1688 { "andA", { Eb
, Ib
} },
1689 { "subA", { Eb
, Ib
} },
1690 { "xorA", { Eb
, Ib
} },
1691 { "cmpA", { Eb
, Ib
} },
1695 { "addQ", { Ev
, Iv
} },
1696 { "orQ", { Ev
, Iv
} },
1697 { "adcQ", { Ev
, Iv
} },
1698 { "sbbQ", { Ev
, Iv
} },
1699 { "andQ", { Ev
, Iv
} },
1700 { "subQ", { Ev
, Iv
} },
1701 { "xorQ", { Ev
, Iv
} },
1702 { "cmpQ", { Ev
, Iv
} },
1706 { "addQ", { Ev
, sIb
} },
1707 { "orQ", { Ev
, sIb
} },
1708 { "adcQ", { Ev
, sIb
} },
1709 { "sbbQ", { Ev
, sIb
} },
1710 { "andQ", { Ev
, sIb
} },
1711 { "subQ", { Ev
, sIb
} },
1712 { "xorQ", { Ev
, sIb
} },
1713 { "cmpQ", { Ev
, sIb
} },
1717 { "rolA", { Eb
, Ib
} },
1718 { "rorA", { Eb
, Ib
} },
1719 { "rclA", { Eb
, Ib
} },
1720 { "rcrA", { Eb
, Ib
} },
1721 { "shlA", { Eb
, Ib
} },
1722 { "shrA", { Eb
, Ib
} },
1723 { "(bad)", { XX
} },
1724 { "sarA", { Eb
, Ib
} },
1728 { "rolQ", { Ev
, Ib
} },
1729 { "rorQ", { Ev
, Ib
} },
1730 { "rclQ", { Ev
, Ib
} },
1731 { "rcrQ", { Ev
, Ib
} },
1732 { "shlQ", { Ev
, Ib
} },
1733 { "shrQ", { Ev
, Ib
} },
1734 { "(bad)", { XX
} },
1735 { "sarQ", { Ev
, Ib
} },
1739 { "rolA", { Eb
, I1
} },
1740 { "rorA", { Eb
, I1
} },
1741 { "rclA", { Eb
, I1
} },
1742 { "rcrA", { Eb
, I1
} },
1743 { "shlA", { Eb
, I1
} },
1744 { "shrA", { Eb
, I1
} },
1745 { "(bad)", { XX
} },
1746 { "sarA", { Eb
, I1
} },
1750 { "rolQ", { Ev
, I1
} },
1751 { "rorQ", { Ev
, I1
} },
1752 { "rclQ", { Ev
, I1
} },
1753 { "rcrQ", { Ev
, I1
} },
1754 { "shlQ", { Ev
, I1
} },
1755 { "shrQ", { Ev
, I1
} },
1756 { "(bad)", { XX
} },
1757 { "sarQ", { Ev
, I1
} },
1761 { "rolA", { Eb
, CL
} },
1762 { "rorA", { Eb
, CL
} },
1763 { "rclA", { Eb
, CL
} },
1764 { "rcrA", { Eb
, CL
} },
1765 { "shlA", { Eb
, CL
} },
1766 { "shrA", { Eb
, CL
} },
1767 { "(bad)", { XX
} },
1768 { "sarA", { Eb
, CL
} },
1772 { "rolQ", { Ev
, CL
} },
1773 { "rorQ", { Ev
, CL
} },
1774 { "rclQ", { Ev
, CL
} },
1775 { "rcrQ", { Ev
, CL
} },
1776 { "shlQ", { Ev
, CL
} },
1777 { "shrQ", { Ev
, CL
} },
1778 { "(bad)", { XX
} },
1779 { "sarQ", { Ev
, CL
} },
1783 { "testA", { Eb
, Ib
} },
1784 { "(bad)", { Eb
} },
1787 { "mulA", { Eb
} }, /* Don't print the implicit %al register, */
1788 { "imulA", { Eb
} }, /* to distinguish these opcodes from other */
1789 { "divA", { Eb
} }, /* mul/imul opcodes. Do the same for div */
1790 { "idivA", { Eb
} }, /* and idiv for consistency. */
1794 { "testQ", { Ev
, Iv
} },
1795 { "(bad)", { XX
} },
1798 { "mulQ", { Ev
} }, /* Don't print the implicit register. */
1799 { "imulQ", { Ev
} },
1801 { "idivQ", { Ev
} },
1807 { "(bad)", { XX
} },
1808 { "(bad)", { XX
} },
1809 { "(bad)", { XX
} },
1810 { "(bad)", { XX
} },
1811 { "(bad)", { XX
} },
1812 { "(bad)", { XX
} },
1818 { "callT", { indirEv
} },
1819 { "JcallT", { indirEp
} },
1820 { "jmpT", { indirEv
} },
1821 { "JjmpT", { indirEp
} },
1822 { "pushU", { stackEv
} },
1823 { "(bad)", { XX
} },
1827 { "sldtD", { Sv
} },
1833 { "(bad)", { XX
} },
1834 { "(bad)", { XX
} },
1838 { "sgdt{Q|IQ||}", { { VMX_Fixup
, 0 } } },
1839 { "sidt{Q|IQ||}", { { PNI_Fixup
, 0 } } },
1840 { "lgdt{Q|Q||}", { M
} },
1841 { "lidt{Q|Q||}", { { SVME_Fixup
, 0 } } },
1842 { "smswD", { Sv
} },
1843 { "(bad)", { XX
} },
1845 { "invlpg", { { INVLPG_Fixup
, w_mode
} } },
1849 { "(bad)", { XX
} },
1850 { "(bad)", { XX
} },
1851 { "(bad)", { XX
} },
1852 { "(bad)", { XX
} },
1853 { "btQ", { Ev
, Ib
} },
1854 { "btsQ", { Ev
, Ib
} },
1855 { "btrQ", { Ev
, Ib
} },
1856 { "btcQ", { Ev
, Ib
} },
1860 { "(bad)", { XX
} },
1861 { "cmpxchg8b", { { CMPXCHG8B_Fixup
, q_mode
} } },
1862 { "(bad)", { XX
} },
1863 { "(bad)", { XX
} },
1864 { "(bad)", { XX
} },
1865 { "(bad)", { XX
} },
1866 { "", { VM
} }, /* See OP_VMX. */
1867 { "vmptrst", { Mq
} },
1871 { "movA", { Eb
, Ib
} },
1872 { "(bad)", { XX
} },
1873 { "(bad)", { XX
} },
1874 { "(bad)", { XX
} },
1875 { "(bad)", { XX
} },
1876 { "(bad)", { XX
} },
1877 { "(bad)", { XX
} },
1878 { "(bad)", { XX
} },
1882 { "movQ", { Ev
, Iv
} },
1883 { "(bad)", { XX
} },
1884 { "(bad)", { XX
} },
1885 { "(bad)", { XX
} },
1886 { "(bad)", { XX
} },
1887 { "(bad)", { XX
} },
1888 { "(bad)", { XX
} },
1889 { "(bad)", { XX
} },
1893 { "(bad)", { XX
} },
1894 { "(bad)", { XX
} },
1895 { "psrlw", { MS
, Ib
} },
1896 { "(bad)", { XX
} },
1897 { "psraw", { MS
, Ib
} },
1898 { "(bad)", { XX
} },
1899 { "psllw", { MS
, Ib
} },
1900 { "(bad)", { XX
} },
1904 { "(bad)", { XX
} },
1905 { "(bad)", { XX
} },
1906 { "psrld", { MS
, Ib
} },
1907 { "(bad)", { XX
} },
1908 { "psrad", { MS
, Ib
} },
1909 { "(bad)", { XX
} },
1910 { "pslld", { MS
, Ib
} },
1911 { "(bad)", { XX
} },
1915 { "(bad)", { XX
} },
1916 { "(bad)", { XX
} },
1917 { "psrlq", { MS
, Ib
} },
1918 { "psrldq", { MS
, Ib
} },
1919 { "(bad)", { XX
} },
1920 { "(bad)", { XX
} },
1921 { "psllq", { MS
, Ib
} },
1922 { "pslldq", { MS
, Ib
} },
1926 { "fxsave", { Ev
} },
1927 { "fxrstor", { Ev
} },
1928 { "ldmxcsr", { Ev
} },
1929 { "stmxcsr", { Ev
} },
1930 { "(bad)", { XX
} },
1931 { "lfence", { { OP_0fae
, 0 } } },
1932 { "mfence", { { OP_0fae
, 0 } } },
1933 { "clflush", { { OP_0fae
, 0 } } },
1937 { "prefetchnta", { Ev
} },
1938 { "prefetcht0", { Ev
} },
1939 { "prefetcht1", { Ev
} },
1940 { "prefetcht2", { Ev
} },
1941 { "(bad)", { XX
} },
1942 { "(bad)", { XX
} },
1943 { "(bad)", { XX
} },
1944 { "(bad)", { XX
} },
1948 { "prefetch", { Eb
} },
1949 { "prefetchw", { Eb
} },
1950 { "(bad)", { XX
} },
1951 { "(bad)", { XX
} },
1952 { "(bad)", { XX
} },
1953 { "(bad)", { XX
} },
1954 { "(bad)", { XX
} },
1955 { "(bad)", { XX
} },
1959 { "xstore-rng", { { OP_0f07
, 0 } } },
1960 { "xcrypt-ecb", { { OP_0f07
, 0 } } },
1961 { "xcrypt-cbc", { { OP_0f07
, 0 } } },
1962 { "xcrypt-ctr", { { OP_0f07
, 0 } } },
1963 { "xcrypt-cfb", { { OP_0f07
, 0 } } },
1964 { "xcrypt-ofb", { { OP_0f07
, 0 } } },
1965 { "(bad)", { { OP_0f07
, 0 } } },
1966 { "(bad)", { { OP_0f07
, 0 } } },
1970 { "montmul", { { OP_0f07
, 0 } } },
1971 { "xsha1", { { OP_0f07
, 0 } } },
1972 { "xsha256", { { OP_0f07
, 0 } } },
1973 { "(bad)", { { OP_0f07
, 0 } } },
1974 { "(bad)", { { OP_0f07
, 0 } } },
1975 { "(bad)", { { OP_0f07
, 0 } } },
1976 { "(bad)", { { OP_0f07
, 0 } } },
1977 { "(bad)", { { OP_0f07
, 0 } } },
1981 static const struct dis386 prefix_user_table
[][4] = {
1984 { "addps", { XM
, EXx
} },
1985 { "addss", { XM
, EXd
} },
1986 { "addpd", { XM
, EXx
} },
1987 { "addsd", { XM
, EXq
} },
1991 { "", { XM
, EXx
, OPSIMD
} }, /* See OP_SIMD_SUFFIX. */
1992 { "", { XM
, EXx
, OPSIMD
} },
1993 { "", { XM
, EXx
, OPSIMD
} },
1994 { "", { XM
, EXx
, OPSIMD
} },
1998 { "cvtpi2ps", { XM
, EMC
} },
1999 { "cvtsi2ssY", { XM
, Ev
} },
2000 { "cvtpi2pd", { XM
, EMC
} },
2001 { "cvtsi2sdY", { XM
, Ev
} },
2005 { "cvtps2pi", { MXC
, EXx
} },
2006 { "cvtss2siY", { Gv
, EXx
} },
2007 { "cvtpd2pi", { MXC
, EXx
} },
2008 { "cvtsd2siY", { Gv
, EXx
} },
2012 { "cvttps2pi", { MXC
, EXx
} },
2013 { "cvttss2siY", { Gv
, EXx
} },
2014 { "cvttpd2pi", { MXC
, EXx
} },
2015 { "cvttsd2siY", { Gv
, EXx
} },
2019 { "divps", { XM
, EXx
} },
2020 { "divss", { XM
, EXx
} },
2021 { "divpd", { XM
, EXx
} },
2022 { "divsd", { XM
, EXx
} },
2026 { "maxps", { XM
, EXx
} },
2027 { "maxss", { XM
, EXx
} },
2028 { "maxpd", { XM
, EXx
} },
2029 { "maxsd", { XM
, EXx
} },
2033 { "minps", { XM
, EXx
} },
2034 { "minss", { XM
, EXx
} },
2035 { "minpd", { XM
, EXx
} },
2036 { "minsd", { XM
, EXx
} },
2040 { "movups", { XM
, EXx
} },
2041 { "movss", { XM
, EXx
} },
2042 { "movupd", { XM
, EXx
} },
2043 { "movsd", { XM
, EXx
} },
2047 { "movups", { EXx
, XM
} },
2048 { "movss", { EXx
, XM
} },
2049 { "movupd", { EXx
, XM
} },
2050 { "movsd", { EXx
, XM
} },
2054 { "mulps", { XM
, EXx
} },
2055 { "mulss", { XM
, EXx
} },
2056 { "mulpd", { XM
, EXx
} },
2057 { "mulsd", { XM
, EXx
} },
2061 { "rcpps", { XM
, EXx
} },
2062 { "rcpss", { XM
, EXx
} },
2063 { "(bad)", { XM
, EXx
} },
2064 { "(bad)", { XM
, EXx
} },
2068 { "rsqrtps",{ XM
, EXx
} },
2069 { "rsqrtss",{ XM
, EXx
} },
2070 { "(bad)", { XM
, EXx
} },
2071 { "(bad)", { XM
, EXx
} },
2075 { "sqrtps", { XM
, EXx
} },
2076 { "sqrtss", { XM
, EXx
} },
2077 { "sqrtpd", { XM
, EXx
} },
2078 { "sqrtsd", { XM
, EXx
} },
2082 { "subps", { XM
, EXx
} },
2083 { "subss", { XM
, EXx
} },
2084 { "subpd", { XM
, EXx
} },
2085 { "subsd", { XM
, EXx
} },
2089 { "(bad)", { XM
, EXx
} },
2090 { "cvtdq2pd", { XM
, EXq
} },
2091 { "cvttpd2dq", { XM
, EXx
} },
2092 { "cvtpd2dq", { XM
, EXx
} },
2096 { "cvtdq2ps", { XM
, EXx
} },
2097 { "cvttps2dq", { XM
, EXx
} },
2098 { "cvtps2dq", { XM
, EXx
} },
2099 { "(bad)", { XM
, EXx
} },
2103 { "cvtps2pd", { XM
, EXq
} },
2104 { "cvtss2sd", { XM
, EXx
} },
2105 { "cvtpd2ps", { XM
, EXx
} },
2106 { "cvtsd2ss", { XM
, EXx
} },
2110 { "maskmovq", { MX
, MS
} },
2111 { "(bad)", { XM
, EXx
} },
2112 { "maskmovdqu", { XM
, XS
} },
2113 { "(bad)", { XM
, EXx
} },
2117 { "movq", { MX
, EM
} },
2118 { "movdqu", { XM
, EXx
} },
2119 { "movdqa", { XM
, EXx
} },
2120 { "(bad)", { XM
, EXx
} },
2124 { "movq", { EM
, MX
} },
2125 { "movdqu", { EXx
, XM
} },
2126 { "movdqa", { EXx
, XM
} },
2127 { "(bad)", { EXx
, XM
} },
2131 { "(bad)", { EXx
, XM
} },
2132 { "movq2dq",{ XM
, MS
} },
2133 { "movq", { EXx
, XM
} },
2134 { "movdq2q",{ MX
, XS
} },
2138 { "pshufw", { MX
, EM
, Ib
} },
2139 { "pshufhw",{ XM
, EXx
, Ib
} },
2140 { "pshufd", { XM
, EXx
, Ib
} },
2141 { "pshuflw",{ XM
, EXx
, Ib
} },
2145 { "movd", { Edq
, MX
} },
2146 { "movq", { XM
, EXx
} },
2147 { "movd", { Edq
, XM
} },
2148 { "(bad)", { Ed
, XM
} },
2152 { "(bad)", { MX
, EXx
} },
2153 { "(bad)", { XM
, EXx
} },
2154 { "punpckhqdq", { XM
, EXx
} },
2155 { "(bad)", { XM
, EXx
} },
2159 { "movntq", { EM
, MX
} },
2160 { "(bad)", { EM
, XM
} },
2161 { "movntdq",{ EM
, XM
} },
2162 { "(bad)", { EM
, XM
} },
2166 { "(bad)", { MX
, EXx
} },
2167 { "(bad)", { XM
, EXx
} },
2168 { "punpcklqdq", { XM
, EXx
} },
2169 { "(bad)", { XM
, EXx
} },
2173 { "(bad)", { MX
, EXx
} },
2174 { "(bad)", { XM
, EXx
} },
2175 { "addsubpd", { XM
, EXx
} },
2176 { "addsubps", { XM
, EXx
} },
2180 { "(bad)", { MX
, EXx
} },
2181 { "(bad)", { XM
, EXx
} },
2182 { "haddpd", { XM
, EXx
} },
2183 { "haddps", { XM
, EXx
} },
2187 { "(bad)", { MX
, EXx
} },
2188 { "(bad)", { XM
, EXx
} },
2189 { "hsubpd", { XM
, EXx
} },
2190 { "hsubps", { XM
, EXx
} },
2194 { "movlpX", { XM
, EXq
, { SIMD_Fixup
, 'h' } } }, /* really only 2 operands */
2195 { "movsldup", { XM
, EXx
} },
2196 { "movlpd", { XM
, EXq
} },
2197 { "movddup", { XM
, EXq
} },
2201 { "movhpX", { XM
, EXq
, { SIMD_Fixup
, 'l' } } },
2202 { "movshdup", { XM
, EXx
} },
2203 { "movhpd", { XM
, EXq
} },
2204 { "(bad)", { XM
, EXq
} },
2208 { "(bad)", { XM
, EXx
} },
2209 { "(bad)", { XM
, EXx
} },
2210 { "(bad)", { XM
, EXx
} },
2211 { "lddqu", { XM
, M
} },
2215 {"movntps", { Ev
, XM
} },
2216 {"movntss", { Ev
, XM
} },
2217 {"movntpd", { Ev
, XM
} },
2218 {"movntsd", { Ev
, XM
} },
2223 {"vmread", { Em
, Gm
} },
2225 {"extrq", { XS
, Ib
, Ib
} },
2226 {"insertq", { XM
, XS
, Ib
, Ib
} },
2231 {"vmwrite", { Gm
, Em
} },
2233 {"extrq", { XM
, XS
} },
2234 {"insertq", { XM
, XS
} },
2239 { "bsrS", { Gv
, Ev
} },
2240 { "lzcntS", { Gv
, Ev
} },
2241 { "bsrS", { Gv
, Ev
} },
2242 { "(bad)", { XX
} },
2247 { "(bad)", { XX
} },
2248 { "popcntS", { Gv
, Ev
} },
2249 { "(bad)", { XX
} },
2250 { "(bad)", { XX
} },
2255 { "xchgS", { { NOP_Fixup1
, eAX_reg
}, { NOP_Fixup2
, eAX_reg
} } },
2256 { "pause", { XX
} },
2257 { "xchgS", { { NOP_Fixup1
, eAX_reg
}, { NOP_Fixup2
, eAX_reg
} } },
2258 { "(bad)", { XX
} },
2263 { "(bad)", { XX
} },
2264 { "(bad)", { XX
} },
2265 { "pblendvb", {XM
, EXx
, XMM0
} },
2266 { "(bad)", { XX
} },
2271 { "(bad)", { XX
} },
2272 { "(bad)", { XX
} },
2273 { "blendvps", {XM
, EXx
, XMM0
} },
2274 { "(bad)", { XX
} },
2279 { "(bad)", { XX
} },
2280 { "(bad)", { XX
} },
2281 { "blendvpd", { XM
, EXx
, XMM0
} },
2282 { "(bad)", { XX
} },
2287 { "(bad)", { XX
} },
2288 { "(bad)", { XX
} },
2289 { "ptest", { XM
, EXx
} },
2290 { "(bad)", { XX
} },
2295 { "(bad)", { XX
} },
2296 { "(bad)", { XX
} },
2297 { "pmovsxbw", { XM
, EXx
} },
2298 { "(bad)", { XX
} },
2303 { "(bad)", { XX
} },
2304 { "(bad)", { XX
} },
2305 { "pmovsxbd", { XM
, EXx
} },
2306 { "(bad)", { XX
} },
2311 { "(bad)", { XX
} },
2312 { "(bad)", { XX
} },
2313 { "pmovsxbq", { XM
, EXx
} },
2314 { "(bad)", { XX
} },
2319 { "(bad)", { XX
} },
2320 { "(bad)", { XX
} },
2321 { "pmovsxwd", { XM
, EXx
} },
2322 { "(bad)", { XX
} },
2327 { "(bad)", { XX
} },
2328 { "(bad)", { XX
} },
2329 { "pmovsxwq", { XM
, EXx
} },
2330 { "(bad)", { XX
} },
2335 { "(bad)", { XX
} },
2336 { "(bad)", { XX
} },
2337 { "pmovsxdq", { XM
, EXx
} },
2338 { "(bad)", { XX
} },
2343 { "(bad)", { XX
} },
2344 { "(bad)", { XX
} },
2345 { "pmuldq", { XM
, EXx
} },
2346 { "(bad)", { XX
} },
2351 { "(bad)", { XX
} },
2352 { "(bad)", { XX
} },
2353 { "pcmpeqq", { XM
, EXx
} },
2354 { "(bad)", { XX
} },
2359 { "(bad)", { XX
} },
2360 { "(bad)", { XX
} },
2361 { "movntdqa", { XM
, EM
} },
2362 { "(bad)", { XX
} },
2367 { "(bad)", { XX
} },
2368 { "(bad)", { XX
} },
2369 { "packusdw", { XM
, EXx
} },
2370 { "(bad)", { XX
} },
2375 { "(bad)", { XX
} },
2376 { "(bad)", { XX
} },
2377 { "pmovzxbw", { XM
, EXx
} },
2378 { "(bad)", { XX
} },
2383 { "(bad)", { XX
} },
2384 { "(bad)", { XX
} },
2385 { "pmovzxbd", { XM
, EXx
} },
2386 { "(bad)", { XX
} },
2391 { "(bad)", { XX
} },
2392 { "(bad)", { XX
} },
2393 { "pmovzxbq", { XM
, EXx
} },
2394 { "(bad)", { XX
} },
2399 { "(bad)", { XX
} },
2400 { "(bad)", { XX
} },
2401 { "pmovzxwd", { XM
, EXx
} },
2402 { "(bad)", { XX
} },
2407 { "(bad)", { XX
} },
2408 { "(bad)", { XX
} },
2409 { "pmovzxwq", { XM
, EXx
} },
2410 { "(bad)", { XX
} },
2415 { "(bad)", { XX
} },
2416 { "(bad)", { XX
} },
2417 { "pmovzxdq", { XM
, EXx
} },
2418 { "(bad)", { XX
} },
2423 { "(bad)", { XX
} },
2424 { "(bad)", { XX
} },
2425 { "pminsb", { XM
, EXx
} },
2426 { "(bad)", { XX
} },
2431 { "(bad)", { XX
} },
2432 { "(bad)", { XX
} },
2433 { "pminsd", { XM
, EXx
} },
2434 { "(bad)", { XX
} },
2439 { "(bad)", { XX
} },
2440 { "(bad)", { XX
} },
2441 { "pminuw", { XM
, EXx
} },
2442 { "(bad)", { XX
} },
2447 { "(bad)", { XX
} },
2448 { "(bad)", { XX
} },
2449 { "pminud", { XM
, EXx
} },
2450 { "(bad)", { XX
} },
2455 { "(bad)", { XX
} },
2456 { "(bad)", { XX
} },
2457 { "pmaxsb", { XM
, EXx
} },
2458 { "(bad)", { XX
} },
2463 { "(bad)", { XX
} },
2464 { "(bad)", { XX
} },
2465 { "pmaxsd", { XM
, EXx
} },
2466 { "(bad)", { XX
} },
2471 { "(bad)", { XX
} },
2472 { "(bad)", { XX
} },
2473 { "pmaxuw", { XM
, EXx
} },
2474 { "(bad)", { XX
} },
2479 { "(bad)", { XX
} },
2480 { "(bad)", { XX
} },
2481 { "pmaxud", { XM
, EXx
} },
2482 { "(bad)", { XX
} },
2487 { "(bad)", { XX
} },
2488 { "(bad)", { XX
} },
2489 { "pmulld", { XM
, EXx
} },
2490 { "(bad)", { XX
} },
2495 { "(bad)", { XX
} },
2496 { "(bad)", { XX
} },
2497 { "phminposuw", { XM
, EXx
} },
2498 { "(bad)", { XX
} },
2503 { "(bad)", { XX
} },
2504 { "(bad)", { XX
} },
2505 { "roundps", { XM
, EXx
, Ib
} },
2506 { "(bad)", { XX
} },
2511 { "(bad)", { XX
} },
2512 { "(bad)", { XX
} },
2513 { "roundpd", { XM
, EXx
, Ib
} },
2514 { "(bad)", { XX
} },
2519 { "(bad)", { XX
} },
2520 { "(bad)", { XX
} },
2521 { "roundss", { XM
, EXx
, Ib
} },
2522 { "(bad)", { XX
} },
2527 { "(bad)", { XX
} },
2528 { "(bad)", { XX
} },
2529 { "roundsd", { XM
, EXx
, Ib
} },
2530 { "(bad)", { XX
} },
2535 { "(bad)", { XX
} },
2536 { "(bad)", { XX
} },
2537 { "blendps", { XM
, EXx
, Ib
} },
2538 { "(bad)", { XX
} },
2543 { "(bad)", { XX
} },
2544 { "(bad)", { XX
} },
2545 { "blendpd", { XM
, EXx
, Ib
} },
2546 { "(bad)", { XX
} },
2551 { "(bad)", { XX
} },
2552 { "(bad)", { XX
} },
2553 { "pblendw", { XM
, EXx
, Ib
} },
2554 { "(bad)", { XX
} },
2559 { "(bad)", { XX
} },
2560 { "(bad)", { XX
} },
2561 { "pextrb", { Edqb
, XM
, Ib
} },
2562 { "(bad)", { XX
} },
2567 { "(bad)", { XX
} },
2568 { "(bad)", { XX
} },
2569 { "pextrw", { Edqw
, XM
, Ib
} },
2570 { "(bad)", { XX
} },
2575 { "(bad)", { XX
} },
2576 { "(bad)", { XX
} },
2577 { "pextrK", { Edq
, XM
, Ib
} },
2578 { "(bad)", { XX
} },
2583 { "(bad)", { XX
} },
2584 { "(bad)", { XX
} },
2585 { "extractps", { Edqd
, XM
, Ib
} },
2586 { "(bad)", { XX
} },
2591 { "(bad)", { XX
} },
2592 { "(bad)", { XX
} },
2593 { "pinsrb", { XM
, Edqb
, Ib
} },
2594 { "(bad)", { XX
} },
2599 { "(bad)", { XX
} },
2600 { "(bad)", { XX
} },
2601 { "insertps", { XM
, EXx
, Ib
} },
2602 { "(bad)", { XX
} },
2607 { "(bad)", { XX
} },
2608 { "(bad)", { XX
} },
2609 { "pinsrK", { XM
, Edq
, Ib
} },
2610 { "(bad)", { XX
} },
2615 { "(bad)", { XX
} },
2616 { "(bad)", { XX
} },
2617 { "dpps", { XM
, EXx
, Ib
} },
2618 { "(bad)", { XX
} },
2623 { "(bad)", { XX
} },
2624 { "(bad)", { XX
} },
2625 { "dppd", { XM
, EXx
, Ib
} },
2626 { "(bad)", { XX
} },
2631 { "(bad)", { XX
} },
2632 { "(bad)", { XX
} },
2633 { "mpsadbw", { XM
, EXx
, Ib
} },
2634 { "(bad)", { XX
} },
2639 { "(bad)", { XX
} },
2640 { "(bad)", { XX
} },
2641 { "pcmpgtq", { XM
, EXx
} },
2642 { "(bad)", { XX
} },
2647 { "movbe", { Gv
, Ev
} },
2648 { "(bad)", { XX
} },
2649 { "movbe", { Gv
, Ev
} },
2650 { "crc32", { Gdq
, { CRC32_Fixup
, b_mode
} } },
2655 { "movbe", { Ev
, Gv
} },
2656 { "(bad)", { XX
} },
2657 { "movbe", { Ev
, Gv
} },
2658 { "crc32", { Gdq
, { CRC32_Fixup
, v_mode
} } },
2663 { "(bad)", { XX
} },
2664 { "(bad)", { XX
} },
2665 { "pcmpestrm", { XM
, EXx
, Ib
} },
2666 { "(bad)", { XX
} },
2671 { "(bad)", { XX
} },
2672 { "(bad)", { XX
} },
2673 { "pcmpestri", { XM
, EXx
, Ib
} },
2674 { "(bad)", { XX
} },
2679 { "(bad)", { XX
} },
2680 { "(bad)", { XX
} },
2681 { "pcmpistrm", { XM
, EXx
, Ib
} },
2682 { "(bad)", { XX
} },
2687 { "(bad)", { XX
} },
2688 { "(bad)", { XX
} },
2689 { "pcmpistri", { XM
, EXx
, Ib
} },
2690 { "(bad)", { XX
} },
2695 { "ucomiss",{ XM
, EXd
} },
2696 { "(bad)", { XX
} },
2697 { "ucomisd",{ XM
, EXq
} },
2698 { "(bad)", { XX
} },
2703 { "comiss", { XM
, EXd
} },
2704 { "(bad)", { XX
} },
2705 { "comisd", { XM
, EXq
} },
2706 { "(bad)", { XX
} },
2711 { "punpcklbw",{ MX
, EMd
} },
2712 { "(bad)", { XX
} },
2713 { "punpcklbw",{ MX
, EMq
} },
2714 { "(bad)", { XX
} },
2719 { "punpcklwd",{ MX
, EMd
} },
2720 { "(bad)", { XX
} },
2721 { "punpcklwd",{ MX
, EMq
} },
2722 { "(bad)", { XX
} },
2727 { "punpckldq",{ MX
, EMd
} },
2728 { "(bad)", { XX
} },
2729 { "punpckldq",{ MX
, EMq
} },
2730 { "(bad)", { XX
} },
2735 { "(bad)", { XX
} },
2736 { "(bad)", { XX
} },
2737 { "pclmulqdq", { XM
, EXx
, Ib
} },
2738 { "(bad)", { XX
} },
2743 { "(bad)", { XX
} },
2744 { "(bad)", { XX
} },
2745 { "aesimc", { XM
, EXx
} },
2746 { "(bad)", { XX
} },
2751 { "(bad)", { XX
} },
2752 { "(bad)", { XX
} },
2753 { "aesenc", { XM
, EXx
} },
2754 { "(bad)", { XX
} },
2759 { "(bad)", { XX
} },
2760 { "(bad)", { XX
} },
2761 { "aesenclast", { XM
, EXx
} },
2762 { "(bad)", { XX
} },
2767 { "(bad)", { XX
} },
2768 { "(bad)", { XX
} },
2769 { "aesdec", { XM
, EXx
} },
2770 { "(bad)", { XX
} },
2775 { "(bad)", { XX
} },
2776 { "(bad)", { XX
} },
2777 { "aesdeclast", { XM
, EXx
} },
2778 { "(bad)", { XX
} },
2783 { "(bad)", { XX
} },
2784 { "(bad)", { XX
} },
2785 { "aeskeygenassist", { XM
, EXx
, Ib
} },
2786 { "(bad)", { XX
} },
2791 { "andnS", { Gv
, Bv
, Ev
} },
2792 { "(bad)", { XX
} },
2793 { "(bad)", { XX
} },
2794 { "(bad)", { XX
} },
2799 { "bextrS", { Gv
, Ev
, Bv
} },
2800 { "sarxS", { Gv
, Ev
, Bv
} },
2801 { "shlxS", { Gv
, Ev
, Bv
} },
2802 { "shrxS", { Gv
, Ev
, Bv
} },
2807 { "bsfS", { Gv
, Ev
} },
2808 { "tzcntS", { Gv
, Ev
} },
2809 { "bsfS", { Gv
, Ev
} },
2810 { "(bad)", { XX
} },
2815 { "bzhi", { Gv
, Ev
, Bv
} },
2816 { "pext", { Gv
, Bv
, Ev
} },
2817 { "(bad)", { XX
} },
2818 { "pdep", { Gv
, Bv
, Ev
} },
2823 { "(bad)", { XX
} },
2824 { "(bad)", { XX
} },
2825 { "(bad)", { XX
} },
2826 { "rorx", { Gv
, Ev
, Ib
} },
2830 static const struct dis386 x86_64_table
[][2] = {
2832 { "pusha{P|}", { XX
} },
2833 { "(bad)", { XX
} },
2836 { "popa{P|}", { XX
} },
2837 { "(bad)", { XX
} },
2840 { "bound{S|}", { Gv
, Ma
} },
2841 { "(bad)", { XX
} },
2844 { "arpl", { Ew
, Gw
} },
2845 { "movs{||lq|xd}", { Gv
, Ed
} },
2849 static const struct dis386 three_byte_table
[][256] = {
2853 { "pshufb", { MX
, EM
} },
2854 { "phaddw", { MX
, EM
} },
2855 { "phaddd", { MX
, EM
} },
2856 { "phaddsw", { MX
, EM
} },
2857 { "pmaddubsw", { MX
, EM
} },
2858 { "phsubw", { MX
, EM
} },
2859 { "phsubd", { MX
, EM
} },
2860 { "phsubsw", { MX
, EM
} },
2862 { "psignb", { MX
, EM
} },
2863 { "psignw", { MX
, EM
} },
2864 { "psignd", { MX
, EM
} },