sm501: Add missing arbitration control register
[qemu.git] / disas / i386.c
1 /* opcodes/i386-dis.c r1.126 */
2 /* Print i386 instructions for GDB, the GNU debugger.
3 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
4 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, see <http://www.gnu.org/licenses/>. */
20
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
22 July 1988
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
26
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
33
34 #include "qemu/osdep.h"
35 #include "disas/bfd.h"
36 #include "qemu/cutils.h"
37
38 /* include/opcode/i386.h r1.78 */
39
40 /* opcode/i386.h -- Intel 80386 opcode macros
41 Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
42 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
43 Free Software Foundation, Inc.
44
45 This file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger.
46
47 This program is free software; you can redistribute it and/or modify
48 it under the terms of the GNU General Public License as published by
49 the Free Software Foundation; either version 2 of the License, or
50 (at your option) any later version.
51
52 This program is distributed in the hope that it will be useful,
53 but WITHOUT ANY WARRANTY; without even the implied warranty of
54 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
55 GNU General Public License for more details.
56
57 You should have received a copy of the GNU General Public License
58 along with this program; if not, see <http://www.gnu.org/licenses/>. */
59
60 /* The SystemV/386 SVR3.2 assembler, and probably all AT&T derived
61 ix86 Unix assemblers, generate floating point instructions with
62 reversed source and destination registers in certain cases.
63 Unfortunately, gcc and possibly many other programs use this
64 reversed syntax, so we're stuck with it.
65
66 eg. `fsub %st(3),%st' results in st = st - st(3) as expected, but
67 `fsub %st,%st(3)' results in st(3) = st - st(3), rather than
68 the expected st(3) = st(3) - st
69
70 This happens with all the non-commutative arithmetic floating point
71 operations with two register operands, where the source register is
72 %st, and destination register is %st(i).
73
74 The affected opcode map is dceX, dcfX, deeX, defX. */
75
76 #ifndef SYSV386_COMPAT
77 /* Set non-zero for broken, compatible instructions. Set to zero for
78 non-broken opcodes at your peril. gcc generates SystemV/386
79 compatible instructions. */
80 #define SYSV386_COMPAT 1
81 #endif
82 #ifndef OLDGCC_COMPAT
83 /* Set non-zero to cater for old (<= 2.8.1) versions of gcc that could
84 generate nonsense fsubp, fsubrp, fdivp and fdivrp with operands
85 reversed. */
86 #define OLDGCC_COMPAT SYSV386_COMPAT
87 #endif
88
89 #define MOV_AX_DISP32 0xa0
90 #define POP_SEG_SHORT 0x07
91 #define JUMP_PC_RELATIVE 0xeb
92 #define INT_OPCODE 0xcd
93 #define INT3_OPCODE 0xcc
94 /* The opcode for the fwait instruction, which disassembler treats as a
95 prefix when it can. */
96 #define FWAIT_OPCODE 0x9b
97 #define ADDR_PREFIX_OPCODE 0x67
98 #define DATA_PREFIX_OPCODE 0x66
99 #define LOCK_PREFIX_OPCODE 0xf0
100 #define CS_PREFIX_OPCODE 0x2e
101 #define DS_PREFIX_OPCODE 0x3e
102 #define ES_PREFIX_OPCODE 0x26
103 #define FS_PREFIX_OPCODE 0x64
104 #define GS_PREFIX_OPCODE 0x65
105 #define SS_PREFIX_OPCODE 0x36
106 #define REPNE_PREFIX_OPCODE 0xf2
107 #define REPE_PREFIX_OPCODE 0xf3
108
109 #define TWO_BYTE_OPCODE_ESCAPE 0x0f
110 #define NOP_OPCODE (char) 0x90
111
112 /* register numbers */
113 #define EBP_REG_NUM 5
114 #define ESP_REG_NUM 4
115
116 /* modrm_byte.regmem for twobyte escape */
117 #define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
118 /* index_base_byte.index for no index register addressing */
119 #define NO_INDEX_REGISTER ESP_REG_NUM
120 /* index_base_byte.base for no base register addressing */
121 #define NO_BASE_REGISTER EBP_REG_NUM
122 #define NO_BASE_REGISTER_16 6
123
124 /* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
125 #define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
126 #define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
127
128 /* x86-64 extension prefix. */
129 #define REX_OPCODE 0x40
130
131 /* Indicates 64 bit operand size. */
132 #define REX_W 8
133 /* High extension to reg field of modrm byte. */
134 #define REX_R 4
135 /* High extension to SIB index field. */
136 #define REX_X 2
137 /* High extension to base field of modrm or SIB, or reg field of opcode. */
138 #define REX_B 1
139
140 /* max operands per insn */
141 #define MAX_OPERANDS 4
142
143 /* max immediates per insn (lcall, ljmp, insertq, extrq) */
144 #define MAX_IMMEDIATE_OPERANDS 2
145
146 /* max memory refs per insn (string ops) */
147 #define MAX_MEMORY_OPERANDS 2
148
149 /* max size of insn mnemonics. */
150 #define MAX_MNEM_SIZE 16
151
152 /* max size of register name in insn mnemonics. */
153 #define MAX_REG_NAME_SIZE 8
154
155 /* opcodes/i386-dis.c r1.126 */
156 #include "qemu-common.h"
157
158 static int fetch_data2(struct disassemble_info *, bfd_byte *);
159 static int fetch_data(struct disassemble_info *, bfd_byte *);
160 static void ckprefix (void);
161 static const char *prefix_name (int, int);
162 static int print_insn (bfd_vma, disassemble_info *);
163 static void dofloat (int);
164 static void OP_ST (int, int);
165 static void OP_STi (int, int);
166 static int putop (const char *, int);
167 static void oappend (const char *);
168 static void append_seg (void);
169 static void OP_indirE (int, int);
170 static void print_operand_value (char *buf, size_t bufsize, int hex, bfd_vma disp);
171 static void print_displacement (char *, bfd_vma);
172 static void OP_E (int, int);
173 static void OP_G (int, int);
174 static void OP_vvvv (int, int);
175 static bfd_vma get64 (void);
176 static bfd_signed_vma get32 (void);
177 static bfd_signed_vma get32s (void);
178 static int get16 (void);
179 static void set_op (bfd_vma, int);
180 static void OP_REG (int, int);
181 static void OP_IMREG (int, int);
182 static void OP_I (int, int);
183 static void OP_I64 (int, int);
184 static void OP_sI (int, int);
185 static void OP_J (int, int);
186 static void OP_SEG (int, int);
187 static void OP_DIR (int, int);
188 static void OP_OFF (int, int);
189 static void OP_OFF64 (int, int);
190 static void ptr_reg (int, int);
191 static void OP_ESreg (int, int);
192 static void OP_DSreg (int, int);
193 static void OP_C (int, int);
194 static void OP_D (int, int);
195 static void OP_T (int, int);
196 static void OP_R (int, int);
197 static void OP_MMX (int, int);
198 static void OP_XMM (int, int);
199 static void OP_EM (int, int);
200 static void OP_EX (int, int);
201 static void OP_EMC (int,int);
202 static void OP_MXC (int,int);
203 static void OP_MS (int, int);
204 static void OP_XS (int, int);
205 static void OP_M (int, int);
206 static void OP_VMX (int, int);
207 static void OP_0fae (int, int);
208 static void OP_0f07 (int, int);
209 static void NOP_Fixup1 (int, int);
210 static void NOP_Fixup2 (int, int);
211 static void OP_3DNowSuffix (int, int);
212 static void OP_SIMD_Suffix (int, int);
213 static void SIMD_Fixup (int, int);
214 static void PNI_Fixup (int, int);
215 static void SVME_Fixup (int, int);
216 static void INVLPG_Fixup (int, int);
217 static void BadOp (void);
218 static void VMX_Fixup (int, int);
219 static void REP_Fixup (int, int);
220 static void CMPXCHG8B_Fixup (int, int);
221 static void XMM_Fixup (int, int);
222 static void CRC32_Fixup (int, int);
223
224 struct dis_private {
225 /* Points to first byte not fetched. */
226 bfd_byte *max_fetched;
227 bfd_byte the_buffer[MAX_MNEM_SIZE];
228 bfd_vma insn_start;
229 int orig_sizeflag;
230 sigjmp_buf bailout;
231 };
232
233 enum address_mode
234 {
235 mode_16bit,
236 mode_32bit,
237 mode_64bit
238 };
239
240 static enum address_mode address_mode;
241
242 /* Flags for the prefixes for the current instruction. See below. */
243 static int prefixes;
244
245 /* REX prefix the current instruction. See below. */
246 static int rex;
247 /* Bits of REX we've already used. */
248 static int rex_used;
249 /* Mark parts used in the REX prefix. When we are testing for
250 empty prefix (for 8bit register REX extension), just mask it
251 out. Otherwise test for REX bit is excuse for existence of REX
252 only in case value is nonzero. */
253 #define USED_REX(value) \
254 { \
255 if (value) \
256 { \
257 if ((rex & value)) \
258 rex_used |= (value) | REX_OPCODE; \
259 } \
260 else \
261 rex_used |= REX_OPCODE; \
262 }
263
264 /* Flags for prefixes which we somehow handled when printing the
265 current instruction. */
266 static int used_prefixes;
267
268 /* The VEX.vvvv register, unencoded. */
269 static int vex_reg;
270
271 /* Flags stored in PREFIXES. */
272 #define PREFIX_REPZ 1
273 #define PREFIX_REPNZ 2
274 #define PREFIX_LOCK 4
275 #define PREFIX_CS 8
276 #define PREFIX_SS 0x10
277 #define PREFIX_DS 0x20
278 #define PREFIX_ES 0x40
279 #define PREFIX_FS 0x80
280 #define PREFIX_GS 0x100
281 #define PREFIX_DATA 0x200
282 #define PREFIX_ADDR 0x400
283 #define PREFIX_FWAIT 0x800
284
285 #define PREFIX_VEX_0F 0x1000
286 #define PREFIX_VEX_0F38 0x2000
287 #define PREFIX_VEX_0F3A 0x4000
288
289 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
290 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
291 on error. */
292 static int
293 fetch_data2(struct disassemble_info *info, bfd_byte *addr)
294 {
295 int status;
296 struct dis_private *priv = (struct dis_private *) info->private_data;
297 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
298
299 if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
300 status = (*info->read_memory_func) (start,
301 priv->max_fetched,
302 addr - priv->max_fetched,
303 info);
304 else
305 status = -1;
306 if (status != 0)
307 {
308 /* If we did manage to read at least one byte, then
309 print_insn_i386 will do something sensible. Otherwise, print
310 an error. We do that here because this is where we know
311 STATUS. */
312 if (priv->max_fetched == priv->the_buffer)
313 (*info->memory_error_func) (status, start, info);
314 siglongjmp(priv->bailout, 1);
315 }
316 else
317 priv->max_fetched = addr;
318 return 1;
319 }
320
321 static int
322 fetch_data(struct disassemble_info *info, bfd_byte *addr)
323 {
324 if (addr <= ((struct dis_private *) (info->private_data))->max_fetched) {
325 return 1;
326 } else {
327 return fetch_data2(info, addr);
328 }
329 }
330
331
332 #define XX { NULL, 0 }
333
334 #define Bv { OP_vvvv, v_mode }
335 #define Eb { OP_E, b_mode }
336 #define Ev { OP_E, v_mode }
337 #define Ed { OP_E, d_mode }
338 #define Edq { OP_E, dq_mode }
339 #define Edqw { OP_E, dqw_mode }
340 #define Edqb { OP_E, dqb_mode }
341 #define Edqd { OP_E, dqd_mode }
342 #define indirEv { OP_indirE, stack_v_mode }
343 #define indirEp { OP_indirE, f_mode }
344 #define stackEv { OP_E, stack_v_mode }
345 #define Em { OP_E, m_mode }
346 #define Ew { OP_E, w_mode }
347 #define M { OP_M, 0 } /* lea, lgdt, etc. */
348 #define Ma { OP_M, v_mode }
349 #define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
350 #define Mq { OP_M, q_mode }
351 #define Gb { OP_G, b_mode }
352 #define Gv { OP_G, v_mode }
353 #define Gd { OP_G, d_mode }
354 #define Gdq { OP_G, dq_mode }
355 #define Gm { OP_G, m_mode }
356 #define Gw { OP_G, w_mode }
357 #define Rd { OP_R, d_mode }
358 #define Rm { OP_R, m_mode }
359 #define Ib { OP_I, b_mode }
360 #define sIb { OP_sI, b_mode } /* sign extended byte */
361 #define Iv { OP_I, v_mode }
362 #define Iq { OP_I, q_mode }
363 #define Iv64 { OP_I64, v_mode }
364 #define Iw { OP_I, w_mode }
365 #define I1 { OP_I, const_1_mode }
366 #define Jb { OP_J, b_mode }
367 #define Jv { OP_J, v_mode }
368 #define Cm { OP_C, m_mode }
369 #define Dm { OP_D, m_mode }
370 #define Td { OP_T, d_mode }
371
372 #define RMeAX { OP_REG, eAX_reg }
373 #define RMeBX { OP_REG, eBX_reg }
374 #define RMeCX { OP_REG, eCX_reg }
375 #define RMeDX { OP_REG, eDX_reg }
376 #define RMeSP { OP_REG, eSP_reg }
377 #define RMeBP { OP_REG, eBP_reg }
378 #define RMeSI { OP_REG, eSI_reg }
379 #define RMeDI { OP_REG, eDI_reg }
380 #define RMrAX { OP_REG, rAX_reg }
381 #define RMrBX { OP_REG, rBX_reg }
382 #define RMrCX { OP_REG, rCX_reg }
383 #define RMrDX { OP_REG, rDX_reg }
384 #define RMrSP { OP_REG, rSP_reg }
385 #define RMrBP { OP_REG, rBP_reg }
386 #define RMrSI { OP_REG, rSI_reg }
387 #define RMrDI { OP_REG, rDI_reg }
388 #define RMAL { OP_REG, al_reg }
389 #define RMAL { OP_REG, al_reg }
390 #define RMCL { OP_REG, cl_reg }
391 #define RMDL { OP_REG, dl_reg }
392 #define RMBL { OP_REG, bl_reg }
393 #define RMAH { OP_REG, ah_reg }
394 #define RMCH { OP_REG, ch_reg }
395 #define RMDH { OP_REG, dh_reg }
396 #define RMBH { OP_REG, bh_reg }
397 #define RMAX { OP_REG, ax_reg }
398 #define RMDX { OP_REG, dx_reg }
399
400 #define eAX { OP_IMREG, eAX_reg }
401 #define eBX { OP_IMREG, eBX_reg }
402 #define eCX { OP_IMREG, eCX_reg }
403 #define eDX { OP_IMREG, eDX_reg }
404 #define eSP { OP_IMREG, eSP_reg }
405 #define eBP { OP_IMREG, eBP_reg }
406 #define eSI { OP_IMREG, eSI_reg }
407 #define eDI { OP_IMREG, eDI_reg }
408 #define AL { OP_IMREG, al_reg }
409 #define CL { OP_IMREG, cl_reg }
410 #define DL { OP_IMREG, dl_reg }
411 #define BL { OP_IMREG, bl_reg }
412 #define AH { OP_IMREG, ah_reg }
413 #define CH { OP_IMREG, ch_reg }
414 #define DH { OP_IMREG, dh_reg }
415 #define BH { OP_IMREG, bh_reg }
416 #define AX { OP_IMREG, ax_reg }
417 #define DX { OP_IMREG, dx_reg }
418 #define zAX { OP_IMREG, z_mode_ax_reg }
419 #define indirDX { OP_IMREG, indir_dx_reg }
420
421 #define Sw { OP_SEG, w_mode }
422 #define Sv { OP_SEG, v_mode }
423 #define Ap { OP_DIR, 0 }
424 #define Ob { OP_OFF64, b_mode }
425 #define Ov { OP_OFF64, v_mode }
426 #define Xb { OP_DSreg, eSI_reg }
427 #define Xv { OP_DSreg, eSI_reg }
428 #define Xz { OP_DSreg, eSI_reg }
429 #define Yb { OP_ESreg, eDI_reg }
430 #define Yv { OP_ESreg, eDI_reg }
431 #define DSBX { OP_DSreg, eBX_reg }
432
433 #define es { OP_REG, es_reg }
434 #define ss { OP_REG, ss_reg }
435 #define cs { OP_REG, cs_reg }
436 #define ds { OP_REG, ds_reg }
437 #define fs { OP_REG, fs_reg }
438 #define gs { OP_REG, gs_reg }
439
440 #define MX { OP_MMX, 0 }
441 #define XM { OP_XMM, 0 }
442 #define EM { OP_EM, v_mode }
443 #define EMd { OP_EM, d_mode }
444 #define EMq { OP_EM, q_mode }
445 #define EXd { OP_EX, d_mode }
446 #define EXq { OP_EX, q_mode }
447 #define EXx { OP_EX, x_mode }
448 #define MS { OP_MS, v_mode }
449 #define XS { OP_XS, v_mode }
450 #define EMC { OP_EMC, v_mode }
451 #define MXC { OP_MXC, 0 }
452 #define VM { OP_VMX, q_mode }
453 #define OPSUF { OP_3DNowSuffix, 0 }
454 #define OPSIMD { OP_SIMD_Suffix, 0 }
455 #define XMM0 { XMM_Fixup, 0 }
456
457 /* Used handle "rep" prefix for string instructions. */
458 #define Xbr { REP_Fixup, eSI_reg }
459 #define Xvr { REP_Fixup, eSI_reg }
460 #define Ybr { REP_Fixup, eDI_reg }
461 #define Yvr { REP_Fixup, eDI_reg }
462 #define Yzr { REP_Fixup, eDI_reg }
463 #define indirDXr { REP_Fixup, indir_dx_reg }
464 #define ALr { REP_Fixup, al_reg }
465 #define eAXr { REP_Fixup, eAX_reg }
466
467 #define cond_jump_flag { NULL, cond_jump_mode }
468 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
469
470 /* bits in sizeflag */
471 #define SUFFIX_ALWAYS 4
472 #define AFLAG 2
473 #define DFLAG 1
474
475 #define b_mode 1 /* byte operand */
476 #define v_mode 2 /* operand size depends on prefixes */
477 #define w_mode 3 /* word operand */
478 #define d_mode 4 /* double word operand */
479 #define q_mode 5 /* quad word operand */
480 #define t_mode 6 /* ten-byte operand */
481 #define x_mode 7 /* 16-byte XMM operand */
482 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
483 #define cond_jump_mode 9
484 #define loop_jcxz_mode 10
485 #define dq_mode 11 /* operand size depends on REX prefixes. */
486 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
487 #define f_mode 13 /* 4- or 6-byte pointer operand */
488 #define const_1_mode 14
489 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
490 #define z_mode 16 /* non-quad operand size depends on prefixes */
491 #define o_mode 17 /* 16-byte operand */
492 #define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
493 #define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
494
495 #define es_reg 100
496 #define cs_reg 101
497 #define ss_reg 102
498 #define ds_reg 103
499 #define fs_reg 104
500 #define gs_reg 105
501
502 #define eAX_reg 108
503 #define eCX_reg 109
504 #define eDX_reg 110
505 #define eBX_reg 111
506 #define eSP_reg 112
507 #define eBP_reg 113
508 #define eSI_reg 114
509 #define eDI_reg 115
510
511 #define al_reg 116
512 #define cl_reg 117
513 #define dl_reg 118
514 #define bl_reg 119
515 #define ah_reg 120
516 #define ch_reg 121
517 #define dh_reg 122
518 #define bh_reg 123
519
520 #define ax_reg 124
521 #define cx_reg 125
522 #define dx_reg 126
523 #define bx_reg 127
524 #define sp_reg 128
525 #define bp_reg 129
526 #define si_reg 130
527 #define di_reg 131
528
529 #define rAX_reg 132
530 #define rCX_reg 133
531 #define rDX_reg 134
532 #define rBX_reg 135
533 #define rSP_reg 136
534 #define rBP_reg 137
535 #define rSI_reg 138
536 #define rDI_reg 139
537
538 #define z_mode_ax_reg 149
539 #define indir_dx_reg 150
540
541 #define FLOATCODE 1
542 #define USE_GROUPS 2
543 #define USE_PREFIX_USER_TABLE 3
544 #define X86_64_SPECIAL 4
545 #define IS_3BYTE_OPCODE 5
546
547 #define FLOAT NULL, { { NULL, FLOATCODE } }
548
549 #define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
550 #define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
551 #define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
552 #define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
553 #define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
554 #define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
555 #define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
556 #define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
557 #define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
558 #define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
559 #define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
560 #define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
561 #define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
562 #define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
563 #define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
564 #define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
565 #define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
566 #define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
567 #define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
568 #define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
569 #define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
570 #define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
571 #define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
572 #define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
573 #define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
574 #define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
575 #define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
576 #define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
577
578 #define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
579 #define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
580 #define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
581 #define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
582 #define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
583 #define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
584 #define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
585 #define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
586 #define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
587 #define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
588 #define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
589 #define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
590 #define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
591 #define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
592 #define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
593 #define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
594 #define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
595 #define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
596 #define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
597 #define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
598 #define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
599 #define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
600 #define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
601 #define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
602 #define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
603 #define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
604 #define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
605 #define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
606 #define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
607 #define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
608 #define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
609 #define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
610 #define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
611 #define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
612 #define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
613 #define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
614 #define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
615 #define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
616 #define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
617 #define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
618 #define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
619 #define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
620 #define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
621 #define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
622 #define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
623 #define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
624 #define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
625 #define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
626 #define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
627 #define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
628 #define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
629 #define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
630 #define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
631 #define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
632 #define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
633 #define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
634 #define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
635 #define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
636 #define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
637 #define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
638 #define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
639 #define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
640 #define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
641 #define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
642 #define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
643 #define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
644 #define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
645 #define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
646 #define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
647 #define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
648 #define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
649 #define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
650 #define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
651 #define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
652 #define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
653 #define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
654 #define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
655 #define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
656 #define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
657 #define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
658 #define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
659 #define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
660 #define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
661 #define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
662 #define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
663 #define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
664 #define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
665 #define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
666 #define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
667 #define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
668 #define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
669 #define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
670 #define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
671 #define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
672 #define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
673 #define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
674 #define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
675 #define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
676 #define PREGRP98 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 98 } }
677 #define PREGRP99 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 99 } }
678 #define PREGRP100 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 100 } }
679 #define PREGRP101 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 101 } }
680 #define PREGRP102 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 102 } }
681 #define PREGRP103 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 103 } }
682 #define PREGRP104 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 104 } }
683 #define PREGRP105 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 105 } }
684 #define PREGRP106 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 106 } }
685 #define PREGRP107 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 107 } }
686
687 #define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
688 #define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
689 #define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
690 #define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
691
692 #define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
693 #define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
694
695 typedef void (*op_rtn) (int bytemode, int sizeflag);
696
697 struct dis386 {
698 const char *name;
699 struct
700 {
701 op_rtn rtn;
702 int bytemode;
703 } op[MAX_OPERANDS];
704 };
705
706 /* Upper case letters in the instruction names here are macros.
707 'A' => print 'b' if no register operands or suffix_always is true
708 'B' => print 'b' if suffix_always is true
709 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
710 . size prefix
711 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
712 . suffix_always is true
713 'E' => print 'e' if 32-bit form of jcxz
714 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
715 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
716 'H' => print ",pt" or ",pn" branch hint
717 'I' => honor following macro letter even in Intel mode (implemented only
718 . for some of the macro letters)
719 'J' => print 'l'
720 'K' => print 'd' or 'q' if rex prefix is present.
721 'L' => print 'l' if suffix_always is true
722 'N' => print 'n' if instruction has no wait "prefix"
723 'O' => print 'd' or 'o' (or 'q' in Intel mode)
724 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
725 . or suffix_always is true. print 'q' if rex prefix is present.
726 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
727 . is true
728 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
729 'S' => print 'w', 'l' or 'q' if suffix_always is true
730 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
731 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
732 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
733 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
734 'X' => print 's', 'd' depending on data16 prefix (for XMM)
735 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
736 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
737
738 Many of the above letters print nothing in Intel mode. See "putop"
739 for the details.
740
741 Braces '{' and '}', and vertical bars '|', indicate alternative
742 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
743 modes. In cases where there are only two alternatives, the X86_64
744 instruction is reserved, and "(bad)" is printed.
745 */
746
747 static const struct dis386 dis386[] = {
748 /* 00 */
749 { "addB", { Eb, Gb } },
750 { "addS", { Ev, Gv } },
751 { "addB", { Gb, Eb } },
752 { "addS", { Gv, Ev } },
753 { "addB", { AL, Ib } },
754 { "addS", { eAX, Iv } },
755 { "push{T|}", { es } },
756 { "pop{T|}", { es } },
757 /* 08 */
758 { "orB", { Eb, Gb } },
759 { "orS", { Ev, Gv } },
760 { "orB", { Gb, Eb } },
761 { "orS", { Gv, Ev } },
762 { "orB", { AL, Ib } },
763 { "orS", { eAX, Iv } },
764 { "push{T|}", { cs } },
765 { "(bad)", { XX } }, /* 0x0f extended opcode escape */
766 /* 10 */
767 { "adcB", { Eb, Gb } },
768 { "adcS", { Ev, Gv } },
769 { "adcB", { Gb, Eb } },
770 { "adcS", { Gv, Ev } },
771 { "adcB", { AL, Ib } },
772 { "adcS", { eAX, Iv } },
773 { "push{T|}", { ss } },
774 { "pop{T|}", { ss } },
775 /* 18 */
776 { "sbbB", { Eb, Gb } },
777 { "sbbS", { Ev, Gv } },
778 { "sbbB", { Gb, Eb } },
779 { "sbbS", { Gv, Ev } },
780 { "sbbB", { AL, Ib } },
781 { "sbbS", { eAX, Iv } },
782 { "push{T|}", { ds } },
783 { "pop{T|}", { ds } },
784 /* 20 */
785 { "andB", { Eb, Gb } },
786 { "andS", { Ev, Gv } },
787 { "andB", { Gb, Eb } },
788 { "andS", { Gv, Ev } },
789 { "andB", { AL, Ib } },
790 { "andS", { eAX, Iv } },
791 { "(bad)", { XX } }, /* SEG ES prefix */
792 { "daa{|}", { XX } },
793 /* 28 */
794 { "subB", { Eb, Gb } },
795 { "subS", { Ev, Gv } },
796 { "subB", { Gb, Eb } },
797 { "subS", { Gv, Ev } },
798 { "subB", { AL, Ib } },
799 { "subS", { eAX, Iv } },
800 { "(bad)", { XX } }, /* SEG CS prefix */
801 { "das{|}", { XX } },
802 /* 30 */
803 { "xorB", { Eb, Gb } },
804 { "xorS", { Ev, Gv } },
805 { "xorB", { Gb, Eb } },
806 { "xorS", { Gv, Ev } },
807 { "xorB", { AL, Ib } },
808 { "xorS", { eAX, Iv } },
809 { "(bad)", { XX } }, /* SEG SS prefix */
810 { "aaa{|}", { XX } },
811 /* 38 */
812 { "cmpB", { Eb, Gb } },
813 { "cmpS", { Ev, Gv } },
814 { "cmpB", { Gb, Eb } },
815 { "cmpS", { Gv, Ev } },
816 { "cmpB", { AL, Ib } },
817 { "cmpS", { eAX, Iv } },
818 { "(bad)", { XX } }, /* SEG DS prefix */
819 { "aas{|}", { XX } },
820 /* 40 */
821 { "inc{S|}", { RMeAX } },
822 { "inc{S|}", { RMeCX } },
823 { "inc{S|}", { RMeDX } },
824 { "inc{S|}", { RMeBX } },
825 { "inc{S|}", { RMeSP } },
826 { "inc{S|}", { RMeBP } },
827 { "inc{S|}", { RMeSI } },
828 { "inc{S|}", { RMeDI } },
829 /* 48 */
830 { "dec{S|}", { RMeAX } },
831 { "dec{S|}", { RMeCX } },
832 { "dec{S|}", { RMeDX } },
833 { "dec{S|}", { RMeBX } },
834 { "dec{S|}", { RMeSP } },
835 { "dec{S|}", { RMeBP } },
836 { "dec{S|}", { RMeSI } },
837 { "dec{S|}", { RMeDI } },
838 /* 50 */
839 { "pushV", { RMrAX } },
840 { "pushV", { RMrCX } },
841 { "pushV", { RMrDX } },
842 { "pushV", { RMrBX } },
843 { "pushV", { RMrSP } },
844 { "pushV", { RMrBP } },
845 { "pushV", { RMrSI } },
846 { "pushV", { RMrDI } },
847 /* 58 */
848 { "popV", { RMrAX } },
849 { "popV", { RMrCX } },
850 { "popV", { RMrDX } },
851 { "popV", { RMrBX } },
852 { "popV", { RMrSP } },
853 { "popV", { RMrBP } },
854 { "popV", { RMrSI } },
855 { "popV", { RMrDI } },
856 /* 60 */
857 { X86_64_0 },
858 { X86_64_1 },
859 { X86_64_2 },
860 { X86_64_3 },
861 { "(bad)", { XX } }, /* seg fs */
862 { "(bad)", { XX } }, /* seg gs */
863 { "(bad)", { XX } }, /* op size prefix */
864 { "(bad)", { XX } }, /* adr size prefix */
865 /* 68 */
866 { "pushT", { Iq } },
867 { "imulS", { Gv, Ev, Iv } },
868 { "pushT", { sIb } },
869 { "imulS", { Gv, Ev, sIb } },
870 { "ins{b||b|}", { Ybr, indirDX } },
871 { "ins{R||G|}", { Yzr, indirDX } },
872 { "outs{b||b|}", { indirDXr, Xb } },
873 { "outs{R||G|}", { indirDXr, Xz } },
874 /* 70 */
875 { "joH", { Jb, XX, cond_jump_flag } },
876 { "jnoH", { Jb, XX, cond_jump_flag } },
877 { "jbH", { Jb, XX, cond_jump_flag } },
878 { "jaeH", { Jb, XX, cond_jump_flag } },
879 { "jeH", { Jb, XX, cond_jump_flag } },
880 { "jneH", { Jb, XX, cond_jump_flag } },
881 { "jbeH", { Jb, XX, cond_jump_flag } },
882 { "jaH", { Jb, XX, cond_jump_flag } },
883 /* 78 */
884 { "jsH", { Jb, XX, cond_jump_flag } },
885 { "jnsH", { Jb, XX, cond_jump_flag } },
886 { "jpH", { Jb, XX, cond_jump_flag } },
887 { "jnpH", { Jb, XX, cond_jump_flag } },
888 { "jlH", { Jb, XX, cond_jump_flag } },
889 { "jgeH", { Jb, XX, cond_jump_flag } },
890 { "jleH", { Jb, XX, cond_jump_flag } },
891 { "jgH", { Jb, XX, cond_jump_flag } },
892 /* 80 */
893 { GRP1b },
894 { GRP1S },
895 { "(bad)", { XX } },
896 { GRP1Ss },
897 { "testB", { Eb, Gb } },
898 { "testS", { Ev, Gv } },
899 { "xchgB", { Eb, Gb } },
900 { "xchgS", { Ev, Gv } },
901 /* 88 */
902 { "movB", { Eb, Gb } },
903 { "movS", { Ev, Gv } },
904 { "movB", { Gb, Eb } },
905 { "movS", { Gv, Ev } },
906 { "movD", { Sv, Sw } },
907 { "leaS", { Gv, M } },
908 { "movD", { Sw, Sv } },
909 { GRP1a },
910 /* 90 */
911 { PREGRP38 },
912 { "xchgS", { RMeCX, eAX } },
913 { "xchgS", { RMeDX, eAX } },
914 { "xchgS", { RMeBX, eAX } },
915 { "xchgS", { RMeSP, eAX } },
916 { "xchgS", { RMeBP, eAX } },
917 { "xchgS", { RMeSI, eAX } },
918 { "xchgS", { RMeDI, eAX } },
919 /* 98 */
920 { "cW{t||t|}R", { XX } },
921 { "cR{t||t|}O", { XX } },
922 { "Jcall{T|}", { Ap } },
923 { "(bad)", { XX } }, /* fwait */
924 { "pushfT", { XX } },
925 { "popfT", { XX } },
926 { "sahf{|}", { XX } },
927 { "lahf{|}", { XX } },
928 /* a0 */
929 { "movB", { AL, Ob } },
930 { "movS", { eAX, Ov } },
931 { "movB", { Ob, AL } },
932 { "movS", { Ov, eAX } },
933 { "movs{b||b|}", { Ybr, Xb } },
934 { "movs{R||R|}", { Yvr, Xv } },
935 { "cmps{b||b|}", { Xb, Yb } },
936 { "cmps{R||R|}", { Xv, Yv } },
937 /* a8 */
938 { "testB", { AL, Ib } },
939 { "testS", { eAX, Iv } },
940 { "stosB", { Ybr, AL } },
941 { "stosS", { Yvr, eAX } },
942 { "lodsB", { ALr, Xb } },
943 { "lodsS", { eAXr, Xv } },
944 { "scasB", { AL, Yb } },
945 { "scasS", { eAX, Yv } },
946 /* b0 */
947 { "movB", { RMAL, Ib } },
948 { "movB", { RMCL, Ib } },
949 { "movB", { RMDL, Ib } },
950 { "movB", { RMBL, Ib } },
951 { "movB", { RMAH, Ib } },
952 { "movB", { RMCH, Ib } },
953 { "movB", { RMDH, Ib } },
954 { "movB", { RMBH, Ib } },
955 /* b8 */
956 { "movS", { RMeAX, Iv64 } },
957 { "movS", { RMeCX, Iv64 } },
958 { "movS", { RMeDX, Iv64 } },
959 { "movS", { RMeBX, Iv64 } },
960 { "movS", { RMeSP, Iv64 } },
961 { "movS", { RMeBP, Iv64 } },
962 { "movS", { RMeSI, Iv64 } },
963 { "movS", { RMeDI, Iv64 } },
964 /* c0 */
965 { GRP2b },
966 { GRP2S },
967 { "retT", { Iw } },
968 { "retT", { XX } },
969 { "les{S|}", { Gv, Mp } },
970 { "ldsS", { Gv, Mp } },
971 { GRP11_C6 },
972 { GRP11_C7 },
973 /* c8 */
974 { "enterT", { Iw, Ib } },
975 { "leaveT", { XX } },
976 { "lretP", { Iw } },
977 { "lretP", { XX } },
978 { "int3", { XX } },
979 { "int", { Ib } },
980 { "into{|}", { XX } },
981 { "iretP", { XX } },
982 /* d0 */
983 { GRP2b_one },
984 { GRP2S_one },
985 { GRP2b_cl },
986 { GRP2S_cl },
987 { "aam{|}", { sIb } },
988 { "aad{|}", { sIb } },
989 { "(bad)", { XX } },
990 { "xlat", { DSBX } },
991 /* d8 */
992 { FLOAT },
993 { FLOAT },
994 { FLOAT },
995 { FLOAT },
996 { FLOAT },
997 { FLOAT },
998 { FLOAT },
999 { FLOAT },
1000 /* e0 */
1001 { "loopneFH", { Jb, XX, loop_jcxz_flag } },
1002 { "loopeFH", { Jb, XX, loop_jcxz_flag } },
1003 { "loopFH", { Jb, XX, loop_jcxz_flag } },
1004 { "jEcxzH", { Jb, XX, loop_jcxz_flag } },
1005 { "inB", { AL, Ib } },
1006 { "inG", { zAX, Ib } },
1007 { "outB", { Ib, AL } },
1008 { "outG", { Ib, zAX } },
1009 /* e8 */
1010 { "callT", { Jv } },
1011 { "jmpT", { Jv } },
1012 { "Jjmp{T|}", { Ap } },
1013 { "jmp", { Jb } },
1014 { "inB", { AL, indirDX } },
1015 { "inG", { zAX, indirDX } },
1016 { "outB", { indirDX, AL } },
1017 { "outG", { indirDX, zAX } },
1018 /* f0 */
1019 { "(bad)", { XX } }, /* lock prefix */
1020 { "icebp", { XX } },
1021 { "(bad)", { XX } }, /* repne */
1022 { "(bad)", { XX } }, /* repz */
1023 { "hlt", { XX } },
1024 { "cmc", { XX } },
1025 { GRP3b },
1026 { GRP3S },
1027 /* f8 */
1028 { "clc", { XX } },
1029 { "stc", { XX } },
1030 { "cli", { XX } },
1031 { "sti", { XX } },
1032 { "cld", { XX } },
1033 { "std", { XX } },
1034 { GRP4 },
1035 { GRP5 },
1036 };
1037
1038 static const struct dis386 dis386_twobyte[] = {
1039 /* 00 */
1040 { GRP6 },
1041 { GRP7 },
1042 { "larS", { Gv, Ew } },
1043 { "lslS", { Gv, Ew } },
1044 { "(bad)", { XX } },
1045 { "syscall", { XX } },
1046 { "clts", { XX } },
1047 { "sysretP", { XX } },
1048 /* 08 */
1049 { "invd", { XX } },
1050 { "wbinvd", { XX } },
1051 { "(bad)", { XX } },
1052 { "ud2a", { XX } },
1053 { "(bad)", { XX } },
1054 { GRPAMD },
1055 { "femms", { XX } },
1056 { "", { MX, EM, OPSUF } }, /* See OP_3DNowSuffix. */
1057 /* 10 */
1058 { PREGRP8 },
1059 { PREGRP9 },
1060 { PREGRP30 },
1061 { "movlpX", { EXq, XM, { SIMD_Fixup, 'h' } } },
1062 { "unpcklpX", { XM, EXq } },
1063 { "unpckhpX", { XM, EXq } },
1064 { PREGRP31 },
1065 { "movhpX", { EXq, XM, { SIMD_Fixup, 'l' } } },
1066 /* 18 */
1067 { GRP16 },
1068 { "(bad)", { XX } },
1069 { "(bad)", { XX } },
1070 { "(bad)", { XX } },
1071 { "(bad)", { XX } },
1072 { "(bad)", { XX } },
1073 { "(bad)", { XX } },
1074 { "nopQ", { Ev } },
1075 /* 20 */
1076 { "movZ", { Rm, Cm } },
1077 { "movZ", { Rm, Dm } },
1078 { "movZ", { Cm, Rm } },
1079 { "movZ", { Dm, Rm } },
1080 { "movL", { Rd, Td } },
1081 { "(bad)", { XX } },
1082 { "movL", { Td, Rd } },
1083 { "(bad)", { XX } },
1084 /* 28 */
1085 { "movapX", { XM, EXx } },
1086 { "movapX", { EXx, XM } },
1087 { PREGRP2 },
1088 { PREGRP33 },
1089 { PREGRP4 },
1090 { PREGRP3 },
1091 { PREGRP93 },
1092 { PREGRP94 },
1093 /* 30 */
1094 { "wrmsr", { XX } },
1095 { "rdtsc", { XX } },
1096 { "rdmsr", { XX } },
1097 { "rdpmc", { XX } },
1098 { "sysenter", { XX } },
1099 { "sysexit", { XX } },
1100 { "(bad)", { XX } },
1101 { "(bad)", { XX } },
1102 /* 38 */
1103 { THREE_BYTE_0 },
1104 { "(bad)", { XX } },
1105 { THREE_BYTE_1 },
1106 { "(bad)", { XX } },
1107 { "(bad)", { XX } },
1108 { "(bad)", { XX } },
1109 { "(bad)", { XX } },
1110 { "(bad)", { XX } },
1111 /* 40 */
1112 { "cmovo", { Gv, Ev } },
1113 { "cmovno", { Gv, Ev } },
1114 { "cmovb", { Gv, Ev } },
1115 { "cmovae", { Gv, Ev } },
1116 { "cmove", { Gv, Ev } },
1117 { "cmovne", { Gv, Ev } },
1118 { "cmovbe", { Gv, Ev } },
1119 { "cmova", { Gv, Ev } },
1120 /* 48 */
1121 { "cmovs", { Gv, Ev } },
1122 { "cmovns", { Gv, Ev } },
1123 { "cmovp", { Gv, Ev } },
1124 { "cmovnp", { Gv, Ev } },
1125 { "cmovl", { Gv, Ev } },
1126 { "cmovge", { Gv, Ev } },
1127 { "cmovle", { Gv, Ev } },
1128 { "cmovg", { Gv, Ev } },
1129 /* 50 */
1130 { "movmskpX", { Gdq, XS } },
1131 { PREGRP13 },
1132 { PREGRP12 },
1133 { PREGRP11 },
1134 { "andpX", { XM, EXx } },
1135 { "andnpX", { XM, EXx } },
1136 { "orpX", { XM, EXx } },
1137 { "xorpX", { XM, EXx } },
1138 /* 58 */
1139 { PREGRP0 },
1140 { PREGRP10 },
1141 { PREGRP17 },
1142 { PREGRP16 },
1143 { PREGRP14 },
1144 { PREGRP7 },
1145 { PREGRP5 },
1146 { PREGRP6 },
1147 /* 60 */
1148 { PREGRP95 },
1149 { PREGRP96 },
1150 { PREGRP97 },
1151 { "packsswb", { MX, EM } },
1152 { "pcmpgtb", { MX, EM } },
1153 { "pcmpgtw", { MX, EM } },
1154 { "pcmpgtd", { MX, EM } },
1155 { "packuswb", { MX, EM } },
1156 /* 68 */
1157 { "punpckhbw", { MX, EM } },
1158 { "punpckhwd", { MX, EM } },
1159 { "punpckhdq", { MX, EM } },
1160 { "packssdw", { MX, EM } },
1161 { PREGRP26 },
1162 { PREGRP24 },
1163 { "movd", { MX, Edq } },
1164 { PREGRP19 },
1165 /* 70 */
1166 { PREGRP22 },
1167 { GRP12 },
1168 { GRP13 },
1169 { GRP14 },
1170 { "pcmpeqb", { MX, EM } },
1171 { "pcmpeqw", { MX, EM } },
1172 { "pcmpeqd", { MX, EM } },
1173 { "emms", { XX } },
1174 /* 78 */
1175 { PREGRP34 },
1176 { PREGRP35 },
1177 { "(bad)", { XX } },
1178 { "(bad)", { XX } },
1179 { PREGRP28 },
1180 { PREGRP29 },
1181 { PREGRP23 },
1182 { PREGRP20 },
1183 /* 80 */
1184 { "joH", { Jv, XX, cond_jump_flag } },
1185 { "jnoH", { Jv, XX, cond_jump_flag } },
1186 { "jbH", { Jv, XX, cond_jump_flag } },
1187 { "jaeH", { Jv, XX, cond_jump_flag } },
1188 { "jeH", { Jv, XX, cond_jump_flag } },
1189 { "jneH", { Jv, XX, cond_jump_flag } },
1190 { "jbeH", { Jv, XX, cond_jump_flag } },
1191 { "jaH", { Jv, XX, cond_jump_flag } },
1192 /* 88 */
1193 { "jsH", { Jv, XX, cond_jump_flag } },
1194 { "jnsH", { Jv, XX, cond_jump_flag } },
1195 { "jpH", { Jv, XX, cond_jump_flag } },
1196 { "jnpH", { Jv, XX, cond_jump_flag } },
1197 { "jlH", { Jv, XX, cond_jump_flag } },
1198 { "jgeH", { Jv, XX, cond_jump_flag } },
1199 { "jleH", { Jv, XX, cond_jump_flag } },
1200 { "jgH", { Jv, XX, cond_jump_flag } },
1201 /* 90 */
1202 { "seto", { Eb } },
1203 { "setno", { Eb } },
1204 { "setb", { Eb } },
1205 { "setae", { Eb } },
1206 { "sete", { Eb } },
1207 { "setne", { Eb } },
1208 { "setbe", { Eb } },
1209 { "seta", { Eb } },
1210 /* 98 */
1211 { "sets", { Eb } },
1212 { "setns", { Eb } },
1213 { "setp", { Eb } },
1214 { "setnp", { Eb } },
1215 { "setl", { Eb } },
1216 { "setge", { Eb } },
1217 { "setle", { Eb } },
1218 { "setg", { Eb } },
1219 /* a0 */
1220 { "pushT", { fs } },
1221 { "popT", { fs } },
1222 { "cpuid", { XX } },
1223 { "btS", { Ev, Gv } },
1224 { "shldS", { Ev, Gv, Ib } },
1225 { "shldS", { Ev, Gv, CL } },
1226 { GRPPADLCK2 },
1227 { GRPPADLCK1 },
1228 /* a8 */
1229 { "pushT", { gs } },
1230 { "popT", { gs } },
1231 { "rsm", { XX } },
1232 { "btsS", { Ev, Gv } },
1233 { "shrdS", { Ev, Gv, Ib } },
1234 { "shrdS", { Ev, Gv, CL } },
1235 { GRP15 },
1236 { "imulS", { Gv, Ev } },
1237 /* b0 */
1238 { "cmpxchgB", { Eb, Gb } },
1239 { "cmpxchgS", { Ev, Gv } },
1240 { "lssS", { Gv, Mp } },
1241 { "btrS", { Ev, Gv } },
1242 { "lfsS", { Gv, Mp } },
1243 { "lgsS", { Gv, Mp } },
1244 { "movz{bR|x|bR|x}", { Gv, Eb } },
1245 { "movz{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */
1246 /* b8 */
1247 { PREGRP37 },
1248 { "ud2b", { XX } },
1249 { GRP8 },
1250 { "btcS", { Ev, Gv } },
1251 { PREGRP107 },
1252 { PREGRP36 },
1253 { "movs{bR|x|bR|x}", { Gv, Eb } },
1254 { "movs{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movsww ! */
1255 /* c0 */
1256 { "xaddB", { Eb, Gb } },
1257 { "xaddS", { Ev, Gv } },
1258 { PREGRP1 },
1259 { "movntiS", { Ev, Gv } },
1260 { "pinsrw", { MX, Edqw, Ib } },
1261 { "pextrw", { Gdq, MS, Ib } },
1262 { "shufpX", { XM, EXx, Ib } },
1263 { GRP9 },
1264 /* c8 */
1265 { "bswap", { RMeAX } },
1266 { "bswap", { RMeCX } },
1267 { "bswap", { RMeDX } },
1268 { "bswap", { RMeBX } },
1269 { "bswap", { RMeSP } },
1270 { "bswap", { RMeBP } },
1271 { "bswap", { RMeSI } },
1272 { "bswap", { RMeDI } },
1273 /* d0 */
1274 { PREGRP27 },
1275 { "psrlw", { MX, EM } },
1276 { "psrld", { MX, EM } },
1277 { "psrlq", { MX, EM } },
1278 { "paddq", { MX, EM } },
1279 { "pmullw", { MX, EM } },
1280 { PREGRP21 },
1281 { "pmovmskb", { Gdq, MS } },
1282 /* d8 */
1283 { "psubusb", { MX, EM } },
1284 { "psubusw", { MX, EM } },
1285 { "pminub", { MX, EM } },
1286 { "pand", { MX, EM } },
1287 { "paddusb", { MX, EM } },
1288 { "paddusw", { MX, EM } },
1289 { "pmaxub", { MX, EM } },
1290 { "pandn", { MX, EM } },
1291 /* e0 */
1292 { "pavgb", { MX, EM } },
1293 { "psraw", { MX, EM } },
1294 { "psrad", { MX, EM } },
1295 { "pavgw", { MX, EM } },
1296 { "pmulhuw", { MX, EM } },
1297 { "pmulhw", { MX, EM } },
1298 { PREGRP15 },
1299 { PREGRP25 },
1300 /* e8 */
1301 { "psubsb", { MX, EM } },
1302 { "psubsw", { MX, EM } },
1303 { "pminsw", { MX, EM } },
1304 { "por", { MX, EM } },
1305 { "paddsb", { MX, EM } },
1306 { "paddsw", { MX, EM } },
1307 { "pmaxsw", { MX, EM } },
1308 { "pxor", { MX, EM } },
1309 /* f0 */
1310 { PREGRP32 },
1311 { "psllw", { MX, EM } },
1312 { "pslld", { MX, EM } },
1313 { "psllq", { MX, EM } },
1314 { "pmuludq", { MX, EM } },
1315 { "pmaddwd", { MX, EM } },
1316 { "psadbw", { MX, EM } },
1317 { PREGRP18 },
1318 /* f8 */
1319 { "psubb", { MX, EM } },
1320 { "psubw", { MX, EM } },
1321 { "psubd", { MX, EM } },
1322 { "psubq", { MX, EM } },
1323 { "paddb", { MX, EM } },
1324 { "paddw", { MX, EM } },
1325 { "paddd", { MX, EM } },
1326 { "(bad)", { XX } },
1327 };
1328
1329 static const unsigned char onebyte_has_modrm[256] = {
1330 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1331 /* ------------------------------- */
1332 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1333 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1334 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1335 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1336 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1337 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1338 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1339 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1340 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1341 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1342 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1343 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1344 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1345 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1346 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1347 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1348 /* ------------------------------- */
1349 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1350 };
1351
1352 static const unsigned char twobyte_has_modrm[256] = {
1353 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1354 /* ------------------------------- */
1355 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1356 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1357 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1358 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1359 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1360 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1361 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1362 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1363 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1364 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1365 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1366 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1367 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1368 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1369 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1370 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1371 /* ------------------------------- */
1372 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1373 };
1374
1375 static const unsigned char twobyte_uses_DATA_prefix[256] = {
1376 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1377 /* ------------------------------- */
1378 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1379 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1380 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1381 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1382 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1383 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1384 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1385 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
1386 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1387 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1388 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1389 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1390 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1391 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1392 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1393 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1394 /* ------------------------------- */
1395 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1396 };
1397
1398 static const unsigned char twobyte_uses_REPNZ_prefix[256] = {
1399 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1400 /* ------------------------------- */
1401 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1402 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1403 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1404 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1405 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1406 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
1407 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1408 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
1409 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1410 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1411 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1412 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1413 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1414 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1415 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1416 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1417 /* ------------------------------- */
1418 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1419 };
1420
1421 static const unsigned char twobyte_uses_REPZ_prefix[256] = {
1422 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1423 /* ------------------------------- */
1424 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1425 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1426 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1427 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1428 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1429 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1430 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
1431 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1432 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1433 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1434 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1435 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,1,1,0,0, /* bf */
1436 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1437 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1438 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1439 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1440 /* ------------------------------- */
1441 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1442 };
1443
1444 /* This is used to determine if opcode 0f 38 XX uses DATA prefix. */
1445 static const unsigned char threebyte_0x38_uses_DATA_prefix[256] = {
1446 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1447 /* ------------------------------- */
1448 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
1449 /* 10 */ 1,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */
1450 /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */
1451 /* 30 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* 3f */
1452 /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1453 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1454 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1455 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1456 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1457 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1458 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1459 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1460 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1461 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1, /* df */
1462 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1463 /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0, /* ff */
1464 /* ------------------------------- */
1465 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1466 };
1467
1468 /* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */
1469 static const unsigned char threebyte_0x38_uses_REPNZ_prefix[256] = {
1470 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1471 /* ------------------------------- */
1472 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1473 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1474 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1475 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1476 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1477 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1478 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1479 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1480 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1481 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1482 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1483 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1484 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1485 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1486 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1487 /* f0 */ 1,1,0,0,0,0,0,1,0,0,0,0,0,0,0,0, /* ff */
1488 /* ------------------------------- */
1489 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1490 };
1491
1492 /* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */
1493 static const unsigned char threebyte_0x38_uses_REPZ_prefix[256] = {
1494 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1495 /* ------------------------------- */
1496 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1497 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1498 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1499 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1500 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1501 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1502 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1503 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1504 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1505 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1506 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1507 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1508 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1509 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1510 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1511 /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0, /* ff */
1512 /* ------------------------------- */
1513 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1514 };
1515
1516 /* This is used to determine if opcode 0f 3a XX uses DATA prefix. */
1517 static const unsigned char threebyte_0x3a_uses_DATA_prefix[256] = {
1518 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1519 /* ------------------------------- */
1520 /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */
1521 /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */
1522 /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1523 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1524 /* 40 */ 1,1,1,0,1,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1525 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1526 /* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1527 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1528 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1529 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1530 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1531 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1532 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1533 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* df */
1534 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1535 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1536 /* ------------------------------- */
1537 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1538 };
1539
1540 /* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */
1541 static const unsigned char threebyte_0x3a_uses_REPNZ_prefix[256] = {
1542 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1543 /* ------------------------------- */
1544 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1545 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1546 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1547 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1548 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1549 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1550 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1551 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1552 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1553 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1554 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1555 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1556 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1557 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1558 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1559 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1560 /* ------------------------------- */
1561 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1562 };
1563
1564 /* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */
1565 static const unsigned char threebyte_0x3a_uses_REPZ_prefix[256] = {
1566 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1567 /* ------------------------------- */
1568 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1569 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1570 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1571 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1572 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1573 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1574 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1575 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1576 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1577 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1578 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1579 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1580 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1581 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1582 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1583 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1584 /* ------------------------------- */
1585 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1586 };
1587
1588 static char obuf[100];
1589 static char *obufp;
1590 static char scratchbuf[100];
1591 static unsigned char *start_codep;
1592 static unsigned char *insn_codep;
1593 static unsigned char *codep;
1594 static disassemble_info *the_info;
1595 static struct
1596 {
1597 int mod;
1598 int reg;
1599 int rm;
1600 }
1601 modrm;
1602 static unsigned char need_modrm;
1603
1604 /* If we are accessing mod/rm/reg without need_modrm set, then the
1605 values are stale. Hitting this abort likely indicates that you
1606 need to update onebyte_has_modrm or twobyte_has_modrm. */
1607 #define MODRM_CHECK if (!need_modrm) abort ()
1608
1609 static const char * const *names64;
1610 static const char * const *names32;
1611 static const char * const *names16;
1612 static const char * const *names8;
1613 static const char * const *names8rex;
1614 static const char * const *names_seg;
1615 static const char * const *index16;
1616
1617 static const char * const intel_names64[] = {
1618 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1619 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1620 };
1621 static const char * const intel_names32[] = {
1622 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1623 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1624 };
1625 static const char * const intel_names16[] = {
1626 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1627 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1628 };
1629 static const char * const intel_names8[] = {
1630 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1631 };
1632 static const char * const intel_names8rex[] = {
1633 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1634 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1635 };
1636 static const char * const intel_names_seg[] = {
1637 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1638 };
1639 static const char * const intel_index16[] = {
1640 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1641 };
1642
1643 static const char * const att_names64[] = {
1644 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1645 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1646 };
1647 static const char * const att_names32[] = {
1648 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1649 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1650 };
1651 static const char * const att_names16[] = {
1652 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1653 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1654 };
1655 static const char * const att_names8[] = {
1656 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1657 };
1658 static const char * const att_names8rex[] = {
1659 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1660 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1661 };
1662 static const char * const att_names_seg[] = {
1663 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1664 };
1665 static const char * const att_index16[] = {
1666 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1667 };
1668
1669 static const struct dis386 grps[][8] = {
1670 /* GRP1a */
1671 {
1672 { "popU", { stackEv } },
1673 { "(bad)", { XX } },
1674 { "(bad)", { XX } },
1675 { "(bad)", { XX } },
1676 { "(bad)", { XX } },
1677 { "(bad)", { XX } },
1678 { "(bad)", { XX } },
1679 { "(bad)", { XX } },
1680 },
1681 /* GRP1b */
1682 {
1683 { "addA", { Eb, Ib } },
1684 { "orA", { Eb, Ib } },
1685 { "adcA", { Eb, Ib } },
1686 { "sbbA", { Eb, Ib } },
1687 { "andA", { Eb, Ib } },
1688 { "subA", { Eb, Ib } },
1689 { "xorA", { Eb, Ib } },
1690 { "cmpA", { Eb, Ib } },
1691 },
1692 /* GRP1S */
1693 {
1694 { "addQ", { Ev, Iv } },
1695 { "orQ", { Ev, Iv } },
1696 { "adcQ", { Ev, Iv } },
1697 { "sbbQ", { Ev, Iv } },
1698 { "andQ", { Ev, Iv } },
1699 { "subQ", { Ev, Iv } },
1700 { "xorQ", { Ev, Iv } },
1701 { "cmpQ", { Ev, Iv } },
1702 },
1703 /* GRP1Ss */
1704 {
1705 { "addQ", { Ev, sIb } },
1706 { "orQ", { Ev, sIb } },
1707 { "adcQ", { Ev, sIb } },
1708 { "sbbQ", { Ev, sIb } },
1709 { "andQ", { Ev, sIb } },
1710 { "subQ", { Ev, sIb } },
1711 { "xorQ", { Ev, sIb } },
1712 { "cmpQ", { Ev, sIb } },
1713 },
1714 /* GRP2b */
1715 {
1716 { "rolA", { Eb, Ib } },
1717 { "rorA", { Eb, Ib } },
1718 { "rclA", { Eb, Ib } },
1719 { "rcrA", { Eb, Ib } },
1720 { "shlA", { Eb, Ib } },
1721 { "shrA", { Eb, Ib } },
1722 { "(bad)", { XX } },
1723 { "sarA", { Eb, Ib } },
1724 },
1725 /* GRP2S */
1726 {
1727 { "rolQ", { Ev, Ib } },
1728 { "rorQ", { Ev, Ib } },
1729 { "rclQ", { Ev, Ib } },
1730 { "rcrQ", { Ev, Ib } },
1731 { "shlQ", { Ev, Ib } },
1732 { "shrQ", { Ev, Ib } },
1733 { "(bad)", { XX } },
1734 { "sarQ", { Ev, Ib } },
1735 },
1736 /* GRP2b_one */
1737 {
1738 { "rolA", { Eb, I1 } },
1739 { "rorA", { Eb, I1 } },
1740 { "rclA", { Eb, I1 } },
1741 { "rcrA", { Eb, I1 } },
1742 { "shlA", { Eb, I1 } },
1743 { "shrA", { Eb, I1 } },
1744 { "(bad)", { XX } },
1745 { "sarA", { Eb, I1 } },
1746 },
1747 /* GRP2S_one */
1748 {
1749 { "rolQ", { Ev, I1 } },
1750 { "rorQ", { Ev, I1 } },
1751 { "rclQ", { Ev, I1 } },
1752 { "rcrQ", { Ev, I1 } },
1753 { "shlQ", { Ev, I1 } },
1754 { "shrQ", { Ev, I1 } },
1755 { "(bad)", { XX } },
1756 { "sarQ", { Ev, I1 } },
1757 },
1758 /* GRP2b_cl */
1759 {
1760 { "rolA", { Eb, CL } },
1761 { "rorA", { Eb, CL } },
1762 { "rclA", { Eb, CL } },
1763 { "rcrA", { Eb, CL } },
1764 { "shlA", { Eb, CL } },
1765 { "shrA", { Eb, CL } },
1766 { "(bad)", { XX } },
1767 { "sarA", { Eb, CL } },
1768 },
1769 /* GRP2S_cl */
1770 {
1771 { "rolQ", { Ev, CL } },
1772 { "rorQ", { Ev, CL } },
1773 { "rclQ", { Ev, CL } },
1774 { "rcrQ", { Ev, CL } },
1775 { "shlQ", { Ev, CL } },
1776 { "shrQ", { Ev, CL } },
1777 { "(bad)", { XX } },
1778 { "sarQ", { Ev, CL } },
1779 },
1780 /* GRP3b */
1781 {
1782 { "testA", { Eb, Ib } },
1783 { "(bad)", { Eb } },
1784 { "notA", { Eb } },
1785 { "negA", { Eb } },
1786 { "mulA", { Eb } }, /* Don't print the implicit %al register, */
1787 { "imulA", { Eb } }, /* to distinguish these opcodes from other */
1788 { "divA", { Eb } }, /* mul/imul opcodes. Do the same for div */
1789 { "idivA", { Eb } }, /* and idiv for consistency. */
1790 },
1791 /* GRP3S */
1792 {
1793 { "testQ", { Ev, Iv } },
1794 { "(bad)", { XX } },
1795 { "notQ", { Ev } },
1796 { "negQ", { Ev } },
1797 { "mulQ", { Ev } }, /* Don't print the implicit register. */
1798 { "imulQ", { Ev } },
1799 { "divQ", { Ev } },
1800 { "idivQ", { Ev } },
1801 },
1802 /* GRP4 */
1803 {
1804 { "incA", { Eb } },
1805 { "decA", { Eb } },
1806 { "(bad)", { XX } },
1807 { "(bad)", { XX } },
1808 { "(bad)", { XX } },
1809 { "(bad)", { XX } },
1810 { "(bad)", { XX } },
1811 { "(bad)", { XX } },
1812 },
1813 /* GRP5 */
1814 {
1815 { "incQ", { Ev } },
1816 { "decQ", { Ev } },
1817 { "callT", { indirEv } },
1818 { "JcallT", { indirEp } },
1819 { "jmpT", { indirEv } },
1820 { "JjmpT", { indirEp } },
1821 { "pushU", { stackEv } },
1822 { "(bad)", { XX } },
1823 },
1824 /* GRP6 */
1825 {
1826 { "sldtD", { Sv } },
1827 { "strD", { Sv } },
1828 { "lldt", { Ew } },
1829 { "ltr", { Ew } },
1830 { "verr", { Ew } },
1831 { "verw", { Ew } },
1832 { "(bad)", { XX } },
1833 { "(bad)", { XX } },
1834 },
1835 /* GRP7 */
1836 {
1837 { "sgdt{Q|IQ||}", { { VMX_Fixup, 0 } } },
1838 { "sidt{Q|IQ||}", { { PNI_Fixup, 0 } } },
1839 { "lgdt{Q|Q||}", { M } },
1840 { "lidt{Q|Q||}", { { SVME_Fixup, 0 } } },
1841 { "smswD", { Sv } },
1842 { "(bad)", { XX } },
1843 { "lmsw", { Ew } },
1844 { "invlpg", { { INVLPG_Fixup, w_mode } } },
1845 },
1846 /* GRP8 */
1847 {
1848 { "(bad)", { XX } },
1849 { "(bad)", { XX } },
1850 { "(bad)", { XX } },
1851 { "(bad)", { XX } },
1852 { "btQ", { Ev, Ib } },
1853 { "btsQ", { Ev, Ib } },
1854 { "btrQ", { Ev, Ib } },
1855 { "btcQ", { Ev, Ib } },
1856 },
1857 /* GRP9 */
1858 {
1859 { "(bad)", { XX } },
1860 { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
1861 { "(bad)", { XX } },
1862 { "(bad)", { XX } },
1863 { "(bad)", { XX } },
1864 { "(bad)", { XX } },
1865 { "", { VM } }, /* See OP_VMX. */
1866 { "vmptrst", { Mq } },
1867 },
1868 /* GRP11_C6 */
1869 {
1870 { "movA", { Eb, Ib } },
1871 { "(bad)", { XX } },
1872 { "(bad)", { XX } },
1873 { "(bad)", { XX } },
1874 { "(bad)", { XX } },
1875 { "(bad)", { XX } },
1876 { "(bad)", { XX } },
1877 { "(bad)", { XX } },
1878 },
1879 /* GRP11_C7 */
1880 {
1881 { "movQ", { Ev, Iv } },
1882 { "(bad)", { XX } },
1883 { "(bad)", { XX } },
1884 { "(bad)", { XX } },
1885 { "(bad)", { XX } },
1886 { "(bad)", { XX } },
1887 { "(bad)", { XX } },
1888 { "(bad)", { XX } },
1889 },
1890 /* GRP12 */
1891 {
1892 { "(bad)", { XX } },
1893 { "(bad)", { XX } },
1894 { "psrlw", { MS, Ib } },
1895 { "(bad)", { XX } },
1896 { "psraw", { MS, Ib } },
1897 { "(bad)", { XX } },
1898 { "psllw", { MS, Ib } },
1899 { "(bad)", { XX } },
1900 },
1901 /* GRP13 */
1902 {
1903 { "(bad)", { XX } },
1904 { "(bad)", { XX } },
1905 { "psrld", { MS, Ib } },
1906 { "(bad)", { XX } },
1907 { "psrad", { MS, Ib } },
1908 { "(bad)", { XX } },
1909 { "pslld", { MS, Ib } },
1910 { "(bad)", { XX } },
1911 },
1912 /* GRP14 */
1913 {
1914 { "(bad)", { XX } },
1915 { "(bad)", { XX } },
1916 { "psrlq", { MS, Ib } },
1917 { "psrldq", { MS, Ib } },
1918 { "(bad)", { XX } },
1919 { "(bad)", { XX } },
1920 { "psllq", { MS, Ib } },
1921 { "pslldq", { MS, Ib } },
1922 },
1923 /* GRP15 */
1924 {
1925 { "fxsave", { Ev } },
1926 { "fxrstor", { Ev } },
1927 { "ldmxcsr", { Ev } },
1928 { "stmxcsr", { Ev } },
1929 { "(bad)", { XX } },
1930 { "lfence", { { OP_0fae, 0 } } },
1931 { "mfence", { { OP_0fae, 0 } } },
1932 { "clflush", { { OP_0fae, 0 } } },
1933 },
1934 /* GRP16 */
1935 {
1936 { "prefetchnta", { Ev } },
1937 { "prefetcht0", { Ev } },
1938 { "prefetcht1", { Ev } },
1939 { "prefetcht2", { Ev } },
1940 { "(bad)", { XX } },
1941 { "(bad)", { XX } },
1942 { "(bad)", { XX } },
1943 { "(bad)", { XX } },
1944 },
1945 /* GRPAMD */
1946 {
1947 { "prefetch", { Eb } },
1948 { "prefetchw", { Eb } },
1949 { "(bad)", { XX } },
1950 { "(bad)", { XX } },
1951 { "(bad)", { XX } },
1952 { "(bad)", { XX } },
1953 { "(bad)", { XX } },
1954 { "(bad)", { XX } },
1955 },
1956 /* GRPPADLCK1 */
1957 {
1958 { "xstore-rng", { { OP_0f07, 0 } } },
1959 { "xcrypt-ecb", { { OP_0f07, 0 } } },
1960 { "xcrypt-cbc", { { OP_0f07, 0 } } },
1961 { "xcrypt-ctr", { { OP_0f07, 0 } } },
1962 { "xcrypt-cfb", { { OP_0f07, 0 } } },
1963 { "xcrypt-ofb", { { OP_0f07, 0 } } },
1964 { "(bad)", { { OP_0f07, 0 } } },
1965 { "(bad)", { { OP_0f07, 0 } } },
1966 },
1967 /* GRPPADLCK2 */
1968 {
1969 { "montmul", { { OP_0f07, 0 } } },
1970 { "xsha1", { { OP_0f07, 0 } } },
1971 { "xsha256", { { OP_0f07, 0 } } },
1972 { "(bad)", { { OP_0f07, 0 } } },
1973 { "(bad)", { { OP_0f07, 0 } } },
1974 { "(bad)", { { OP_0f07, 0 } } },
1975 { "(bad)", { { OP_0f07, 0 } } },
1976 { "(bad)", { { OP_0f07, 0 } } },
1977 }
1978 };
1979
1980 static const struct dis386 prefix_user_table[][4] = {
1981 /* PREGRP0 */
1982 {
1983 { "addps", { XM, EXx } },
1984 { "addss", { XM, EXd } },
1985 { "addpd", { XM, EXx } },
1986 { "addsd", { XM, EXq } },
1987 },
1988 /* PREGRP1 */
1989 {
1990 { "", { XM, EXx, OPSIMD } }, /* See OP_SIMD_SUFFIX. */
1991 { "", { XM, EXx, OPSIMD } },
1992 { "", { XM, EXx, OPSIMD } },
1993 { "", { XM, EXx, OPSIMD } },
1994 },
1995 /* PREGRP2 */
1996 {
1997 { "cvtpi2ps", { XM, EMC } },
1998 { "cvtsi2ssY", { XM, Ev } },
1999 { "cvtpi2pd", { XM, EMC } },
2000 { "cvtsi2sdY", { XM, Ev } },
2001 },
2002 /* PREGRP3 */
2003 {
2004 { "cvtps2pi", { MXC, EXx } },
2005 { "cvtss2siY", { Gv, EXx } },
2006 { "cvtpd2pi", { MXC, EXx } },
2007 { "cvtsd2siY", { Gv, EXx } },
2008 },
2009 /* PREGRP4 */
2010 {
2011 { "cvttps2pi", { MXC, EXx } },
2012 { "cvttss2siY", { Gv, EXx } },
2013 { "cvttpd2pi", { MXC, EXx } },
2014 { "cvttsd2siY", { Gv, EXx } },
2015 },
2016 /* PREGRP5 */
2017 {
2018 { "divps", { XM, EXx } },
2019 { "divss", { XM, EXx } },
2020 { "divpd", { XM, EXx } },
2021 { "divsd", { XM, EXx } },
2022 },
2023 /* PREGRP6 */
2024 {
2025 { "maxps", { XM, EXx } },
2026 { "maxss", { XM, EXx } },
2027 { "maxpd", { XM, EXx } },
2028 { "maxsd", { XM, EXx } },
2029 },
2030 /* PREGRP7 */
2031 {
2032 { "minps", { XM, EXx } },
2033 { "minss", { XM, EXx } },
2034 { "minpd", { XM, EXx } },
2035 { "minsd", { XM, EXx } },
2036 },
2037 /* PREGRP8 */
2038 {
2039 { "movups", { XM, EXx } },
2040 { "movss", { XM, EXx } },
2041 { "movupd", { XM, EXx } },
2042 { "movsd", { XM, EXx } },
2043 },
2044 /* PREGRP9 */
2045 {
2046 { "movups", { EXx, XM } },
2047 { "movss", { EXx, XM } },
2048 { "movupd", { EXx, XM } },
2049 { "movsd", { EXx, XM } },
2050 },
2051 /* PREGRP10 */
2052 {
2053 { "mulps", { XM, EXx } },
2054 { "mulss", { XM, EXx } },
2055 { "mulpd", { XM, EXx } },
2056 { "mulsd", { XM, EXx } },
2057 },
2058 /* PREGRP11 */
2059 {
2060 { "rcpps", { XM, EXx } },
2061 { "rcpss", { XM, EXx } },
2062 { "(bad)", { XM, EXx } },
2063 { "(bad)", { XM, EXx } },
2064 },
2065 /* PREGRP12 */
2066 {
2067 { "rsqrtps",{ XM, EXx } },
2068 { "rsqrtss",{ XM, EXx } },
2069 { "(bad)", { XM, EXx } },
2070 { "(bad)", { XM, EXx } },
2071 },
2072 /* PREGRP13 */
2073 {
2074 { "sqrtps", { XM, EXx } },
2075 { "sqrtss", { XM, EXx } },
2076 { "sqrtpd", { XM, EXx } },
2077 { "sqrtsd", { XM, EXx } },
2078 },
2079 /* PREGRP14 */
2080 {
2081 { "subps", { XM, EXx } },
2082 { "subss", { XM, EXx } },
2083 { "subpd", { XM, EXx } },
2084 { "subsd", { XM, EXx } },
2085 },
2086 /* PREGRP15 */
2087 {
2088 { "(bad)", { XM, EXx } },
2089 { "cvtdq2pd", { XM, EXq } },
2090 { "cvttpd2dq", { XM, EXx } },
2091 { "cvtpd2dq", { XM, EXx } },
2092 },
2093 /* PREGRP16 */
2094 {
2095 { "cvtdq2ps", { XM, EXx } },
2096 { "cvttps2dq", { XM, EXx } },
2097 { "cvtps2dq", { XM, EXx } },
2098 { "(bad)", { XM, EXx } },
2099 },
2100 /* PREGRP17 */
2101 {
2102 { "cvtps2pd", { XM, EXq } },
2103 { "cvtss2sd", { XM, EXx } },
2104 { "cvtpd2ps", { XM, EXx } },
2105 { "cvtsd2ss", { XM, EXx } },
2106 },
2107 /* PREGRP18 */
2108 {
2109 { "maskmovq", { MX, MS } },
2110 { "(bad)", { XM, EXx } },
2111 { "maskmovdqu", { XM, XS } },
2112 { "(bad)", { XM, EXx } },
2113 },
2114 /* PREGRP19 */
2115 {
2116 { "movq", { MX, EM } },
2117 { "movdqu", { XM, EXx } },
2118 { "movdqa", { XM, EXx } },
2119 { "(bad)", { XM, EXx } },
2120 },
2121 /* PREGRP20 */
2122 {
2123 { "movq", { EM, MX } },
2124 { "movdqu", { EXx, XM } },
2125 { "movdqa", { EXx, XM } },
2126 { "(bad)", { EXx, XM } },
2127 },
2128 /* PREGRP21 */
2129 {
2130 { "(bad)", { EXx, XM } },
2131 { "movq2dq",{ XM, MS } },
2132 { "movq", { EXx, XM } },
2133 { "movdq2q",{ MX, XS } },
2134 },
2135 /* PREGRP22 */
2136 {
2137 { "pshufw", { MX, EM, Ib } },
2138 { "pshufhw",{ XM, EXx, Ib } },
2139 { "pshufd", { XM, EXx, Ib } },
2140 { "pshuflw",{ XM, EXx, Ib } },
2141 },
2142 /* PREGRP23 */
2143 {
2144 { "movd", { Edq, MX } },
2145 { "movq", { XM, EXx } },
2146 { "movd", { Edq, XM } },
2147 { "(bad)", { Ed, XM } },
2148 },
2149 /* PREGRP24 */
2150 {
2151 { "(bad)", { MX, EXx } },
2152 { "(bad)", { XM, EXx } },
2153 { "punpckhqdq", { XM, EXx } },
2154 { "(bad)", { XM, EXx } },
2155 },
2156 /* PREGRP25 */
2157 {
2158 { "movntq", { EM, MX } },
2159 { "(bad)", { EM, XM } },
2160 { "movntdq",{ EM, XM } },
2161 { "(bad)", { EM, XM } },
2162 },
2163 /* PREGRP26 */
2164 {
2165 { "(bad)", { MX, EXx } },
2166 { "(bad)", { XM, EXx } },
2167 { "punpcklqdq", { XM, EXx } },
2168 { "(bad)", { XM, EXx } },
2169 },
2170 /* PREGRP27 */
2171 {
2172 { "(bad)", { MX, EXx } },
2173 { "(bad)", { XM, EXx } },
2174 { "addsubpd", { XM, EXx } },
2175 { "addsubps", { XM, EXx } },
2176 },
2177 /* PREGRP28 */
2178 {
2179 { "(bad)", { MX, EXx } },
2180 { "(bad)", { XM, EXx } },
2181 { "haddpd", { XM, EXx } },
2182 { "haddps", { XM, EXx } },
2183 },
2184 /* PREGRP29 */
2185 {
2186 { "(bad)", { MX, EXx } },
2187 { "(bad)", { XM, EXx } },
2188 { "hsubpd", { XM, EXx } },
2189 { "hsubps", { XM, EXx } },
2190 },
2191 /* PREGRP30 */
2192 {
2193 { "movlpX", { XM, EXq, { SIMD_Fixup, 'h' } } }, /* really only 2 operands */
2194 { "movsldup", { XM, EXx } },
2195 { "movlpd", { XM, EXq } },
2196 { "movddup", { XM, EXq } },
2197 },
2198 /* PREGRP31 */
2199 {
2200 { "movhpX", { XM, EXq, { SIMD_Fixup, 'l' } } },
2201 { "movshdup", { XM, EXx } },
2202 { "movhpd", { XM, EXq } },
2203 { "(bad)", { XM, EXq } },
2204 },
2205 /* PREGRP32 */
2206 {
2207 { "(bad)", { XM, EXx } },
2208 { "(bad)", { XM, EXx } },
2209 { "(bad)", { XM, EXx } },
2210 { "lddqu", { XM, M } },
2211 },
2212 /* PREGRP33 */
2213 {
2214 {"movntps", { Ev, XM } },
2215 {"movntss", { Ev, XM } },
2216 {"movntpd", { Ev, XM } },
2217 {"movntsd", { Ev, XM } },
2218 },
2219
2220 /* PREGRP34 */
2221 {
2222 {"vmread", { Em, Gm } },
2223 {"(bad)", { XX } },
2224 {"extrq", { XS, Ib, Ib } },
2225 {"insertq", { XM, XS, Ib, Ib } },
2226 },
2227
2228 /* PREGRP35 */
2229 {
2230 {"vmwrite", { Gm, Em } },
2231 {"(bad)", { XX } },
2232 {"extrq", { XM, XS } },
2233 {"insertq", { XM, XS } },
2234 },
2235
2236 /* PREGRP36 */
2237 {
2238 { "bsrS", { Gv, Ev } },
2239 { "lzcntS", { Gv, Ev } },
2240 { "bsrS", { Gv, Ev } },
2241 { "(bad)", { XX } },
2242 },
2243
2244 /* PREGRP37 */
2245 {
2246 { "(bad)", { XX } },
2247 { "popcntS", { Gv, Ev } },
2248 { "(bad)", { XX } },
2249 { "(bad)", { XX } },
2250 },
2251
2252 /* PREGRP38 */
2253 {
2254 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
2255 { "pause", { XX } },
2256 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
2257 { "(bad)", { XX } },
2258 },
2259
2260 /* PREGRP39 */
2261 {
2262 { "(bad)", { XX } },
2263 { "(bad)", { XX } },
2264 { "pblendvb", {XM, EXx, XMM0 } },
2265 { "(bad)", { XX } },
2266 },
2267
2268 /* PREGRP40 */
2269 {
2270 { "(bad)", { XX } },
2271 { "(bad)", { XX } },
2272 { "blendvps", {XM, EXx, XMM0 } },
2273 { "(bad)", { XX } },
2274 },
2275
2276 /* PREGRP41 */
2277 {
2278 { "(bad)", { XX } },
2279 { "(bad)", { XX } },
2280 { "blendvpd", { XM, EXx, XMM0 } },
2281 { "(bad)", { XX } },
2282 },
2283
2284 /* PREGRP42 */
2285 {
2286 { "(bad)", { XX } },
2287 { "(bad)", { XX } },
2288 { "ptest", { XM, EXx } },
2289 { "(bad)", { XX } },
2290 },
2291
2292 /* PREGRP43 */
2293 {
2294 { "(bad)", { XX } },
2295 { "(bad)", { XX } },
2296 { "pmovsxbw", { XM, EXx } },
2297 { "(bad)", { XX } },
2298 },
2299
2300 /* PREGRP44 */
2301 {
2302 { "(bad)", { XX } },
2303 { "(bad)", { XX } },
2304 { "pmovsxbd", { XM, EXx } },
2305 { "(bad)", { XX } },
2306 },
2307
2308 /* PREGRP45 */
2309 {
2310 { "(bad)", { XX } },
2311 { "(bad)", { XX } },
2312 { "pmovsxbq", { XM, EXx } },
2313 { "(bad)", { XX } },
2314 },
2315
2316 /* PREGRP46 */
2317 {
2318 { "(bad)", { XX } },
2319 { "(bad)", { XX } },
2320 { "pmovsxwd", { XM, EXx } },
2321 { "(bad)", { XX } },
2322 },
2323
2324 /* PREGRP47 */
2325 {
2326 { "(bad)", { XX } },
2327 { "(bad)", { XX } },
2328 { "pmovsxwq", { XM, EXx } },
2329 { "(bad)", { XX } },
2330 },
2331
2332 /* PREGRP48 */
2333 {
2334 { "(bad)", { XX } },
2335 { "(bad)", { XX } },
2336 { "pmovsxdq", { XM, EXx } },
2337 { "(bad)", { XX } },
2338 },
2339
2340 /* PREGRP49 */
2341 {
2342 { "(bad)", { XX } },
2343 { "(bad)", { XX } },
2344 { "pmuldq", { XM, EXx } },
2345 { "(bad)", { XX } },
2346 },
2347
2348 /* PREGRP50 */
2349 {
2350 { "(bad)", { XX } },
2351 { "(bad)", { XX } },
2352 { "pcmpeqq", { XM, EXx } },
2353 { "(bad)", { XX } },
2354 },
2355
2356 /* PREGRP51 */
2357 {
2358 { "(bad)", { XX } },
2359 { "(bad)", { XX } },
2360 { "movntdqa", { XM, EM } },
2361 { "(bad)", { XX } },
2362 },
2363
2364 /* PREGRP52 */
2365 {
2366 { "(bad)", { XX } },
2367 { "(bad)", { XX } },
2368 { "packusdw", { XM, EXx } },
2369 { "(bad)", { XX } },
2370 },
2371
2372 /* PREGRP53 */
2373 {
2374 { "(bad)", { XX } },
2375 { "(bad)", { XX } },
2376 { "pmovzxbw", { XM, EXx } },
2377 { "(bad)", { XX } },
2378 },
2379
2380 /* PREGRP54 */
2381 {
2382 { "(bad)", { XX } },
2383 { "(bad)", { XX } },
2384 { "pmovzxbd", { XM, EXx } },
2385 { "(bad)", { XX } },
2386 },
2387
2388 /* PREGRP55 */
2389 {
2390 { "(bad)", { XX } },
2391 { "(bad)", { XX } },
2392 { "pmovzxbq", { XM, EXx } },
2393 { "(bad)", { XX } },
2394 },
2395
2396 /* PREGRP56 */
2397 {
2398 { "(bad)", { XX } },
2399 { "(bad)", { XX } },
2400 { "pmovzxwd", { XM, EXx } },
2401 { "(bad)", { XX } },
2402 },
2403
2404 /* PREGRP57 */
2405 {
2406 { "(bad)", { XX } },
2407 { "(bad)", { XX } },
2408 { "pmovzxwq", { XM, EXx } },
2409 { "(bad)", { XX } },
2410 },
2411
2412 /* PREGRP58 */
2413 {
2414 { "(bad)", { XX } },
2415 { "(bad)", { XX } },
2416 { "pmovzxdq", { XM, EXx } },
2417 { "(bad)", { XX } },
2418 },
2419
2420 /* PREGRP59 */
2421 {
2422 { "(bad)", { XX } },
2423 { "(bad)", { XX } },
2424 { "pminsb", { XM, EXx } },
2425 { "(bad)", { XX } },
2426 },
2427
2428 /* PREGRP60 */
2429 {
2430 { "(bad)", { XX } },
2431 { "(bad)", { XX } },
2432 { "pminsd", { XM, EXx } },
2433 { "(bad)", { XX } },
2434 },
2435
2436 /* PREGRP61 */
2437 {
2438 { "(bad)", { XX } },
2439 { "(bad)", { XX } },
2440 { "pminuw", { XM, EXx } },
2441 { "(bad)", { XX } },
2442 },
2443
2444 /* PREGRP62 */
2445 {
2446 { "(bad)", { XX } },
2447 { "(bad)", { XX } },
2448 { "pminud", { XM, EXx } },
2449 { "(bad)", { XX } },
2450 },
2451
2452 /* PREGRP63 */
2453 {
2454 { "(bad)", { XX } },
2455 { "(bad)", { XX } },
2456 { "pmaxsb", { XM, EXx } },
2457 { "(bad)", { XX } },
2458 },
2459
2460 /* PREGRP64 */
2461 {
2462 { "(bad)", { XX } },
2463 { "(bad)", { XX } },
2464 { "pmaxsd", { XM, EXx } },
2465 { "(bad)", { XX } },
2466 },
2467
2468 /* PREGRP65 */
2469 {
2470 { "(bad)", { XX } },
2471 { "(bad)", { XX } },
2472 { "pmaxuw", { XM, EXx } },
2473 { "(bad)", { XX } },
2474 },
2475
2476 /* PREGRP66 */
2477 {
2478 { "(bad)", { XX } },
2479 { "(bad)", { XX } },
2480 { "pmaxud", { XM, EXx } },
2481 { "(bad)", { XX } },
2482 },
2483
2484 /* PREGRP67 */
2485 {
2486 { "(bad)", { XX } },
2487 { "(bad)", { XX } },
2488 { "pmulld", { XM, EXx } },
2489 { "(bad)", { XX } },
2490 },
2491
2492 /* PREGRP68 */
2493 {
2494 { "(bad)", { XX } },
2495 { "(bad)", { XX } },
2496 { "phminposuw", { XM, EXx } },
2497 { "(bad)", { XX } },
2498 },
2499
2500 /* PREGRP69 */
2501 {
2502 { "(bad)", { XX } },
2503 { "(bad)", { XX } },
2504 { "roundps", { XM, EXx, Ib } },
2505 { "(bad)", { XX } },
2506 },
2507
2508 /* PREGRP70 */
2509 {
2510 { "(bad)", { XX } },
2511 { "(bad)", { XX } },
2512 { "roundpd", { XM, EXx, Ib } },
2513 { "(bad)", { XX } },
2514 },
2515
2516 /* PREGRP71 */
2517 {
2518 { "(bad)", { XX } },
2519 { "(bad)", { XX } },
2520 { "roundss", { XM, EXx, Ib } },
2521 { "(bad)", { XX } },
2522 },
2523
2524 /* PREGRP72 */
2525 {
2526 { "(bad)", { XX } },
2527 { "(bad)", { XX } },
2528 { "roundsd", { XM, EXx, Ib } },
2529 { "(bad)", { XX } },
2530 },
2531
2532 /* PREGRP73 */
2533 {
2534 { "(bad)", { XX } },
2535 { "(bad)", { XX } },
2536 { "blendps", { XM, EXx, Ib } },
2537 { "(bad)", { XX } },
2538 },
2539
2540 /* PREGRP74 */
2541 {
2542 { "(bad)", { XX } },
2543 { "(bad)", { XX } },
2544 { "blendpd", { XM, EXx, Ib } },
2545 { "(bad)", { XX } },
2546 },
2547
2548 /* PREGRP75 */
2549 {
2550 { "(bad)", { XX } },
2551 { "(bad)", { XX } },
2552 { "pblendw", { XM, EXx, Ib } },
2553 { "(bad)", { XX } },
2554 },
2555
2556 /* PREGRP76 */
2557 {
2558 { "(bad)", { XX } },
2559 { "(bad)", { XX } },
2560 { "pextrb", { Edqb, XM, Ib } },
2561 { "(bad)", { XX } },
2562 },
2563
2564 /* PREGRP77 */
2565 {
2566 { "(bad)", { XX } },
2567 { "(bad)", { XX } },
2568 { "pextrw", { Edqw, XM, Ib } },
2569 { "(bad)", { XX } },
2570 },
2571
2572 /* PREGRP78 */
2573 {
2574 { "(bad)", { XX } },
2575 { "(bad)", { XX } },
2576 { "pextrK", { Edq, XM, Ib } },
2577 { "(bad)", { XX } },
2578 },
2579
2580 /* PREGRP79 */
2581 {
2582 { "(bad)", { XX } },
2583 { "(bad)", { XX } },
2584 { "extractps", { Edqd, XM, Ib } },
2585 { "(bad)", { XX } },
2586 },
2587
2588 /* PREGRP80 */
2589 {
2590 { "(bad)", { XX } },
2591 { "(bad)", { XX } },
2592 { "pinsrb", { XM, Edqb, Ib } },
2593 { "(bad)", { XX } },
2594 },
2595
2596 /* PREGRP81 */
2597 {
2598 { "(bad)", { XX } },
2599 { "(bad)", { XX } },
2600 { "insertps", { XM, EXx, Ib } },
2601 { "(bad)", { XX } },
2602 },
2603
2604 /* PREGRP82 */
2605 {
2606 { "(bad)", { XX } },
2607 { "(bad)", { XX } },
2608 { "pinsrK", { XM, Edq, Ib } },
2609 { "(bad)", { XX } },
2610 },
2611
2612 /* PREGRP83 */
2613 {
2614 { "(bad)", { XX } },
2615 { "(bad)", { XX } },
2616 { "dpps", { XM, EXx, Ib } },
2617 { "(bad)", { XX } },
2618 },
2619
2620 /* PREGRP84 */
2621 {
2622 { "(bad)", { XX } },
2623 { "(bad)", { XX } },
2624 { "dppd", { XM, EXx, Ib } },
2625 { "(bad)", { XX } },
2626 },
2627
2628 /* PREGRP85 */
2629 {
2630 { "(bad)", { XX } },
2631 { "(bad)", { XX } },
2632 { "mpsadbw", { XM, EXx, Ib } },
2633 { "(bad)", { XX } },
2634 },
2635
2636 /* PREGRP86 */
2637 {
2638 { "(bad)", { XX } },
2639 { "(bad)", { XX } },
2640 { "pcmpgtq", { XM, EXx } },
2641 { "(bad)", { XX } },
2642 },
2643
2644 /* PREGRP87 */
2645 {
2646 { "movbe", { Gv, Ev } },
2647 { "(bad)", { XX } },
2648 { "movbe", { Gv, Ev } },
2649 { "crc32", { Gdq, { CRC32_Fixup, b_mode } } },
2650 },
2651
2652 /* PREGRP88 */
2653 {
2654 { "movbe", { Ev, Gv } },
2655 { "(bad)", { XX } },
2656 { "movbe", { Ev, Gv } },
2657 { "crc32", { Gdq, { CRC32_Fixup, v_mode } } },
2658 },
2659
2660 /* PREGRP89 */
2661 {
2662 { "(bad)", { XX } },
2663 { "(bad)", { XX } },
2664 { "pcmpestrm", { XM, EXx, Ib } },
2665 { "(bad)", { XX } },
2666 },
2667
2668 /* PREGRP90 */
2669 {
2670 { "(bad)", { XX } },
2671 { "(bad)", { XX } },
2672 { "pcmpestri", { XM, EXx, Ib } },
2673 { "(bad)", { XX } },
2674 },
2675
2676 /* PREGRP91 */
2677 {
2678 { "(bad)", { XX } },
2679 { "(bad)", { XX } },
2680 { "pcmpistrm", { XM, EXx, Ib } },
2681 { "(bad)", { XX } },
2682 },
2683
2684 /* PREGRP92 */
2685 {
2686 { "(bad)", { XX } },
2687 { "(bad)", { XX } },
2688 { "pcmpistri", { XM, EXx, Ib } },
2689 { "(bad)", { XX } },
2690 },
2691
2692 /* PREGRP93 */
2693 {
2694 { "ucomiss",{ XM, EXd } },
2695 { "(bad)", { XX } },
2696 { "ucomisd",{ XM, EXq } },
2697 { "(bad)", { XX } },
2698 },
2699
2700 /* PREGRP94 */
2701 {
2702 { "comiss", { XM, EXd } },
2703 { "(bad)", { XX } },
2704 { "comisd", { XM, EXq } },
2705 { "(bad)", { XX } },
2706 },
2707
2708 /* PREGRP95 */
2709 {
2710 { "punpcklbw",{ MX, EMd } },
2711 { "(bad)", { XX } },
2712 { "punpcklbw",{ MX, EMq } },
2713 { "(bad)", { XX } },
2714 },
2715
2716 /* PREGRP96 */
2717 {
2718 { "punpcklwd",{ MX, EMd } },
2719 { "(bad)", { XX } },
2720 { "punpcklwd",{ MX, EMq } },
2721 { "(bad)", { XX } },
2722 },
2723
2724 /* PREGRP97 */
2725 {
2726 { "punpckldq",{ MX, EMd } },
2727 { "(bad)", { XX } },
2728 { "punpckldq",{ MX, EMq } },
2729 { "(bad)", { XX } },
2730 },
2731
2732 /* PREGRP98 */
2733 {
2734 { "(bad)", { XX } },
2735 { "(bad)", { XX } },
2736 { "pclmulqdq", { XM, EXx, Ib } },
2737 { "(bad)", { XX } },
2738 },
2739
2740 /* PREGRP99 */
2741 {
2742 { "(bad)", { XX } },
2743 { "(bad)", { XX } },
2744 { "aesimc", { XM, EXx } },
2745 { "(bad)", { XX } },
2746 },
2747
2748 /* PREGRP100 */
2749 {
2750 { "(bad)", { XX } },
2751 { "(bad)", { XX } },
2752 { "aesenc", { XM, EXx } },
2753 { "(bad)", { XX } },
2754 },
2755
2756 /* PREGRP101 */
2757 {
2758 { "(bad)", { XX } },
2759 { "(bad)", { XX } },
2760 { "aesenclast", { XM, EXx } },
2761 { "(bad)", { XX } },
2762 },
2763
2764 /* PREGRP102 */
2765 {
2766 { "(bad)", { XX } },
2767 { "(bad)", { XX } },
2768 { "aesdec", { XM, EXx } },
2769 { "(bad)", { XX } },
2770 },
2771
2772 /* PREGRP103 */
2773 {
2774 { "(bad)", { XX } },
2775 { "(bad)", { XX } },
2776 { "aesdeclast", { XM, EXx } },
2777 { "(bad)", { XX } },
2778 },
2779
2780 /* PREGRP104 */
2781 {
2782 { "(bad)", { XX } },
2783 { "(bad)", { XX } },
2784 { "aeskeygenassist", { XM, EXx, Ib } },
2785 { "(bad)", { XX } },
2786 },
2787
2788 /* PREGRP105 */
2789 {
2790 { "andnS", { Gv, Bv, Ev } },
2791 { "(bad)", { XX } },
2792 { "(bad)", { XX } },
2793 { "(bad)", { XX } },
2794 },
2795
2796 /* PREGRP106 */
2797 {
2798 { "bextrS", { Gv, Ev, Bv } },
2799 { "sarxS", { Gv, Ev, Bv } },
2800 { "shlxS", { Gv, Ev, Bv } },
2801 { "shrxS", { Gv, Ev, Bv } },
2802 },
2803
2804 /* PREGRP107 */
2805 {
2806 { "bsfS", { Gv, Ev } },
2807 { "tzcntS", { Gv, Ev } },
2808 { "bsfS", { Gv, Ev } },
2809 { "(bad)", { XX } },
2810 },
2811 };
2812
2813 static const struct dis386 x86_64_table[][2] = {
2814 {
2815 { "pusha{P|}", { XX } },
2816 { "(bad)", { XX } },
2817 },
2818 {
2819 { "popa{P|}", { XX } },
2820 { "(bad)", { XX } },
2821 },
2822 {
2823 { "bound{S|}", { Gv, Ma } },
2824 { "(bad)", { XX } },
2825 },
2826 {
2827 { "arpl", { Ew, Gw } },
2828 { "movs{||lq|xd}", { Gv, Ed } },
2829 },
2830 };
2831
2832 static const struct dis386 three_byte_table[][256] = {
2833 /* THREE_BYTE_0 */
2834 {
2835 /* 00 */
2836 { "pshufb", { MX, EM } },
2837 { "phaddw", { MX, EM } },
2838 { "phaddd", { MX, EM } },
2839 { "phaddsw", { MX, EM } },
2840 { "pmaddubsw", { MX, EM } },
2841 { "phsubw", { MX, EM } },
2842 { "phsubd", { MX, EM } },
2843 { "phsubsw", { MX, EM } },
2844 /* 08 */
2845 { "psignb", { MX, EM } },
2846 { "psignw", { MX, EM } },
2847 { "psignd", { MX, EM } },
2848 { "pmulhrsw", { MX, EM } },
2849 { "(bad)", { XX } },
2850 { "(bad)", { XX } },
2851 { "(bad)", { XX } },
2852 { "(bad)", { XX } },
2853 /* 10 */
2854 { PREGRP39 },
2855 { "(bad)", { XX } },
2856 { "(bad)", { XX } },
2857 { "(bad)", { XX } },
2858 { PREGRP40 },
2859 { PREGRP41 },
2860 { "(bad)", { XX } },
2861 { PREGRP42 },
2862 /* 18 */
2863 { "(bad)", { XX } },