linux-user: arm: Remove ARM_cpsr and similar #defines
[qemu.git] / dma-helpers.c
1 /*
2 * DMA helper functions
3 *
4 * Copyright (c) 2009 Red Hat
5 *
6 * This work is licensed under the terms of the GNU General Public License
7 * (GNU GPL), version 2 or later.
8 */
9
10 #include "qemu/osdep.h"
11 #include "sysemu/block-backend.h"
12 #include "sysemu/dma.h"
13 #include "trace.h"
14 #include "qemu/thread.h"
15 #include "qemu/main-loop.h"
16
17 /* #define DEBUG_IOMMU */
18
19 int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len)
20 {
21 dma_barrier(as, DMA_DIRECTION_FROM_DEVICE);
22
23 #define FILLBUF_SIZE 512
24 uint8_t fillbuf[FILLBUF_SIZE];
25 int l;
26 bool error = false;
27
28 memset(fillbuf, c, FILLBUF_SIZE);
29 while (len > 0) {
30 l = len < FILLBUF_SIZE ? len : FILLBUF_SIZE;
31 error |= address_space_rw(as, addr, MEMTXATTRS_UNSPECIFIED,
32 fillbuf, l, true);
33 len -= l;
34 addr += l;
35 }
36
37 return error;
38 }
39
40 void qemu_sglist_init(QEMUSGList *qsg, DeviceState *dev, int alloc_hint,
41 AddressSpace *as)
42 {
43 qsg->sg = g_malloc(alloc_hint * sizeof(ScatterGatherEntry));
44 qsg->nsg = 0;
45 qsg->nalloc = alloc_hint;
46 qsg->size = 0;
47 qsg->as = as;
48 qsg->dev = dev;
49 object_ref(OBJECT(dev));
50 }
51
52 void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len)
53 {
54 if (qsg->nsg == qsg->nalloc) {
55 qsg->nalloc = 2 * qsg->nalloc + 1;
56 qsg->sg = g_realloc(qsg->sg, qsg->nalloc * sizeof(ScatterGatherEntry));
57 }
58 qsg->sg[qsg->nsg].base = base;
59 qsg->sg[qsg->nsg].len = len;
60 qsg->size += len;
61 ++qsg->nsg;
62 }
63
64 void qemu_sglist_destroy(QEMUSGList *qsg)
65 {
66 object_unref(OBJECT(qsg->dev));
67 g_free(qsg->sg);
68 memset(qsg, 0, sizeof(*qsg));
69 }
70
71 typedef struct {
72 BlockAIOCB common;
73 BlockBackend *blk;
74 BlockAIOCB *acb;
75 QEMUSGList *sg;
76 uint64_t offset;
77 DMADirection dir;
78 int sg_cur_index;
79 dma_addr_t sg_cur_byte;
80 QEMUIOVector iov;
81 QEMUBH *bh;
82 DMAIOFunc *io_func;
83 } DMAAIOCB;
84
85 static void dma_blk_cb(void *opaque, int ret);
86
87 static void reschedule_dma(void *opaque)
88 {
89 DMAAIOCB *dbs = (DMAAIOCB *)opaque;
90
91 qemu_bh_delete(dbs->bh);
92 dbs->bh = NULL;
93 dma_blk_cb(dbs, 0);
94 }
95
96 static void dma_blk_unmap(DMAAIOCB *dbs)
97 {
98 int i;
99
100 for (i = 0; i < dbs->iov.niov; ++i) {
101 dma_memory_unmap(dbs->sg->as, dbs->iov.iov[i].iov_base,
102 dbs->iov.iov[i].iov_len, dbs->dir,
103 dbs->iov.iov[i].iov_len);
104 }
105 qemu_iovec_reset(&dbs->iov);
106 }
107
108 static void dma_complete(DMAAIOCB *dbs, int ret)
109 {
110 trace_dma_complete(dbs, ret, dbs->common.cb);
111
112 dma_blk_unmap(dbs);
113 if (dbs->common.cb) {
114 dbs->common.cb(dbs->common.opaque, ret);
115 }
116 qemu_iovec_destroy(&dbs->iov);
117 if (dbs->bh) {
118 qemu_bh_delete(dbs->bh);
119 dbs->bh = NULL;
120 }
121 qemu_aio_unref(dbs);
122 }
123
124 static void dma_blk_cb(void *opaque, int ret)
125 {
126 DMAAIOCB *dbs = (DMAAIOCB *)opaque;
127 dma_addr_t cur_addr, cur_len;
128 void *mem;
129
130 trace_dma_blk_cb(dbs, ret);
131
132 dbs->acb = NULL;
133 dbs->offset += dbs->iov.size;
134
135 if (dbs->sg_cur_index == dbs->sg->nsg || ret < 0) {
136 dma_complete(dbs, ret);
137 return;
138 }
139 dma_blk_unmap(dbs);
140
141 while (dbs->sg_cur_index < dbs->sg->nsg) {
142 cur_addr = dbs->sg->sg[dbs->sg_cur_index].base + dbs->sg_cur_byte;
143 cur_len = dbs->sg->sg[dbs->sg_cur_index].len - dbs->sg_cur_byte;
144 mem = dma_memory_map(dbs->sg->as, cur_addr, &cur_len, dbs->dir);
145 if (!mem)
146 break;
147 qemu_iovec_add(&dbs->iov, mem, cur_len);
148 dbs->sg_cur_byte += cur_len;
149 if (dbs->sg_cur_byte == dbs->sg->sg[dbs->sg_cur_index].len) {
150 dbs->sg_cur_byte = 0;
151 ++dbs->sg_cur_index;
152 }
153 }
154
155 if (dbs->iov.size == 0) {
156 trace_dma_map_wait(dbs);
157 dbs->bh = aio_bh_new(blk_get_aio_context(dbs->blk),
158 reschedule_dma, dbs);
159 cpu_register_map_client(dbs->bh);
160 return;
161 }
162
163 if (dbs->iov.size & ~BDRV_SECTOR_MASK) {
164 qemu_iovec_discard_back(&dbs->iov, dbs->iov.size & ~BDRV_SECTOR_MASK);
165 }
166
167 dbs->acb = dbs->io_func(dbs->blk, dbs->offset, &dbs->iov, 0,
168 dma_blk_cb, dbs);
169 assert(dbs->acb);
170 }
171
172 static void dma_aio_cancel(BlockAIOCB *acb)
173 {
174 DMAAIOCB *dbs = container_of(acb, DMAAIOCB, common);
175
176 trace_dma_aio_cancel(dbs);
177
178 if (dbs->acb) {
179 blk_aio_cancel_async(dbs->acb);
180 }
181 if (dbs->bh) {
182 cpu_unregister_map_client(dbs->bh);
183 qemu_bh_delete(dbs->bh);
184 dbs->bh = NULL;
185 }
186 }
187
188
189 static const AIOCBInfo dma_aiocb_info = {
190 .aiocb_size = sizeof(DMAAIOCB),
191 .cancel_async = dma_aio_cancel,
192 };
193
194 BlockAIOCB *dma_blk_io(
195 BlockBackend *blk, QEMUSGList *sg, uint64_t sector_num,
196 DMAIOFunc *io_func, BlockCompletionFunc *cb,
197 void *opaque, DMADirection dir)
198 {
199 DMAAIOCB *dbs = blk_aio_get(&dma_aiocb_info, blk, cb, opaque);
200
201 trace_dma_blk_io(dbs, blk, sector_num, (dir == DMA_DIRECTION_TO_DEVICE));
202
203 dbs->acb = NULL;
204 dbs->blk = blk;
205 dbs->sg = sg;
206 dbs->offset = sector_num << BDRV_SECTOR_BITS;
207 dbs->sg_cur_index = 0;
208 dbs->sg_cur_byte = 0;
209 dbs->dir = dir;
210 dbs->io_func = io_func;
211 dbs->bh = NULL;
212 qemu_iovec_init(&dbs->iov, sg->nsg);
213 dma_blk_cb(dbs, 0);
214 return &dbs->common;
215 }
216
217
218 BlockAIOCB *dma_blk_read(BlockBackend *blk,
219 QEMUSGList *sg, uint64_t sector,
220 void (*cb)(void *opaque, int ret), void *opaque)
221 {
222 return dma_blk_io(blk, sg, sector, blk_aio_preadv, cb, opaque,
223 DMA_DIRECTION_FROM_DEVICE);
224 }
225
226 BlockAIOCB *dma_blk_write(BlockBackend *blk,
227 QEMUSGList *sg, uint64_t sector,
228 void (*cb)(void *opaque, int ret), void *opaque)
229 {
230 return dma_blk_io(blk, sg, sector, blk_aio_pwritev, cb, opaque,
231 DMA_DIRECTION_TO_DEVICE);
232 }
233
234
235 static uint64_t dma_buf_rw(uint8_t *ptr, int32_t len, QEMUSGList *sg,
236 DMADirection dir)
237 {
238 uint64_t resid;
239 int sg_cur_index;
240
241 resid = sg->size;
242 sg_cur_index = 0;
243 len = MIN(len, resid);
244 while (len > 0) {
245 ScatterGatherEntry entry = sg->sg[sg_cur_index++];
246 int32_t xfer = MIN(len, entry.len);
247 dma_memory_rw(sg->as, entry.base, ptr, xfer, dir);
248 ptr += xfer;
249 len -= xfer;
250 resid -= xfer;
251 }
252
253 return resid;
254 }
255
256 uint64_t dma_buf_read(uint8_t *ptr, int32_t len, QEMUSGList *sg)
257 {
258 return dma_buf_rw(ptr, len, sg, DMA_DIRECTION_FROM_DEVICE);
259 }
260
261 uint64_t dma_buf_write(uint8_t *ptr, int32_t len, QEMUSGList *sg)
262 {
263 return dma_buf_rw(ptr, len, sg, DMA_DIRECTION_TO_DEVICE);
264 }
265
266 void dma_acct_start(BlockBackend *blk, BlockAcctCookie *cookie,
267 QEMUSGList *sg, enum BlockAcctType type)
268 {
269 block_acct_start(blk_get_stats(blk), cookie, sg->size, type);
270 }