linux-user: add open() hijack infrastructure
[qemu.git] / dma-helpers.c
1 /*
2 * DMA helper functions
3 *
4 * Copyright (c) 2009 Red Hat
5 *
6 * This work is licensed under the terms of the GNU General Public License
7 * (GNU GPL), version 2 or later.
8 */
9
10 #include "dma.h"
11 #include "block_int.h"
12 #include "trace.h"
13
14 void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint)
15 {
16 qsg->sg = g_malloc(alloc_hint * sizeof(ScatterGatherEntry));
17 qsg->nsg = 0;
18 qsg->nalloc = alloc_hint;
19 qsg->size = 0;
20 }
21
22 void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len)
23 {
24 if (qsg->nsg == qsg->nalloc) {
25 qsg->nalloc = 2 * qsg->nalloc + 1;
26 qsg->sg = g_realloc(qsg->sg, qsg->nalloc * sizeof(ScatterGatherEntry));
27 }
28 qsg->sg[qsg->nsg].base = base;
29 qsg->sg[qsg->nsg].len = len;
30 qsg->size += len;
31 ++qsg->nsg;
32 }
33
34 void qemu_sglist_destroy(QEMUSGList *qsg)
35 {
36 g_free(qsg->sg);
37 }
38
39 typedef struct {
40 BlockDriverAIOCB common;
41 BlockDriverState *bs;
42 BlockDriverAIOCB *acb;
43 QEMUSGList *sg;
44 uint64_t sector_num;
45 bool to_dev;
46 bool in_cancel;
47 int sg_cur_index;
48 dma_addr_t sg_cur_byte;
49 QEMUIOVector iov;
50 QEMUBH *bh;
51 DMAIOFunc *io_func;
52 } DMAAIOCB;
53
54 static void dma_bdrv_cb(void *opaque, int ret);
55
56 static void reschedule_dma(void *opaque)
57 {
58 DMAAIOCB *dbs = (DMAAIOCB *)opaque;
59
60 qemu_bh_delete(dbs->bh);
61 dbs->bh = NULL;
62 dma_bdrv_cb(dbs, 0);
63 }
64
65 static void continue_after_map_failure(void *opaque)
66 {
67 DMAAIOCB *dbs = (DMAAIOCB *)opaque;
68
69 dbs->bh = qemu_bh_new(reschedule_dma, dbs);
70 qemu_bh_schedule(dbs->bh);
71 }
72
73 static void dma_bdrv_unmap(DMAAIOCB *dbs)
74 {
75 int i;
76
77 for (i = 0; i < dbs->iov.niov; ++i) {
78 cpu_physical_memory_unmap(dbs->iov.iov[i].iov_base,
79 dbs->iov.iov[i].iov_len, !dbs->to_dev,
80 dbs->iov.iov[i].iov_len);
81 }
82 qemu_iovec_reset(&dbs->iov);
83 }
84
85 static void dma_complete(DMAAIOCB *dbs, int ret)
86 {
87 trace_dma_complete(dbs, ret, dbs->common.cb);
88
89 dma_bdrv_unmap(dbs);
90 if (dbs->common.cb) {
91 dbs->common.cb(dbs->common.opaque, ret);
92 }
93 qemu_iovec_destroy(&dbs->iov);
94 if (dbs->bh) {
95 qemu_bh_delete(dbs->bh);
96 dbs->bh = NULL;
97 }
98 if (!dbs->in_cancel) {
99 /* Requests may complete while dma_aio_cancel is in progress. In
100 * this case, the AIOCB should not be released because it is still
101 * referenced by dma_aio_cancel. */
102 qemu_aio_release(dbs);
103 }
104 }
105
106 static void dma_bdrv_cb(void *opaque, int ret)
107 {
108 DMAAIOCB *dbs = (DMAAIOCB *)opaque;
109 target_phys_addr_t cur_addr, cur_len;
110 void *mem;
111
112 trace_dma_bdrv_cb(dbs, ret);
113
114 dbs->acb = NULL;
115 dbs->sector_num += dbs->iov.size / 512;
116 dma_bdrv_unmap(dbs);
117
118 if (dbs->sg_cur_index == dbs->sg->nsg || ret < 0) {
119 dma_complete(dbs, ret);
120 return;
121 }
122
123 while (dbs->sg_cur_index < dbs->sg->nsg) {
124 cur_addr = dbs->sg->sg[dbs->sg_cur_index].base + dbs->sg_cur_byte;
125 cur_len = dbs->sg->sg[dbs->sg_cur_index].len - dbs->sg_cur_byte;
126 mem = cpu_physical_memory_map(cur_addr, &cur_len, !dbs->to_dev);
127 if (!mem)
128 break;
129 qemu_iovec_add(&dbs->iov, mem, cur_len);
130 dbs->sg_cur_byte += cur_len;
131 if (dbs->sg_cur_byte == dbs->sg->sg[dbs->sg_cur_index].len) {
132 dbs->sg_cur_byte = 0;
133 ++dbs->sg_cur_index;
134 }
135 }
136
137 if (dbs->iov.size == 0) {
138 trace_dma_map_wait(dbs);
139 cpu_register_map_client(dbs, continue_after_map_failure);
140 return;
141 }
142
143 dbs->acb = dbs->io_func(dbs->bs, dbs->sector_num, &dbs->iov,
144 dbs->iov.size / 512, dma_bdrv_cb, dbs);
145 assert(dbs->acb);
146 }
147
148 static void dma_aio_cancel(BlockDriverAIOCB *acb)
149 {
150 DMAAIOCB *dbs = container_of(acb, DMAAIOCB, common);
151
152 trace_dma_aio_cancel(dbs);
153
154 if (dbs->acb) {
155 BlockDriverAIOCB *acb = dbs->acb;
156 dbs->acb = NULL;
157 dbs->in_cancel = true;
158 bdrv_aio_cancel(acb);
159 dbs->in_cancel = false;
160 }
161 dbs->common.cb = NULL;
162 dma_complete(dbs, 0);
163 }
164
165 static AIOPool dma_aio_pool = {
166 .aiocb_size = sizeof(DMAAIOCB),
167 .cancel = dma_aio_cancel,
168 };
169
170 BlockDriverAIOCB *dma_bdrv_io(
171 BlockDriverState *bs, QEMUSGList *sg, uint64_t sector_num,
172 DMAIOFunc *io_func, BlockDriverCompletionFunc *cb,
173 void *opaque, bool to_dev)
174 {
175 DMAAIOCB *dbs = qemu_aio_get(&dma_aio_pool, bs, cb, opaque);
176
177 trace_dma_bdrv_io(dbs, bs, sector_num, to_dev);
178
179 dbs->acb = NULL;
180 dbs->bs = bs;
181 dbs->sg = sg;
182 dbs->sector_num = sector_num;
183 dbs->sg_cur_index = 0;
184 dbs->sg_cur_byte = 0;
185 dbs->to_dev = to_dev;
186 dbs->io_func = io_func;
187 dbs->bh = NULL;
188 qemu_iovec_init(&dbs->iov, sg->nsg);
189 dma_bdrv_cb(dbs, 0);
190 return &dbs->common;
191 }
192
193
194 BlockDriverAIOCB *dma_bdrv_read(BlockDriverState *bs,
195 QEMUSGList *sg, uint64_t sector,
196 void (*cb)(void *opaque, int ret), void *opaque)
197 {
198 return dma_bdrv_io(bs, sg, sector, bdrv_aio_readv, cb, opaque, false);
199 }
200
201 BlockDriverAIOCB *dma_bdrv_write(BlockDriverState *bs,
202 QEMUSGList *sg, uint64_t sector,
203 void (*cb)(void *opaque, int ret), void *opaque)
204 {
205 return dma_bdrv_io(bs, sg, sector, bdrv_aio_writev, cb, opaque, true);
206 }