block: User BdrvChild callback for device name
[qemu.git] / fpu / softfloat-specialize.h
1 /*
2 * QEMU float support
3 *
4 * The code in this source file is derived from release 2a of the SoftFloat
5 * IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and
6 * some later contributions) are provided under that license, as detailed below.
7 * It has subsequently been modified by contributors to the QEMU Project,
8 * so some portions are provided under:
9 * the SoftFloat-2a license
10 * the BSD license
11 * GPL-v2-or-later
12 *
13 * Any future contributions to this file after December 1st 2014 will be
14 * taken to be licensed under the Softfloat-2a license unless specifically
15 * indicated otherwise.
16 */
17
18 /*
19 ===============================================================================
20 This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
21 Arithmetic Package, Release 2a.
22
23 Written by John R. Hauser. This work was made possible in part by the
24 International Computer Science Institute, located at Suite 600, 1947 Center
25 Street, Berkeley, California 94704. Funding was partially provided by the
26 National Science Foundation under grant MIP-9311980. The original version
27 of this code was written as part of a project to build a fixed-point vector
28 processor in collaboration with the University of California at Berkeley,
29 overseen by Profs. Nelson Morgan and John Wawrzynek. More information
30 is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
31 arithmetic/SoftFloat.html'.
32
33 THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
34 has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
35 TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
36 PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
37 AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
38
39 Derivative works are acceptable, even for commercial purposes, so long as
40 (1) they include prominent notice that the work is derivative, and (2) they
41 include prominent notice akin to these four paragraphs for those parts of
42 this code that are retained.
43
44 ===============================================================================
45 */
46
47 /* BSD licensing:
48 * Copyright (c) 2006, Fabrice Bellard
49 * All rights reserved.
50 *
51 * Redistribution and use in source and binary forms, with or without
52 * modification, are permitted provided that the following conditions are met:
53 *
54 * 1. Redistributions of source code must retain the above copyright notice,
55 * this list of conditions and the following disclaimer.
56 *
57 * 2. Redistributions in binary form must reproduce the above copyright notice,
58 * this list of conditions and the following disclaimer in the documentation
59 * and/or other materials provided with the distribution.
60 *
61 * 3. Neither the name of the copyright holder nor the names of its contributors
62 * may be used to endorse or promote products derived from this software without
63 * specific prior written permission.
64 *
65 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
66 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
67 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
68 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
69 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
70 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
71 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
72 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
73 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
74 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
75 * THE POSSIBILITY OF SUCH DAMAGE.
76 */
77
78 /* Portions of this work are licensed under the terms of the GNU GPL,
79 * version 2 or later. See the COPYING file in the top-level directory.
80 */
81
82 /* Does the target distinguish signaling NaNs from non-signaling NaNs
83 * by setting the most significant bit of the mantissa for a signaling NaN?
84 * (The more common choice is to have it be zero for SNaN and one for QNaN.)
85 */
86 #if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
87 #define SNAN_BIT_IS_ONE 1
88 #else
89 #define SNAN_BIT_IS_ONE 0
90 #endif
91
92 #if defined(TARGET_XTENSA)
93 /* Define for architectures which deviate from IEEE in not supporting
94 * signaling NaNs (so all NaNs are treated as quiet).
95 */
96 #define NO_SIGNALING_NANS 1
97 #endif
98
99 /*----------------------------------------------------------------------------
100 | The pattern for a default generated half-precision NaN.
101 *----------------------------------------------------------------------------*/
102 #if defined(TARGET_ARM)
103 const float16 float16_default_nan = const_float16(0x7E00);
104 #elif SNAN_BIT_IS_ONE
105 const float16 float16_default_nan = const_float16(0x7DFF);
106 #else
107 const float16 float16_default_nan = const_float16(0xFE00);
108 #endif
109
110 /*----------------------------------------------------------------------------
111 | The pattern for a default generated single-precision NaN.
112 *----------------------------------------------------------------------------*/
113 #if defined(TARGET_SPARC)
114 const float32 float32_default_nan = const_float32(0x7FFFFFFF);
115 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
116 defined(TARGET_XTENSA) || defined(TARGET_S390X) || defined(TARGET_TRICORE)
117 const float32 float32_default_nan = const_float32(0x7FC00000);
118 #elif SNAN_BIT_IS_ONE
119 const float32 float32_default_nan = const_float32(0x7FBFFFFF);
120 #else
121 const float32 float32_default_nan = const_float32(0xFFC00000);
122 #endif
123
124 /*----------------------------------------------------------------------------
125 | The pattern for a default generated double-precision NaN.
126 *----------------------------------------------------------------------------*/
127 #if defined(TARGET_SPARC)
128 const float64 float64_default_nan = const_float64(LIT64( 0x7FFFFFFFFFFFFFFF ));
129 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
130 defined(TARGET_S390X)
131 const float64 float64_default_nan = const_float64(LIT64( 0x7FF8000000000000 ));
132 #elif SNAN_BIT_IS_ONE
133 const float64 float64_default_nan = const_float64(LIT64(0x7FF7FFFFFFFFFFFF));
134 #else
135 const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 ));
136 #endif
137
138 /*----------------------------------------------------------------------------
139 | The pattern for a default generated extended double-precision NaN.
140 *----------------------------------------------------------------------------*/
141 #if SNAN_BIT_IS_ONE
142 #define floatx80_default_nan_high 0x7FFF
143 #define floatx80_default_nan_low LIT64(0xBFFFFFFFFFFFFFFF)
144 #else
145 #define floatx80_default_nan_high 0xFFFF
146 #define floatx80_default_nan_low LIT64( 0xC000000000000000 )
147 #endif
148
149 const floatx80 floatx80_default_nan
150 = make_floatx80_init(floatx80_default_nan_high, floatx80_default_nan_low);
151
152 /*----------------------------------------------------------------------------
153 | The pattern for a default generated quadruple-precision NaN. The `high' and
154 | `low' values hold the most- and least-significant bits, respectively.
155 *----------------------------------------------------------------------------*/
156 #if SNAN_BIT_IS_ONE
157 #define float128_default_nan_high LIT64(0x7FFF7FFFFFFFFFFF)
158 #define float128_default_nan_low LIT64(0xFFFFFFFFFFFFFFFF)
159 #elif defined(TARGET_S390X)
160 #define float128_default_nan_high LIT64( 0x7FFF800000000000 )
161 #define float128_default_nan_low LIT64( 0x0000000000000000 )
162 #else
163 #define float128_default_nan_high LIT64( 0xFFFF800000000000 )
164 #define float128_default_nan_low LIT64( 0x0000000000000000 )
165 #endif
166
167 const float128 float128_default_nan
168 = make_float128_init(float128_default_nan_high, float128_default_nan_low);
169
170 /*----------------------------------------------------------------------------
171 | Raises the exceptions specified by `flags'. Floating-point traps can be
172 | defined here if desired. It is currently not possible for such a trap
173 | to substitute a result value. If traps are not implemented, this routine
174 | should be simply `float_exception_flags |= flags;'.
175 *----------------------------------------------------------------------------*/
176
177 void float_raise(int8_t flags, float_status *status)
178 {
179 status->float_exception_flags |= flags;
180 }
181
182 /*----------------------------------------------------------------------------
183 | Internal canonical NaN format.
184 *----------------------------------------------------------------------------*/
185 typedef struct {
186 flag sign;
187 uint64_t high, low;
188 } commonNaNT;
189
190 #ifdef NO_SIGNALING_NANS
191 int float16_is_quiet_nan(float16 a_)
192 {
193 return float16_is_any_nan(a_);
194 }
195
196 int float16_is_signaling_nan(float16 a_)
197 {
198 return 0;
199 }
200 #else
201 /*----------------------------------------------------------------------------
202 | Returns 1 if the half-precision floating-point value `a' is a quiet
203 | NaN; otherwise returns 0.
204 *----------------------------------------------------------------------------*/
205
206 int float16_is_quiet_nan(float16 a_)
207 {
208 uint16_t a = float16_val(a_);
209 #if SNAN_BIT_IS_ONE
210 return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
211 #else
212 return ((a & ~0x8000) >= 0x7c80);
213 #endif
214 }
215
216 /*----------------------------------------------------------------------------
217 | Returns 1 if the half-precision floating-point value `a' is a signaling
218 | NaN; otherwise returns 0.
219 *----------------------------------------------------------------------------*/
220
221 int float16_is_signaling_nan(float16 a_)
222 {
223 uint16_t a = float16_val(a_);
224 #if SNAN_BIT_IS_ONE
225 return ((a & ~0x8000) >= 0x7c80);
226 #else
227 return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
228 #endif
229 }
230 #endif
231
232 /*----------------------------------------------------------------------------
233 | Returns a quiet NaN if the half-precision floating point value `a' is a
234 | signaling NaN; otherwise returns `a'.
235 *----------------------------------------------------------------------------*/
236 float16 float16_maybe_silence_nan(float16 a_)
237 {
238 if (float16_is_signaling_nan(a_)) {
239 #if SNAN_BIT_IS_ONE
240 # if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
241 return float16_default_nan;
242 # else
243 # error Rules for silencing a signaling NaN are target-specific
244 # endif
245 #else
246 uint16_t a = float16_val(a_);
247 a |= (1 << 9);
248 return make_float16(a);
249 #endif
250 }
251 return a_;
252 }
253
254 /*----------------------------------------------------------------------------
255 | Returns the result of converting the half-precision floating-point NaN
256 | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
257 | exception is raised.
258 *----------------------------------------------------------------------------*/
259
260 static commonNaNT float16ToCommonNaN(float16 a, float_status *status)
261 {
262 commonNaNT z;
263
264 if (float16_is_signaling_nan(a)) {
265 float_raise(float_flag_invalid, status);
266 }
267 z.sign = float16_val(a) >> 15;
268 z.low = 0;
269 z.high = ((uint64_t) float16_val(a))<<54;
270 return z;
271 }
272
273 /*----------------------------------------------------------------------------
274 | Returns the result of converting the canonical NaN `a' to the half-
275 | precision floating-point format.
276 *----------------------------------------------------------------------------*/
277
278 static float16 commonNaNToFloat16(commonNaNT a, float_status *status)
279 {
280 uint16_t mantissa = a.high>>54;
281
282 if (status->default_nan_mode) {
283 return float16_default_nan;
284 }
285
286 if (mantissa) {
287 return make_float16(((((uint16_t) a.sign) << 15)
288 | (0x1F << 10) | mantissa));
289 } else {
290 return float16_default_nan;
291 }
292 }
293
294 #ifdef NO_SIGNALING_NANS
295 int float32_is_quiet_nan(float32 a_)
296 {
297 return float32_is_any_nan(a_);
298 }
299
300 int float32_is_signaling_nan(float32 a_)
301 {
302 return 0;
303 }
304 #else
305 /*----------------------------------------------------------------------------
306 | Returns 1 if the single-precision floating-point value `a' is a quiet
307 | NaN; otherwise returns 0.
308 *----------------------------------------------------------------------------*/
309
310 int float32_is_quiet_nan( float32 a_ )
311 {
312 uint32_t a = float32_val(a_);
313 #if SNAN_BIT_IS_ONE
314 return (((a >> 22) & 0x1ff) == 0x1fe) && (a & 0x003fffff);
315 #else
316 return ((uint32_t)(a << 1) >= 0xff800000);
317 #endif
318 }
319
320 /*----------------------------------------------------------------------------
321 | Returns 1 if the single-precision floating-point value `a' is a signaling
322 | NaN; otherwise returns 0.
323 *----------------------------------------------------------------------------*/
324
325 int float32_is_signaling_nan( float32 a_ )
326 {
327 uint32_t a = float32_val(a_);
328 #if SNAN_BIT_IS_ONE
329 return ((uint32_t)(a << 1) >= 0xff800000);
330 #else
331 return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
332 #endif
333 }
334 #endif
335
336 /*----------------------------------------------------------------------------
337 | Returns a quiet NaN if the single-precision floating point value `a' is a
338 | signaling NaN; otherwise returns `a'.
339 *----------------------------------------------------------------------------*/
340
341 float32 float32_maybe_silence_nan( float32 a_ )
342 {
343 if (float32_is_signaling_nan(a_)) {
344 #if SNAN_BIT_IS_ONE
345 # if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
346 return float32_default_nan;
347 # else
348 # error Rules for silencing a signaling NaN are target-specific
349 # endif
350 #else
351 uint32_t a = float32_val(a_);
352 a |= (1 << 22);
353 return make_float32(a);
354 #endif
355 }
356 return a_;
357 }
358
359 /*----------------------------------------------------------------------------
360 | Returns the result of converting the single-precision floating-point NaN
361 | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
362 | exception is raised.
363 *----------------------------------------------------------------------------*/
364
365 static commonNaNT float32ToCommonNaN(float32 a, float_status *status)
366 {
367 commonNaNT z;
368
369 if (float32_is_signaling_nan(a)) {
370 float_raise(float_flag_invalid, status);
371 }
372 z.sign = float32_val(a)>>31;
373 z.low = 0;
374 z.high = ( (uint64_t) float32_val(a) )<<41;
375 return z;
376 }
377
378 /*----------------------------------------------------------------------------
379 | Returns the result of converting the canonical NaN `a' to the single-
380 | precision floating-point format.
381 *----------------------------------------------------------------------------*/
382
383 static float32 commonNaNToFloat32(commonNaNT a, float_status *status)
384 {
385 uint32_t mantissa = a.high>>41;
386
387 if (status->default_nan_mode) {
388 return float32_default_nan;
389 }
390
391 if ( mantissa )
392 return make_float32(
393 ( ( (uint32_t) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
394 else
395 return float32_default_nan;
396 }
397
398 /*----------------------------------------------------------------------------
399 | Select which NaN to propagate for a two-input operation.
400 | IEEE754 doesn't specify all the details of this, so the
401 | algorithm is target-specific.
402 | The routine is passed various bits of information about the
403 | two NaNs and should return 0 to select NaN a and 1 for NaN b.
404 | Note that signalling NaNs are always squashed to quiet NaNs
405 | by the caller, by calling floatXX_maybe_silence_nan() before
406 | returning them.
407 |
408 | aIsLargerSignificand is only valid if both a and b are NaNs
409 | of some kind, and is true if a has the larger significand,
410 | or if both a and b have the same significand but a is
411 | positive but b is negative. It is only needed for the x87
412 | tie-break rule.
413 *----------------------------------------------------------------------------*/
414
415 #if defined(TARGET_ARM)
416 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
417 flag aIsLargerSignificand)
418 {
419 /* ARM mandated NaN propagation rules: take the first of:
420 * 1. A if it is signaling
421 * 2. B if it is signaling
422 * 3. A (quiet)
423 * 4. B (quiet)
424 * A signaling NaN is always quietened before returning it.
425 */
426 if (aIsSNaN) {
427 return 0;
428 } else if (bIsSNaN) {
429 return 1;
430 } else if (aIsQNaN) {
431 return 0;
432 } else {
433 return 1;
434 }
435 }
436 #elif defined(TARGET_MIPS)
437 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
438 flag aIsLargerSignificand)
439 {
440 /* According to MIPS specifications, if one of the two operands is
441 * a sNaN, a new qNaN has to be generated. This is done in
442 * floatXX_maybe_silence_nan(). For qNaN inputs the specifications
443 * says: "When possible, this QNaN result is one of the operand QNaN
444 * values." In practice it seems that most implementations choose
445 * the first operand if both operands are qNaN. In short this gives
446 * the following rules:
447 * 1. A if it is signaling
448 * 2. B if it is signaling
449 * 3. A (quiet)
450 * 4. B (quiet)
451 * A signaling NaN is always silenced before returning it.
452 */
453 if (aIsSNaN) {
454 return 0;
455 } else if (bIsSNaN) {
456 return 1;
457 } else if (aIsQNaN) {
458 return 0;
459 } else {
460 return 1;
461 }
462 }
463 #elif defined(TARGET_PPC) || defined(TARGET_XTENSA)
464 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
465 flag aIsLargerSignificand)
466 {
467 /* PowerPC propagation rules:
468 * 1. A if it sNaN or qNaN
469 * 2. B if it sNaN or qNaN
470 * A signaling NaN is always silenced before returning it.
471 */
472 if (aIsSNaN || aIsQNaN) {
473 return 0;
474 } else {
475 return 1;
476 }
477 }
478 #else
479 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
480 flag aIsLargerSignificand)
481 {
482 /* This implements x87 NaN propagation rules:
483 * SNaN + QNaN => return the QNaN
484 * two SNaNs => return the one with the larger significand, silenced
485 * two QNaNs => return the one with the larger significand
486 * SNaN and a non-NaN => return the SNaN, silenced
487 * QNaN and a non-NaN => return the QNaN
488 *
489 * If we get down to comparing significands and they are the same,
490 * return the NaN with the positive sign bit (if any).
491 */
492 if (aIsSNaN) {
493 if (bIsSNaN) {
494 return aIsLargerSignificand ? 0 : 1;
495 }
496 return bIsQNaN ? 1 : 0;
497 }
498 else if (aIsQNaN) {
499 if (bIsSNaN || !bIsQNaN)
500 return 0;
501 else {
502 return aIsLargerSignificand ? 0 : 1;
503 }
504 } else {
505 return 1;
506 }
507 }
508 #endif
509
510 /*----------------------------------------------------------------------------
511 | Select which NaN to propagate for a three-input operation.
512 | For the moment we assume that no CPU needs the 'larger significand'
513 | information.
514 | Return values : 0 : a; 1 : b; 2 : c; 3 : default-NaN
515 *----------------------------------------------------------------------------*/
516 #if defined(TARGET_ARM)
517 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
518 flag cIsQNaN, flag cIsSNaN, flag infzero,
519 float_status *status)
520 {
521 /* For ARM, the (inf,zero,qnan) case sets InvalidOp and returns
522 * the default NaN
523 */
524 if (infzero && cIsQNaN) {
525 float_raise(float_flag_invalid, status);
526 return 3;
527 }
528
529 /* This looks different from the ARM ARM pseudocode, because the ARM ARM
530 * puts the operands to a fused mac operation (a*b)+c in the order c,a,b.
531 */
532 if (cIsSNaN) {
533 return 2;
534 } else if (aIsSNaN) {
535 return 0;
536 } else if (bIsSNaN) {
537 return 1;
538 } else if (cIsQNaN) {
539 return 2;
540 } else if (aIsQNaN) {
541 return 0;
542 } else {
543 return 1;
544 }
545 }
546 #elif defined(TARGET_MIPS)
547 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
548 flag cIsQNaN, flag cIsSNaN, flag infzero,
549 float_status *status)
550 {
551 /* For MIPS, the (inf,zero,qnan) case sets InvalidOp and returns
552 * the default NaN
553 */
554 if (infzero) {
555 float_raise(float_flag_invalid, status);
556 return 3;
557 }
558
559 /* Prefer sNaN over qNaN, in the a, b, c order. */
560 if (aIsSNaN) {
561 return 0;
562 } else if (bIsSNaN) {
563 return 1;
564 } else if (cIsSNaN) {
565 return 2;
566 } else if (aIsQNaN) {
567 return 0;
568 } else if (bIsQNaN) {
569 return 1;
570 } else {
571 return 2;
572 }
573 }
574 #elif defined(TARGET_PPC)
575 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
576 flag cIsQNaN, flag cIsSNaN, flag infzero,
577 float_status *status)
578 {
579 /* For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer
580 * to return an input NaN if we have one (ie c) rather than generating
581 * a default NaN
582 */
583 if (infzero) {
584 float_raise(float_flag_invalid, status);
585 return 2;
586 }
587
588 /* If fRA is a NaN return it; otherwise if fRB is a NaN return it;
589 * otherwise return fRC. Note that muladd on PPC is (fRA * fRC) + frB
590 */
591 if (aIsSNaN || aIsQNaN) {
592 return 0;
593 } else if (cIsSNaN || cIsQNaN) {
594 return 2;
595 } else {
596 return 1;
597 }
598 }
599 #else
600 /* A default implementation: prefer a to b to c.
601 * This is unlikely to actually match any real implementation.
602 */
603 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
604 flag cIsQNaN, flag cIsSNaN, flag infzero,
605 float_status *status)
606 {
607 if (aIsSNaN || aIsQNaN) {
608 return 0;
609 } else if (bIsSNaN || bIsQNaN) {
610 return 1;
611 } else {
612 return 2;
613 }
614 }
615 #endif
616
617 /*----------------------------------------------------------------------------
618 | Takes two single-precision floating-point values `a' and `b', one of which
619 | is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
620 | signaling NaN, the invalid exception is raised.
621 *----------------------------------------------------------------------------*/
622
623 static float32 propagateFloat32NaN(float32 a, float32 b, float_status *status)
624 {
625 flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
626 flag aIsLargerSignificand;
627 uint32_t av, bv;
628
629 aIsQuietNaN = float32_is_quiet_nan( a );
630 aIsSignalingNaN = float32_is_signaling_nan( a );
631 bIsQuietNaN = float32_is_quiet_nan( b );
632 bIsSignalingNaN = float32_is_signaling_nan( b );
633 av = float32_val(a);
634 bv = float32_val(b);
635
636 if (aIsSignalingNaN | bIsSignalingNaN) {
637 float_raise(float_flag_invalid, status);
638 }
639
640 if (status->default_nan_mode)
641 return float32_default_nan;
642
643 if ((uint32_t)(av<<1) < (uint32_t)(bv<<1)) {
644 aIsLargerSignificand = 0;
645 } else if ((uint32_t)(bv<<1) < (uint32_t)(av<<1)) {
646 aIsLargerSignificand = 1;
647 } else {
648 aIsLargerSignificand = (av < bv) ? 1 : 0;
649 }
650
651 if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
652 aIsLargerSignificand)) {
653 return float32_maybe_silence_nan(b);
654 } else {
655 return float32_maybe_silence_nan(a);
656 }
657 }
658
659 /*----------------------------------------------------------------------------
660 | Takes three single-precision floating-point values `a', `b' and `c', one of
661 | which is a NaN, and returns the appropriate NaN result. If any of `a',
662 | `b' or `c' is a signaling NaN, the invalid exception is raised.
663 | The input infzero indicates whether a*b was 0*inf or inf*0 (in which case
664 | obviously c is a NaN, and whether to propagate c or some other NaN is
665 | implementation defined).
666 *----------------------------------------------------------------------------*/
667
668 static float32 propagateFloat32MulAddNaN(float32 a, float32 b,
669 float32 c, flag infzero,
670 float_status *status)
671 {
672 flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
673 cIsQuietNaN, cIsSignalingNaN;
674 int which;
675
676 aIsQuietNaN = float32_is_quiet_nan(a);
677 aIsSignalingNaN = float32_is_signaling_nan(a);
678 bIsQuietNaN = float32_is_quiet_nan(b);
679 bIsSignalingNaN = float32_is_signaling_nan(b);
680 cIsQuietNaN = float32_is_quiet_nan(c);
681 cIsSignalingNaN = float32_is_signaling_nan(c);
682
683 if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) {
684 float_raise(float_flag_invalid, status);
685 }
686
687 which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
688 bIsQuietNaN, bIsSignalingNaN,
689 cIsQuietNaN, cIsSignalingNaN, infzero, status);
690
691 if (status->default_nan_mode) {
692 /* Note that this check is after pickNaNMulAdd so that function
693 * has an opportunity to set the Invalid flag.
694 */
695 return float32_default_nan;
696 }
697
698 switch (which) {
699 case 0:
700 return float32_maybe_silence_nan(a);
701 case 1:
702 return float32_maybe_silence_nan(b);
703 case 2:
704 return float32_maybe_silence_nan(c);
705 case 3:
706 default:
707 return float32_default_nan;
708 }
709 }
710
711 #ifdef NO_SIGNALING_NANS
712 int float64_is_quiet_nan(float64 a_)
713 {
714 return float64_is_any_nan(a_);
715 }
716
717 int float64_is_signaling_nan(float64 a_)
718 {
719 return 0;
720 }
721 #else
722 /*----------------------------------------------------------------------------
723 | Returns 1 if the double-precision floating-point value `a' is a quiet
724 | NaN; otherwise returns 0.
725 *----------------------------------------------------------------------------*/
726
727 int float64_is_quiet_nan( float64 a_ )
728 {
729 uint64_t a = float64_val(a_);
730 #if SNAN_BIT_IS_ONE
731 return (((a >> 51) & 0xfff) == 0xffe)
732 && (a & 0x0007ffffffffffffULL);
733 #else
734 return ((a << 1) >= 0xfff0000000000000ULL);
735 #endif
736 }
737
738 /*----------------------------------------------------------------------------
739 | Returns 1 if the double-precision floating-point value `a' is a signaling
740 | NaN; otherwise returns 0.
741 *----------------------------------------------------------------------------*/
742
743 int float64_is_signaling_nan( float64 a_ )
744 {
745 uint64_t a = float64_val(a_);
746 #if SNAN_BIT_IS_ONE
747 return ((a << 1) >= 0xfff0000000000000ULL);
748 #else
749 return
750 ( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
751 && ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
752 #endif
753 }
754 #endif
755
756 /*----------------------------------------------------------------------------
757 | Returns a quiet NaN if the double-precision floating point value `a' is a
758 | signaling NaN; otherwise returns `a'.
759 *----------------------------------------------------------------------------*/
760
761 float64 float64_maybe_silence_nan( float64 a_ )
762 {
763 if (float64_is_signaling_nan(a_)) {
764 #if SNAN_BIT_IS_ONE
765 # if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
766 return float64_default_nan;
767 # else
768 # error Rules for silencing a signaling NaN are target-specific
769 # endif
770 #else
771 uint64_t a = float64_val(a_);
772 a |= LIT64( 0x0008000000000000 );
773 return make_float64(a);
774 #endif
775 }
776 return a_;
777 }
778
779 /*----------------------------------------------------------------------------
780 | Returns the result of converting the double-precision floating-point NaN
781 | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
782 | exception is raised.
783 *----------------------------------------------------------------------------*/
784
785 static commonNaNT float64ToCommonNaN(float64 a, float_status *status)
786 {
787 commonNaNT z;
788
789 if (float64_is_signaling_nan(a)) {
790 float_raise(float_flag_invalid, status);
791 }
792 z.sign = float64_val(a)>>63;
793 z.low = 0;
794 z.high = float64_val(a)<<12;
795 return z;
796 }
797
798 /*----------------------------------------------------------------------------
799 | Returns the result of converting the canonical NaN `a' to the double-
800 | precision floating-point format.
801 *----------------------------------------------------------------------------*/
802
803 static float64 commonNaNToFloat64(commonNaNT a, float_status *status)
804 {
805 uint64_t mantissa = a.high>>12;
806
807 if (status->default_nan_mode) {
808 return float64_default_nan;
809 }
810
811 if ( mantissa )
812 return make_float64(
813 ( ( (uint64_t) a.sign )<<63 )
814 | LIT64( 0x7FF0000000000000 )
815 | ( a.high>>12 ));
816 else
817 return float64_default_nan;
818 }
819
820 /*----------------------------------------------------------------------------
821 | Takes two double-precision floating-point values `a' and `b', one of which
822 | is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
823 | signaling NaN, the invalid exception is raised.
824 *----------------------------------------------------------------------------*/
825
826 static float64 propagateFloat64NaN(float64 a, float64 b, float_status *status)
827 {
828 flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
829 flag aIsLargerSignificand;
830 uint64_t av, bv;
831
832 aIsQuietNaN = float64_is_quiet_nan( a );
833 aIsSignalingNaN = float64_is_signaling_nan( a );
834 bIsQuietNaN = float64_is_quiet_nan( b );
835 bIsSignalingNaN = float64_is_signaling_nan( b );
836 av = float64_val(a);
837 bv = float64_val(b);
838
839 if (aIsSignalingNaN | bIsSignalingNaN) {
840 float_raise(float_flag_invalid, status);
841 }
842
843 if (status->default_nan_mode)
844 return float64_default_nan;
845
846 if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) {
847 aIsLargerSignificand = 0;
848 } else if ((uint64_t)(bv<<1) < (uint64_t)(av<<1)) {
849 aIsLargerSignificand = 1;
850 } else {
851 aIsLargerSignificand = (av < bv) ? 1 : 0;
852 }
853
854 if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
855 aIsLargerSignificand)) {
856 return float64_maybe_silence_nan(b);
857 } else {
858 return float64_maybe_silence_nan(a);
859 }
860 }
861
862 /*----------------------------------------------------------------------------
863 | Takes three double-precision floating-point values `a', `b' and `c', one of
864 | which is a NaN, and returns the appropriate NaN result. If any of `a',
865 | `b' or `c' is a signaling NaN, the invalid exception is raised.
866 | The input infzero indicates whether a*b was 0*inf or inf*0 (in which case
867 | obviously c is a NaN, and whether to propagate c or some other NaN is
868 | implementation defined).
869 *----------------------------------------------------------------------------*/
870
871 static float64 propagateFloat64MulAddNaN(float64 a, float64 b,
872 float64 c, flag infzero,
873 float_status *status)
874 {
875 flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
876 cIsQuietNaN, cIsSignalingNaN;
877 int which;
878
879 aIsQuietNaN = float64_is_quiet_nan(a);
880 aIsSignalingNaN = float64_is_signaling_nan(a);
881 bIsQuietNaN = float64_is_quiet_nan(b);
882 bIsSignalingNaN = float64_is_signaling_nan(b);
883 cIsQuietNaN = float64_is_quiet_nan(c);
884 cIsSignalingNaN = float64_is_signaling_nan(c);
885
886 if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) {
887 float_raise(float_flag_invalid, status);
888 }
889
890 which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
891 bIsQuietNaN, bIsSignalingNaN,
892 cIsQuietNaN, cIsSignalingNaN, infzero, status);
893
894 if (status->default_nan_mode) {
895 /* Note that this check is after pickNaNMulAdd so that function
896 * has an opportunity to set the Invalid flag.
897 */
898 return float64_default_nan;
899 }
900
901 switch (which) {
902 case 0:
903 return float64_maybe_silence_nan(a);
904 case 1:
905 return float64_maybe_silence_nan(b);
906 case 2:
907 return float64_maybe_silence_nan(c);
908 case 3:
909 default:
910 return float64_default_nan;
911 }
912 }
913
914 #ifdef NO_SIGNALING_NANS
915 int floatx80_is_quiet_nan(floatx80 a_)
916 {
917 return floatx80_is_any_nan(a_);
918 }
919
920 int floatx80_is_signaling_nan(floatx80 a_)
921 {
922 return 0;
923 }
924 #else
925 /*----------------------------------------------------------------------------
926 | Returns 1 if the extended double-precision floating-point value `a' is a
927 | quiet NaN; otherwise returns 0. This slightly differs from the same
928 | function for other types as floatx80 has an explicit bit.
929 *----------------------------------------------------------------------------*/
930
931 int floatx80_is_quiet_nan( floatx80 a )
932 {
933 #if SNAN_BIT_IS_ONE
934 uint64_t aLow;
935
936 aLow = a.low & ~0x4000000000000000ULL;
937 return ((a.high & 0x7fff) == 0x7fff)
938 && (aLow << 1)
939 && (a.low == aLow);
940 #else
941 return ( ( a.high & 0x7FFF ) == 0x7FFF )
942 && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
943 #endif
944 }
945
946 /*----------------------------------------------------------------------------
947 | Returns 1 if the extended double-precision floating-point value `a' is a
948 | signaling NaN; otherwise returns 0. This slightly differs from the same
949 | function for other types as floatx80 has an explicit bit.
950 *----------------------------------------------------------------------------*/
951
952 int floatx80_is_signaling_nan( floatx80 a )
953 {
954 #if SNAN_BIT_IS_ONE
955 return ((a.high & 0x7fff) == 0x7fff)
956 && ((a.low << 1) >= 0x8000000000000000ULL);
957 #else
958 uint64_t aLow;
959
960 aLow = a.low & ~ LIT64( 0x4000000000000000 );
961 return
962 ( ( a.high & 0x7FFF ) == 0x7FFF )
963 && (uint64_t) ( aLow<<1 )
964 && ( a.low == aLow );
965 #endif
966 }
967 #endif
968
969 /*----------------------------------------------------------------------------
970 | Returns a quiet NaN if the extended double-precision floating point value
971 | `a' is a signaling NaN; otherwise returns `a'.
972 *----------------------------------------------------------------------------*/
973
974 floatx80 floatx80_maybe_silence_nan( floatx80 a )
975 {
976 if (floatx80_is_signaling_nan(a)) {
977 #if SNAN_BIT_IS_ONE
978 # if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
979 a.low = floatx80_default_nan_low;
980 a.high = floatx80_default_nan_high;
981 # else
982 # error Rules for silencing a signaling NaN are target-specific
983 # endif
984 #else
985 a.low |= LIT64( 0xC000000000000000 );
986 return a;
987 #endif
988 }
989 return a;
990 }
991
992 /*----------------------------------------------------------------------------
993 | Returns the result of converting the extended double-precision floating-
994 | point NaN `a' to the canonical NaN format. If `a' is a signaling NaN, the
995 | invalid exception is raised.
996 *----------------------------------------------------------------------------*/
997
998 static commonNaNT floatx80ToCommonNaN(floatx80 a, float_status *status)
999 {
1000 commonNaNT z;
1001
1002 if (floatx80_is_signaling_nan(a)) {
1003 float_raise(float_flag_invalid, status);
1004 }
1005 if ( a.low >> 63 ) {
1006 z.sign = a.high >> 15;
1007 z.low = 0;
1008 z.high = a.low << 1;
1009 } else {
1010 z.sign = floatx80_default_nan_high >> 15;
1011 z.low = 0;
1012 z.high = floatx80_default_nan_low << 1;
1013 }
1014 return z;
1015 }
1016
1017 /*----------------------------------------------------------------------------
1018 | Returns the result of converting the canonical NaN `a' to the extended
1019 | double-precision floating-point format.
1020 *----------------------------------------------------------------------------*/
1021
1022 static floatx80 commonNaNToFloatx80(commonNaNT a, float_status *status)
1023 {
1024 floatx80 z;
1025
1026 if (status->default_nan_mode) {
1027 z.low = floatx80_default_nan_low;
1028 z.high = floatx80_default_nan_high;
1029 return z;
1030 }
1031
1032 if (a.high >> 1) {
1033 z.low = LIT64( 0x8000000000000000 ) | a.high >> 1;
1034 z.high = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF;
1035 } else {
1036 z.low = floatx80_default_nan_low;
1037 z.high = floatx80_default_nan_high;
1038 }
1039
1040 return z;
1041 }
1042
1043 /*----------------------------------------------------------------------------
1044 | Takes two extended double-precision floating-point values `a' and `b', one
1045 | of which is a NaN, and returns the appropriate NaN result. If either `a' or
1046 | `b' is a signaling NaN, the invalid exception is raised.
1047 *----------------------------------------------------------------------------*/
1048
1049 static floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b,
1050 float_status *status)
1051 {
1052 flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
1053 flag aIsLargerSignificand;
1054
1055 aIsQuietNaN = floatx80_is_quiet_nan( a );
1056 aIsSignalingNaN = floatx80_is_signaling_nan( a );
1057 bIsQuietNaN = floatx80_is_quiet_nan( b );
1058 bIsSignalingNaN = floatx80_is_signaling_nan( b );
1059
1060 if (aIsSignalingNaN | bIsSignalingNaN) {
1061 float_raise(float_flag_invalid, status);
1062 }
1063
1064 if (status->default_nan_mode) {
1065 a.low = floatx80_default_nan_low;
1066 a.high = floatx80_default_nan_high;
1067 return a;
1068 }
1069
1070 if (a.low < b.low) {
1071 aIsLargerSignificand = 0;
1072 } else if (b.low < a.low) {
1073 aIsLargerSignificand = 1;
1074 } else {
1075 aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
1076 }
1077
1078 if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
1079 aIsLargerSignificand)) {
1080 return floatx80_maybe_silence_nan(b);
1081 } else {
1082 return floatx80_maybe_silence_nan(a);
1083 }
1084 }
1085
1086 #ifdef NO_SIGNALING_NANS
1087 int float128_is_quiet_nan(float128 a_)
1088 {
1089 return float128_is_any_nan(a_);
1090 }
1091
1092 int float128_is_signaling_nan(float128 a_)
1093 {
1094 return 0;
1095 }
1096 #else
1097 /*----------------------------------------------------------------------------
1098 | Returns 1 if the quadruple-precision floating-point value `a' is a quiet
1099 | NaN; otherwise returns 0.
1100 *----------------------------------------------------------------------------*/
1101
1102 int float128_is_quiet_nan( float128 a )
1103 {
1104 #if SNAN_BIT_IS_ONE
1105 return (((a.high >> 47) & 0xffff) == 0xfffe)
1106 && (a.low || (a.high & 0x00007fffffffffffULL));
1107 #else
1108 return
1109 ((a.high << 1) >= 0xffff000000000000ULL)
1110 && (a.low || (a.high & 0x0000ffffffffffffULL));
1111 #endif
1112 }
1113
1114 /*----------------------------------------------------------------------------
1115 | Returns 1 if the quadruple-precision floating-point value `a' is a
1116 | signaling NaN; otherwise returns 0.
1117 *----------------------------------------------------------------------------*/
1118
1119 int float128_is_signaling_nan( float128 a )
1120 {
1121 #if SNAN_BIT_IS_ONE
1122 return
1123 ((a.high << 1) >= 0xffff000000000000ULL)
1124 && (a.low || (a.high & 0x0000ffffffffffffULL));
1125 #else
1126 return
1127 ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
1128 && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
1129 #endif
1130 }
1131 #endif
1132
1133 /*----------------------------------------------------------------------------
1134 | Returns a quiet NaN if the quadruple-precision floating point value `a' is
1135 | a signaling NaN; otherwise returns `a'.
1136 *----------------------------------------------------------------------------*/
1137
1138 float128 float128_maybe_silence_nan( float128 a )
1139 {
1140 if (float128_is_signaling_nan(a)) {
1141 #if SNAN_BIT_IS_ONE
1142 # if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
1143 a.low = float128_default_nan_low;
1144 a.high = float128_default_nan_high;
1145 # else
1146 # error Rules for silencing a signaling NaN are target-specific
1147 # endif
1148 #else
1149 a.high |= LIT64( 0x0000800000000000 );
1150 return a;
1151 #endif
1152 }
1153 return a;
1154 }
1155
1156 /*----------------------------------------------------------------------------
1157 | Returns the result of converting the quadruple-precision floating-point NaN
1158 | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
1159 | exception is raised.
1160 *----------------------------------------------------------------------------*/
1161
1162 static commonNaNT float128ToCommonNaN(float128 a, float_status *status)
1163 {
1164 commonNaNT z;
1165
1166 if (float128_is_signaling_nan(a)) {
1167 float_raise(float_flag_invalid, status);
1168 }
1169 z.sign = a.high>>63;
1170 shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
1171 return z;
1172 }
1173
1174 /*----------------------------------------------------------------------------
1175 | Returns the result of converting the canonical NaN `a' to the quadruple-
1176 | precision floating-point format.
1177 *----------------------------------------------------------------------------*/
1178
1179 static float128 commonNaNToFloat128(commonNaNT a, float_status *status)
1180 {
1181 float128 z;
1182
1183 if (status->default_nan_mode) {
1184 z.low = float128_default_nan_low;
1185 z.high = float128_default_nan_high;
1186 return z;
1187 }
1188
1189 shift128Right( a.high, a.low, 16, &z.high, &z.low );
1190 z.high |= ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 );
1191 return z;
1192 }
1193
1194 /*----------------------------------------------------------------------------
1195 | Takes two quadruple-precision floating-point values `a' and `b', one of
1196 | which is a NaN, and returns the appropriate NaN result. If either `a' or
1197 | `b' is a signaling NaN, the invalid exception is raised.
1198 *----------------------------------------------------------------------------*/
1199
1200 static float128 propagateFloat128NaN(float128 a, float128 b,
1201 float_status *status)
1202 {
1203 flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
1204 flag aIsLargerSignificand;
1205
1206 aIsQuietNaN = float128_is_quiet_nan( a );
1207 aIsSignalingNaN = float128_is_signaling_nan( a );
1208 bIsQuietNaN = float128_is_quiet_nan( b );
1209 bIsSignalingNaN = float128_is_signaling_nan( b );
1210
1211 if (aIsSignalingNaN | bIsSignalingNaN) {
1212 float_raise(float_flag_invalid, status);
1213 }
1214
1215 if (status->default_nan_mode) {
1216 a.low = float128_default_nan_low;
1217 a.high = float128_default_nan_high;
1218 return a;
1219 }
1220
1221 if (lt128(a.high<<1, a.low, b.high<<1, b.low)) {
1222 aIsLargerSignificand = 0;
1223 } else if (lt128(b.high<<1, b.low, a.high<<1, a.low)) {
1224 aIsLargerSignificand = 1;
1225 } else {
1226 aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
1227 }
1228
1229 if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
1230 aIsLargerSignificand)) {
1231 return float128_maybe_silence_nan(b);
1232 } else {
1233 return float128_maybe_silence_nan(a);
1234 }
1235 }
1236