Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200703' into...
[qemu.git] / gdb-xml / riscv-64bit-cpu.xml
1 <?xml version="1.0"?>
2 <!-- Copyright (C) 2018-2019 Free Software Foundation, Inc.
3
4 Copying and distribution of this file, with or without modification,
5 are permitted in any medium without royalty provided the copyright
6 notice and this notice are preserved. -->
7
8 <!-- Register numbers are hard-coded in order to maintain backward
9 compatibility with older versions of tools that didn't use xml
10 register descriptions. -->
11
12 <!DOCTYPE feature SYSTEM "gdb-target.dtd">
13 <feature name="org.gnu.gdb.riscv.cpu">
14 <reg name="zero" bitsize="64" type="int" regnum="0"/>
15 <reg name="ra" bitsize="64" type="code_ptr"/>
16 <reg name="sp" bitsize="64" type="data_ptr"/>
17 <reg name="gp" bitsize="64" type="data_ptr"/>
18 <reg name="tp" bitsize="64" type="data_ptr"/>
19 <reg name="t0" bitsize="64" type="int"/>
20 <reg name="t1" bitsize="64" type="int"/>
21 <reg name="t2" bitsize="64" type="int"/>
22 <reg name="fp" bitsize="64" type="data_ptr"/>
23 <reg name="s1" bitsize="64" type="int"/>
24 <reg name="a0" bitsize="64" type="int"/>
25 <reg name="a1" bitsize="64" type="int"/>
26 <reg name="a2" bitsize="64" type="int"/>
27 <reg name="a3" bitsize="64" type="int"/>
28 <reg name="a4" bitsize="64" type="int"/>
29 <reg name="a5" bitsize="64" type="int"/>
30 <reg name="a6" bitsize="64" type="int"/>
31 <reg name="a7" bitsize="64" type="int"/>
32 <reg name="s2" bitsize="64" type="int"/>
33 <reg name="s3" bitsize="64" type="int"/>
34 <reg name="s4" bitsize="64" type="int"/>
35 <reg name="s5" bitsize="64" type="int"/>
36 <reg name="s6" bitsize="64" type="int"/>
37 <reg name="s7" bitsize="64" type="int"/>
38 <reg name="s8" bitsize="64" type="int"/>
39 <reg name="s9" bitsize="64" type="int"/>
40 <reg name="s10" bitsize="64" type="int"/>
41 <reg name="s11" bitsize="64" type="int"/>
42 <reg name="t3" bitsize="64" type="int"/>
43 <reg name="t4" bitsize="64" type="int"/>
44 <reg name="t5" bitsize="64" type="int"/>
45 <reg name="t6" bitsize="64" type="int"/>
46 <reg name="pc" bitsize="64" type="code_ptr"/>
47 </feature>