Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200703' into...
[qemu.git] / gdb-xml / riscv-64bit-fpu.xml
1 <?xml version="1.0"?>
2 <!-- Copyright (C) 2018-2019 Free Software Foundation, Inc.
3
4 Copying and distribution of this file, with or without modification,
5 are permitted in any medium without royalty provided the copyright
6 notice and this notice are preserved. -->
7
8 <!-- Register numbers are hard-coded in order to maintain backward
9 compatibility with older versions of tools that didn't use xml
10 register descriptions. -->
11
12 <!DOCTYPE feature SYSTEM "gdb-target.dtd">
13 <feature name="org.gnu.gdb.riscv.fpu">
14
15 <union id="riscv_double">
16 <field name="float" type="ieee_single"/>
17 <field name="double" type="ieee_double"/>
18 </union>
19
20 <reg name="ft0" bitsize="64" type="riscv_double" regnum="33"/>
21 <reg name="ft1" bitsize="64" type="riscv_double"/>
22 <reg name="ft2" bitsize="64" type="riscv_double"/>
23 <reg name="ft3" bitsize="64" type="riscv_double"/>
24 <reg name="ft4" bitsize="64" type="riscv_double"/>
25 <reg name="ft5" bitsize="64" type="riscv_double"/>
26 <reg name="ft6" bitsize="64" type="riscv_double"/>
27 <reg name="ft7" bitsize="64" type="riscv_double"/>
28 <reg name="fs0" bitsize="64" type="riscv_double"/>
29 <reg name="fs1" bitsize="64" type="riscv_double"/>
30 <reg name="fa0" bitsize="64" type="riscv_double"/>
31 <reg name="fa1" bitsize="64" type="riscv_double"/>
32 <reg name="fa2" bitsize="64" type="riscv_double"/>
33 <reg name="fa3" bitsize="64" type="riscv_double"/>
34 <reg name="fa4" bitsize="64" type="riscv_double"/>
35 <reg name="fa5" bitsize="64" type="riscv_double"/>
36 <reg name="fa6" bitsize="64" type="riscv_double"/>
37 <reg name="fa7" bitsize="64" type="riscv_double"/>
38 <reg name="fs2" bitsize="64" type="riscv_double"/>
39 <reg name="fs3" bitsize="64" type="riscv_double"/>
40 <reg name="fs4" bitsize="64" type="riscv_double"/>
41 <reg name="fs5" bitsize="64" type="riscv_double"/>
42 <reg name="fs6" bitsize="64" type="riscv_double"/>
43 <reg name="fs7" bitsize="64" type="riscv_double"/>
44 <reg name="fs8" bitsize="64" type="riscv_double"/>
45 <reg name="fs9" bitsize="64" type="riscv_double"/>
46 <reg name="fs10" bitsize="64" type="riscv_double"/>
47 <reg name="fs11" bitsize="64" type="riscv_double"/>
48 <reg name="ft8" bitsize="64" type="riscv_double"/>
49 <reg name="ft9" bitsize="64" type="riscv_double"/>
50 <reg name="ft10" bitsize="64" type="riscv_double"/>
51 <reg name="ft11" bitsize="64" type="riscv_double"/>
52
53 <reg name="fflags" bitsize="32" type="int" regnum="66"/>
54 <reg name="frm" bitsize="32" type="int" regnum="67"/>
55 <reg name="fcsr" bitsize="32" type="int" regnum="68"/>
56 </feature>