Add access control support to qemu bridge helper
[qemu.git] / hw / acpi.h
1 #ifndef QEMU_HW_ACPI_H
2 #define QEMU_HW_ACPI_H
3 /*
4 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
5 * VA Linux Systems Japan K.K.
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see
19 * <http://www.gnu.org/licenses/>.
20 */
21
22 /* from linux include/acpi/actype.h */
23 /* Default ACPI register widths */
24
25 #define ACPI_GPE_REGISTER_WIDTH 8
26 #define ACPI_PM1_REGISTER_WIDTH 16
27 #define ACPI_PM2_REGISTER_WIDTH 8
28 #define ACPI_PM_TIMER_WIDTH 32
29
30 /* PM Timer ticks per second (HZ) */
31 #define PM_TIMER_FREQUENCY 3579545
32
33
34 /* ACPI fixed hardware registers */
35
36 /* from linux/drivers/acpi/acpica/aclocal.h */
37 /* Masks used to access the bit_registers */
38
39 /* PM1x_STS */
40 #define ACPI_BITMASK_TIMER_STATUS 0x0001
41 #define ACPI_BITMASK_BUS_MASTER_STATUS 0x0010
42 #define ACPI_BITMASK_GLOBAL_LOCK_STATUS 0x0020
43 #define ACPI_BITMASK_POWER_BUTTON_STATUS 0x0100
44 #define ACPI_BITMASK_SLEEP_BUTTON_STATUS 0x0200
45 #define ACPI_BITMASK_RT_CLOCK_STATUS 0x0400
46 #define ACPI_BITMASK_PCIEXP_WAKE_STATUS 0x4000 /* ACPI 3.0 */
47 #define ACPI_BITMASK_WAKE_STATUS 0x8000
48
49 #define ACPI_BITMASK_ALL_FIXED_STATUS (\
50 ACPI_BITMASK_TIMER_STATUS | \
51 ACPI_BITMASK_BUS_MASTER_STATUS | \
52 ACPI_BITMASK_GLOBAL_LOCK_STATUS | \
53 ACPI_BITMASK_POWER_BUTTON_STATUS | \
54 ACPI_BITMASK_SLEEP_BUTTON_STATUS | \
55 ACPI_BITMASK_RT_CLOCK_STATUS | \
56 ACPI_BITMASK_WAKE_STATUS)
57
58 /* PM1x_EN */
59 #define ACPI_BITMASK_TIMER_ENABLE 0x0001
60 #define ACPI_BITMASK_GLOBAL_LOCK_ENABLE 0x0020
61 #define ACPI_BITMASK_POWER_BUTTON_ENABLE 0x0100
62 #define ACPI_BITMASK_SLEEP_BUTTON_ENABLE 0x0200
63 #define ACPI_BITMASK_RT_CLOCK_ENABLE 0x0400
64 #define ACPI_BITMASK_PCIEXP_WAKE_DISABLE 0x4000 /* ACPI 3.0 */
65
66 /* PM1x_CNT */
67 #define ACPI_BITMASK_SCI_ENABLE 0x0001
68 #define ACPI_BITMASK_BUS_MASTER_RLD 0x0002
69 #define ACPI_BITMASK_GLOBAL_LOCK_RELEASE 0x0004
70 #define ACPI_BITMASK_SLEEP_TYPE 0x1C00
71 #define ACPI_BITMASK_SLEEP_ENABLE 0x2000
72
73 /* PM2_CNT */
74 #define ACPI_BITMASK_ARB_DISABLE 0x0001
75
76 /* PM_TMR */
77 struct ACPIPMTimer;
78 typedef struct ACPIPMTimer ACPIPMTimer;
79
80 typedef void (*acpi_update_sci_fn)(ACPIPMTimer *tmr);
81
82 struct ACPIPMTimer {
83 QEMUTimer *timer;
84 int64_t overflow_time;
85
86 acpi_update_sci_fn update_sci;
87 };
88
89 void acpi_pm_tmr_update(ACPIPMTimer *tmr, bool enable);
90 void acpi_pm_tmr_calc_overflow_time(ACPIPMTimer *tmr);
91 uint32_t acpi_pm_tmr_get(ACPIPMTimer *tmr);
92 void acpi_pm_tmr_init(ACPIPMTimer *tmr, acpi_update_sci_fn update_sci);
93 void acpi_pm_tmr_reset(ACPIPMTimer *tmr);
94
95 #include "qemu-timer.h"
96 static inline int64_t acpi_pm_tmr_get_clock(void)
97 {
98 return muldiv64(qemu_get_clock_ns(vm_clock), PM_TIMER_FREQUENCY,
99 get_ticks_per_sec());
100 }
101
102 /* PM1a_EVT: piix and ich9 don't implement PM1b. */
103 struct ACPIPM1EVT
104 {
105 uint16_t sts;
106 uint16_t en;
107 };
108 typedef struct ACPIPM1EVT ACPIPM1EVT;
109
110 uint16_t acpi_pm1_evt_get_sts(ACPIPM1EVT *pm1, int64_t overflow_time);
111 void acpi_pm1_evt_write_sts(ACPIPM1EVT *pm1, ACPIPMTimer *tmr, uint16_t val);
112 void acpi_pm1_evt_power_down(ACPIPM1EVT *pm1, ACPIPMTimer *tmr);
113 void acpi_pm1_evt_reset(ACPIPM1EVT *pm1);
114
115 /* PM1a_CNT: piix and ich9 don't implement PM1b CNT. */
116 struct ACPIPM1CNT {
117 uint16_t cnt;
118
119 qemu_irq cmos_s3;
120 };
121 typedef struct ACPIPM1CNT ACPIPM1CNT;
122
123 void acpi_pm1_cnt_init(ACPIPM1CNT *pm1_cnt, qemu_irq cmos_s3);
124 void acpi_pm1_cnt_write(ACPIPM1EVT *pm1a, ACPIPM1CNT *pm1_cnt, uint16_t val);
125 void acpi_pm1_cnt_update(ACPIPM1CNT *pm1_cnt,
126 bool sci_enable, bool sci_disable);
127 void acpi_pm1_cnt_reset(ACPIPM1CNT *pm1_cnt);
128
129 /* GPE0 */
130 struct ACPIGPE {
131 uint32_t blk;
132 uint8_t len;
133
134 uint8_t *sts;
135 uint8_t *en;
136 };
137 typedef struct ACPIGPE ACPIGPE;
138
139 void acpi_gpe_init(ACPIGPE *gpe, uint8_t len);
140 void acpi_gpe_blk(ACPIGPE *gpe, uint32_t blk);
141 void acpi_gpe_reset(ACPIGPE *gpe);
142
143 void acpi_gpe_ioport_writeb(ACPIGPE *gpe, uint32_t addr, uint32_t val);
144 uint32_t acpi_gpe_ioport_readb(ACPIGPE *gpe, uint32_t addr);
145
146 #endif /* !QEMU_HW_ACPI_H */