hw/arm/bcm2836: Only provide "enabled-cpus" property to multicore SoCs
[qemu.git] / hw / arm / armv7m.c
1 /*
2 * ARMV7M System emulation.
3 *
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
6 *
7 * This code is licensed under the GPL.
8 */
9
10 #include "qemu/osdep.h"
11 #include "hw/arm/armv7m.h"
12 #include "qapi/error.h"
13 #include "cpu.h"
14 #include "hw/sysbus.h"
15 #include "hw/arm/boot.h"
16 #include "hw/loader.h"
17 #include "hw/qdev-properties.h"
18 #include "elf.h"
19 #include "sysemu/qtest.h"
20 #include "sysemu/reset.h"
21 #include "qemu/error-report.h"
22 #include "qemu/module.h"
23 #include "exec/address-spaces.h"
24 #include "target/arm/idau.h"
25
26 /* Bitbanded IO. Each word corresponds to a single bit. */
27
28 /* Get the byte address of the real memory for a bitband access. */
29 static inline hwaddr bitband_addr(BitBandState *s, hwaddr offset)
30 {
31 return s->base | (offset & 0x1ffffff) >> 5;
32 }
33
34 static MemTxResult bitband_read(void *opaque, hwaddr offset,
35 uint64_t *data, unsigned size, MemTxAttrs attrs)
36 {
37 BitBandState *s = opaque;
38 uint8_t buf[4];
39 MemTxResult res;
40 int bitpos, bit;
41 hwaddr addr;
42
43 assert(size <= 4);
44
45 /* Find address in underlying memory and round down to multiple of size */
46 addr = bitband_addr(s, offset) & (-size);
47 res = address_space_read(&s->source_as, addr, attrs, buf, size);
48 if (res) {
49 return res;
50 }
51 /* Bit position in the N bytes read... */
52 bitpos = (offset >> 2) & ((size * 8) - 1);
53 /* ...converted to byte in buffer and bit in byte */
54 bit = (buf[bitpos >> 3] >> (bitpos & 7)) & 1;
55 *data = bit;
56 return MEMTX_OK;
57 }
58
59 static MemTxResult bitband_write(void *opaque, hwaddr offset, uint64_t value,
60 unsigned size, MemTxAttrs attrs)
61 {
62 BitBandState *s = opaque;
63 uint8_t buf[4];
64 MemTxResult res;
65 int bitpos, bit;
66 hwaddr addr;
67
68 assert(size <= 4);
69
70 /* Find address in underlying memory and round down to multiple of size */
71 addr = bitband_addr(s, offset) & (-size);
72 res = address_space_read(&s->source_as, addr, attrs, buf, size);
73 if (res) {
74 return res;
75 }
76 /* Bit position in the N bytes read... */
77 bitpos = (offset >> 2) & ((size * 8) - 1);
78 /* ...converted to byte in buffer and bit in byte */
79 bit = 1 << (bitpos & 7);
80 if (value & 1) {
81 buf[bitpos >> 3] |= bit;
82 } else {
83 buf[bitpos >> 3] &= ~bit;
84 }
85 return address_space_write(&s->source_as, addr, attrs, buf, size);
86 }
87
88 static const MemoryRegionOps bitband_ops = {
89 .read_with_attrs = bitband_read,
90 .write_with_attrs = bitband_write,
91 .endianness = DEVICE_NATIVE_ENDIAN,
92 .impl.min_access_size = 1,
93 .impl.max_access_size = 4,
94 .valid.min_access_size = 1,
95 .valid.max_access_size = 4,
96 };
97
98 static void bitband_init(Object *obj)
99 {
100 BitBandState *s = BITBAND(obj);
101 SysBusDevice *dev = SYS_BUS_DEVICE(obj);
102
103 memory_region_init_io(&s->iomem, obj, &bitband_ops, s,
104 "bitband", 0x02000000);
105 sysbus_init_mmio(dev, &s->iomem);
106 }
107
108 static void bitband_realize(DeviceState *dev, Error **errp)
109 {
110 BitBandState *s = BITBAND(dev);
111
112 if (!s->source_memory) {
113 error_setg(errp, "source-memory property not set");
114 return;
115 }
116
117 address_space_init(&s->source_as, s->source_memory, "bitband-source");
118 }
119
120 /* Board init. */
121
122 static const hwaddr bitband_input_addr[ARMV7M_NUM_BITBANDS] = {
123 0x20000000, 0x40000000
124 };
125
126 static const hwaddr bitband_output_addr[ARMV7M_NUM_BITBANDS] = {
127 0x22000000, 0x42000000
128 };
129
130 static void armv7m_instance_init(Object *obj)
131 {
132 ARMv7MState *s = ARMV7M(obj);
133 int i;
134
135 /* Can't init the cpu here, we don't yet know which model to use */
136
137 memory_region_init(&s->container, obj, "armv7m-container", UINT64_MAX);
138
139 object_initialize_child(obj, "nvnic", &s->nvic, TYPE_NVIC);
140 object_property_add_alias(obj, "num-irq",
141 OBJECT(&s->nvic), "num-irq");
142
143 for (i = 0; i < ARRAY_SIZE(s->bitband); i++) {
144 object_initialize_child(obj, "bitband[*]", &s->bitband[i],
145 TYPE_BITBAND);
146 }
147 }
148
149 static void armv7m_realize(DeviceState *dev, Error **errp)
150 {
151 ARMv7MState *s = ARMV7M(dev);
152 SysBusDevice *sbd;
153 Error *err = NULL;
154 int i;
155
156 if (!s->board_memory) {
157 error_setg(errp, "memory property was not set");
158 return;
159 }
160
161 memory_region_add_subregion_overlap(&s->container, 0, s->board_memory, -1);
162
163 s->cpu = ARM_CPU(object_new_with_props(s->cpu_type, OBJECT(s), "cpu",
164 &err, NULL));
165 if (err != NULL) {
166 error_propagate(errp, err);
167 return;
168 }
169
170 object_property_set_link(OBJECT(s->cpu), "memory", OBJECT(&s->container),
171 &error_abort);
172 if (object_property_find(OBJECT(s->cpu), "idau")) {
173 object_property_set_link(OBJECT(s->cpu), "idau", s->idau,
174 &error_abort);
175 }
176 if (object_property_find(OBJECT(s->cpu), "init-svtor")) {
177 if (!object_property_set_uint(OBJECT(s->cpu), "init-svtor",
178 s->init_svtor, errp)) {
179 return;
180 }
181 }
182 if (object_property_find(OBJECT(s->cpu), "start-powered-off")) {
183 if (!object_property_set_bool(OBJECT(s->cpu), "start-powered-off",
184 s->start_powered_off, errp)) {
185 return;
186 }
187 }
188 if (object_property_find(OBJECT(s->cpu), "vfp")) {
189 if (!object_property_set_bool(OBJECT(s->cpu), "vfp", s->vfp, errp)) {
190 return;
191 }
192 }
193 if (object_property_find(OBJECT(s->cpu), "dsp")) {
194 if (!object_property_set_bool(OBJECT(s->cpu), "dsp", s->dsp, errp)) {
195 return;
196 }
197 }
198
199 /*
200 * Tell the CPU where the NVIC is; it will fail realize if it doesn't
201 * have one. Similarly, tell the NVIC where its CPU is.
202 */
203 s->cpu->env.nvic = &s->nvic;
204 s->nvic.cpu = s->cpu;
205
206 if (!qdev_realize(DEVICE(s->cpu), NULL, errp)) {
207 return;
208 }
209
210 /* Note that we must realize the NVIC after the CPU */
211 if (!sysbus_realize(SYS_BUS_DEVICE(&s->nvic), errp)) {
212 return;
213 }
214
215 /* Alias the NVIC's input and output GPIOs as our own so the board
216 * code can wire them up. (We do this in realize because the
217 * NVIC doesn't create the input GPIO array until realize.)
218 */
219 qdev_pass_gpios(DEVICE(&s->nvic), dev, NULL);
220 qdev_pass_gpios(DEVICE(&s->nvic), dev, "SYSRESETREQ");
221 qdev_pass_gpios(DEVICE(&s->nvic), dev, "NMI");
222
223 /* Wire the NVIC up to the CPU */
224 sbd = SYS_BUS_DEVICE(&s->nvic);
225 sysbus_connect_irq(sbd, 0,
226 qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ));
227
228 memory_region_add_subregion(&s->container, 0xe000e000,
229 sysbus_mmio_get_region(sbd, 0));
230
231 for (i = 0; i < ARRAY_SIZE(s->bitband); i++) {
232 if (s->enable_bitband) {
233 Object *obj = OBJECT(&s->bitband[i]);
234 SysBusDevice *sbd = SYS_BUS_DEVICE(&s->bitband[i]);
235
236 if (!object_property_set_int(obj, "base",
237 bitband_input_addr[i], errp)) {
238 return;
239 }
240 object_property_set_link(obj, "source-memory",
241 OBJECT(s->board_memory), &error_abort);
242 if (!sysbus_realize(SYS_BUS_DEVICE(obj), errp)) {
243 return;
244 }
245
246 memory_region_add_subregion(&s->container, bitband_output_addr[i],
247 sysbus_mmio_get_region(sbd, 0));
248 } else {
249 object_unparent(OBJECT(&s->bitband[i]));
250 }
251 }
252 }
253
254 static Property armv7m_properties[] = {
255 DEFINE_PROP_STRING("cpu-type", ARMv7MState, cpu_type),
256 DEFINE_PROP_LINK("memory", ARMv7MState, board_memory, TYPE_MEMORY_REGION,
257 MemoryRegion *),
258 DEFINE_PROP_LINK("idau", ARMv7MState, idau, TYPE_IDAU_INTERFACE, Object *),
259 DEFINE_PROP_UINT32("init-svtor", ARMv7MState, init_svtor, 0),
260 DEFINE_PROP_BOOL("enable-bitband", ARMv7MState, enable_bitband, false),
261 DEFINE_PROP_BOOL("start-powered-off", ARMv7MState, start_powered_off,
262 false),
263 DEFINE_PROP_BOOL("vfp", ARMv7MState, vfp, true),
264 DEFINE_PROP_BOOL("dsp", ARMv7MState, dsp, true),
265 DEFINE_PROP_END_OF_LIST(),
266 };
267
268 static void armv7m_class_init(ObjectClass *klass, void *data)
269 {
270 DeviceClass *dc = DEVICE_CLASS(klass);
271
272 dc->realize = armv7m_realize;
273 device_class_set_props(dc, armv7m_properties);
274 }
275
276 static const TypeInfo armv7m_info = {
277 .name = TYPE_ARMV7M,
278 .parent = TYPE_SYS_BUS_DEVICE,
279 .instance_size = sizeof(ARMv7MState),
280 .instance_init = armv7m_instance_init,
281 .class_init = armv7m_class_init,
282 };
283
284 static void armv7m_reset(void *opaque)
285 {
286 ARMCPU *cpu = opaque;
287
288 cpu_reset(CPU(cpu));
289 }
290
291 void armv7m_load_kernel(ARMCPU *cpu, const char *kernel_filename, int mem_size)
292 {
293 int image_size;
294 uint64_t entry;
295 int big_endian;
296 AddressSpace *as;
297 int asidx;
298 CPUState *cs = CPU(cpu);
299
300 #ifdef TARGET_WORDS_BIGENDIAN
301 big_endian = 1;
302 #else
303 big_endian = 0;
304 #endif
305
306 if (arm_feature(&cpu->env, ARM_FEATURE_EL3)) {
307 asidx = ARMASIdx_S;
308 } else {
309 asidx = ARMASIdx_NS;
310 }
311 as = cpu_get_address_space(cs, asidx);
312
313 if (kernel_filename) {
314 image_size = load_elf_as(kernel_filename, NULL, NULL, NULL,
315 &entry, NULL, NULL,
316 NULL, big_endian, EM_ARM, 1, 0, as);
317 if (image_size < 0) {
318 image_size = load_image_targphys_as(kernel_filename, 0,
319 mem_size, as);
320 }
321 if (image_size < 0) {
322 error_report("Could not load kernel '%s'", kernel_filename);
323 exit(1);
324 }
325 }
326
327 /* CPU objects (unlike devices) are not automatically reset on system
328 * reset, so we must always register a handler to do so. Unlike
329 * A-profile CPUs, we don't need to do anything special in the
330 * handler to arrange that it starts correctly.
331 * This is arguably the wrong place to do this, but it matches the
332 * way A-profile does it. Note that this means that every M profile
333 * board must call this function!
334 */
335 qemu_register_reset(armv7m_reset, cpu);
336 }
337
338 static Property bitband_properties[] = {
339 DEFINE_PROP_UINT32("base", BitBandState, base, 0),
340 DEFINE_PROP_LINK("source-memory", BitBandState, source_memory,
341 TYPE_MEMORY_REGION, MemoryRegion *),
342 DEFINE_PROP_END_OF_LIST(),
343 };
344
345 static void bitband_class_init(ObjectClass *klass, void *data)
346 {
347 DeviceClass *dc = DEVICE_CLASS(klass);
348
349 dc->realize = bitband_realize;
350 device_class_set_props(dc, bitband_properties);
351 }
352
353 static const TypeInfo bitband_info = {
354 .name = TYPE_BITBAND,
355 .parent = TYPE_SYS_BUS_DEVICE,
356 .instance_size = sizeof(BitBandState),
357 .instance_init = bitband_init,
358 .class_init = bitband_class_init,
359 };
360
361 static void armv7m_register_types(void)
362 {
363 type_register_static(&bitband_info);
364 type_register_static(&armv7m_info);
365 }
366
367 type_init(armv7m_register_types)