target-arm: Load ELF images with the correct machine type for CPU
[qemu.git] / hw / arm / boot.c
1 /*
2 * ARM kernel loader.
3 *
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
6 *
7 * This code is licensed under the GPL.
8 */
9
10 #include "config.h"
11 #include "hw/hw.h"
12 #include "hw/arm/arm.h"
13 #include "sysemu/sysemu.h"
14 #include "hw/boards.h"
15 #include "hw/loader.h"
16 #include "elf.h"
17 #include "sysemu/device_tree.h"
18 #include "qemu/config-file.h"
19 #include "exec/address-spaces.h"
20
21 /* Kernel boot protocol is specified in the kernel docs
22 * Documentation/arm/Booting and Documentation/arm64/booting.txt
23 * They have different preferred image load offsets from system RAM base.
24 */
25 #define KERNEL_ARGS_ADDR 0x100
26 #define KERNEL_LOAD_ADDR 0x00010000
27 #define KERNEL64_LOAD_ADDR 0x00080000
28
29 typedef enum {
30 FIXUP_NONE = 0, /* do nothing */
31 FIXUP_TERMINATOR, /* end of insns */
32 FIXUP_BOARDID, /* overwrite with board ID number */
33 FIXUP_ARGPTR, /* overwrite with pointer to kernel args */
34 FIXUP_ENTRYPOINT, /* overwrite with kernel entry point */
35 FIXUP_GIC_CPU_IF, /* overwrite with GIC CPU interface address */
36 FIXUP_BOOTREG, /* overwrite with boot register address */
37 FIXUP_DSB, /* overwrite with correct DSB insn for cpu */
38 FIXUP_MAX,
39 } FixupType;
40
41 typedef struct ARMInsnFixup {
42 uint32_t insn;
43 FixupType fixup;
44 } ARMInsnFixup;
45
46 static const ARMInsnFixup bootloader_aarch64[] = {
47 { 0x580000c0 }, /* ldr x0, arg ; Load the lower 32-bits of DTB */
48 { 0xaa1f03e1 }, /* mov x1, xzr */
49 { 0xaa1f03e2 }, /* mov x2, xzr */
50 { 0xaa1f03e3 }, /* mov x3, xzr */
51 { 0x58000084 }, /* ldr x4, entry ; Load the lower 32-bits of kernel entry */
52 { 0xd61f0080 }, /* br x4 ; Jump to the kernel entry point */
53 { 0, FIXUP_ARGPTR }, /* arg: .word @DTB Lower 32-bits */
54 { 0 }, /* .word @DTB Higher 32-bits */
55 { 0, FIXUP_ENTRYPOINT }, /* entry: .word @Kernel Entry Lower 32-bits */
56 { 0 }, /* .word @Kernel Entry Higher 32-bits */
57 { 0, FIXUP_TERMINATOR }
58 };
59
60 /* The worlds second smallest bootloader. Set r0-r2, then jump to kernel. */
61 static const ARMInsnFixup bootloader[] = {
62 { 0xe3a00000 }, /* mov r0, #0 */
63 { 0xe59f1004 }, /* ldr r1, [pc, #4] */
64 { 0xe59f2004 }, /* ldr r2, [pc, #4] */
65 { 0xe59ff004 }, /* ldr pc, [pc, #4] */
66 { 0, FIXUP_BOARDID },
67 { 0, FIXUP_ARGPTR },
68 { 0, FIXUP_ENTRYPOINT },
69 { 0, FIXUP_TERMINATOR }
70 };
71
72 /* Handling for secondary CPU boot in a multicore system.
73 * Unlike the uniprocessor/primary CPU boot, this is platform
74 * dependent. The default code here is based on the secondary
75 * CPU boot protocol used on realview/vexpress boards, with
76 * some parameterisation to increase its flexibility.
77 * QEMU platform models for which this code is not appropriate
78 * should override write_secondary_boot and secondary_cpu_reset_hook
79 * instead.
80 *
81 * This code enables the interrupt controllers for the secondary
82 * CPUs and then puts all the secondary CPUs into a loop waiting
83 * for an interprocessor interrupt and polling a configurable
84 * location for the kernel secondary CPU entry point.
85 */
86 #define DSB_INSN 0xf57ff04f
87 #define CP15_DSB_INSN 0xee070f9a /* mcr cp15, 0, r0, c7, c10, 4 */
88
89 static const ARMInsnFixup smpboot[] = {
90 { 0xe59f2028 }, /* ldr r2, gic_cpu_if */
91 { 0xe59f0028 }, /* ldr r0, bootreg_addr */
92 { 0xe3a01001 }, /* mov r1, #1 */
93 { 0xe5821000 }, /* str r1, [r2] - set GICC_CTLR.Enable */
94 { 0xe3a010ff }, /* mov r1, #0xff */
95 { 0xe5821004 }, /* str r1, [r2, 4] - set GIC_PMR.Priority to 0xff */
96 { 0, FIXUP_DSB }, /* dsb */
97 { 0xe320f003 }, /* wfi */
98 { 0xe5901000 }, /* ldr r1, [r0] */
99 { 0xe1110001 }, /* tst r1, r1 */
100 { 0x0afffffb }, /* beq <wfi> */
101 { 0xe12fff11 }, /* bx r1 */
102 { 0, FIXUP_GIC_CPU_IF }, /* gic_cpu_if: .word 0x.... */
103 { 0, FIXUP_BOOTREG }, /* bootreg_addr: .word 0x.... */
104 { 0, FIXUP_TERMINATOR }
105 };
106
107 static void write_bootloader(const char *name, hwaddr addr,
108 const ARMInsnFixup *insns, uint32_t *fixupcontext)
109 {
110 /* Fix up the specified bootloader fragment and write it into
111 * guest memory using rom_add_blob_fixed(). fixupcontext is
112 * an array giving the values to write in for the fixup types
113 * which write a value into the code array.
114 */
115 int i, len;
116 uint32_t *code;
117
118 len = 0;
119 while (insns[len].fixup != FIXUP_TERMINATOR) {
120 len++;
121 }
122
123 code = g_new0(uint32_t, len);
124
125 for (i = 0; i < len; i++) {
126 uint32_t insn = insns[i].insn;
127 FixupType fixup = insns[i].fixup;
128
129 switch (fixup) {
130 case FIXUP_NONE:
131 break;
132 case FIXUP_BOARDID:
133 case FIXUP_ARGPTR:
134 case FIXUP_ENTRYPOINT:
135 case FIXUP_GIC_CPU_IF:
136 case FIXUP_BOOTREG:
137 case FIXUP_DSB:
138 insn = fixupcontext[fixup];
139 break;
140 default:
141 abort();
142 }
143 code[i] = tswap32(insn);
144 }
145
146 rom_add_blob_fixed(name, code, len * sizeof(uint32_t), addr);
147
148 g_free(code);
149 }
150
151 static void default_write_secondary(ARMCPU *cpu,
152 const struct arm_boot_info *info)
153 {
154 uint32_t fixupcontext[FIXUP_MAX];
155
156 fixupcontext[FIXUP_GIC_CPU_IF] = info->gic_cpu_if_addr;
157 fixupcontext[FIXUP_BOOTREG] = info->smp_bootreg_addr;
158 if (arm_feature(&cpu->env, ARM_FEATURE_V7)) {
159 fixupcontext[FIXUP_DSB] = DSB_INSN;
160 } else {
161 fixupcontext[FIXUP_DSB] = CP15_DSB_INSN;
162 }
163
164 write_bootloader("smpboot", info->smp_loader_start,
165 smpboot, fixupcontext);
166 }
167
168 static void default_reset_secondary(ARMCPU *cpu,
169 const struct arm_boot_info *info)
170 {
171 CPUARMState *env = &cpu->env;
172
173 stl_phys_notdirty(&address_space_memory, info->smp_bootreg_addr, 0);
174 env->regs[15] = info->smp_loader_start;
175 }
176
177 static inline bool have_dtb(const struct arm_boot_info *info)
178 {
179 return info->dtb_filename || info->get_dtb;
180 }
181
182 #define WRITE_WORD(p, value) do { \
183 stl_phys_notdirty(&address_space_memory, p, value); \
184 p += 4; \
185 } while (0)
186
187 static void set_kernel_args(const struct arm_boot_info *info)
188 {
189 int initrd_size = info->initrd_size;
190 hwaddr base = info->loader_start;
191 hwaddr p;
192
193 p = base + KERNEL_ARGS_ADDR;
194 /* ATAG_CORE */
195 WRITE_WORD(p, 5);
196 WRITE_WORD(p, 0x54410001);
197 WRITE_WORD(p, 1);
198 WRITE_WORD(p, 0x1000);
199 WRITE_WORD(p, 0);
200 /* ATAG_MEM */
201 /* TODO: handle multiple chips on one ATAG list */
202 WRITE_WORD(p, 4);
203 WRITE_WORD(p, 0x54410002);
204 WRITE_WORD(p, info->ram_size);
205 WRITE_WORD(p, info->loader_start);
206 if (initrd_size) {
207 /* ATAG_INITRD2 */
208 WRITE_WORD(p, 4);
209 WRITE_WORD(p, 0x54420005);
210 WRITE_WORD(p, info->initrd_start);
211 WRITE_WORD(p, initrd_size);
212 }
213 if (info->kernel_cmdline && *info->kernel_cmdline) {
214 /* ATAG_CMDLINE */
215 int cmdline_size;
216
217 cmdline_size = strlen(info->kernel_cmdline);
218 cpu_physical_memory_write(p + 8, info->kernel_cmdline,
219 cmdline_size + 1);
220 cmdline_size = (cmdline_size >> 2) + 1;
221 WRITE_WORD(p, cmdline_size + 2);
222 WRITE_WORD(p, 0x54410009);
223 p += cmdline_size * 4;
224 }
225 if (info->atag_board) {
226 /* ATAG_BOARD */
227 int atag_board_len;
228 uint8_t atag_board_buf[0x1000];
229
230 atag_board_len = (info->atag_board(info, atag_board_buf) + 3) & ~3;
231 WRITE_WORD(p, (atag_board_len + 8) >> 2);
232 WRITE_WORD(p, 0x414f4d50);
233 cpu_physical_memory_write(p, atag_board_buf, atag_board_len);
234 p += atag_board_len;
235 }
236 /* ATAG_END */
237 WRITE_WORD(p, 0);
238 WRITE_WORD(p, 0);
239 }
240
241 static void set_kernel_args_old(const struct arm_boot_info *info)
242 {
243 hwaddr p;
244 const char *s;
245 int initrd_size = info->initrd_size;
246 hwaddr base = info->loader_start;
247
248 /* see linux/include/asm-arm/setup.h */
249 p = base + KERNEL_ARGS_ADDR;
250 /* page_size */
251 WRITE_WORD(p, 4096);
252 /* nr_pages */
253 WRITE_WORD(p, info->ram_size / 4096);
254 /* ramdisk_size */
255 WRITE_WORD(p, 0);
256 #define FLAG_READONLY 1
257 #define FLAG_RDLOAD 4
258 #define FLAG_RDPROMPT 8
259 /* flags */
260 WRITE_WORD(p, FLAG_READONLY | FLAG_RDLOAD | FLAG_RDPROMPT);
261 /* rootdev */
262 WRITE_WORD(p, (31 << 8) | 0); /* /dev/mtdblock0 */
263 /* video_num_cols */
264 WRITE_WORD(p, 0);
265 /* video_num_rows */
266 WRITE_WORD(p, 0);
267 /* video_x */
268 WRITE_WORD(p, 0);
269 /* video_y */
270 WRITE_WORD(p, 0);
271 /* memc_control_reg */
272 WRITE_WORD(p, 0);
273 /* unsigned char sounddefault */
274 /* unsigned char adfsdrives */
275 /* unsigned char bytes_per_char_h */
276 /* unsigned char bytes_per_char_v */
277 WRITE_WORD(p, 0);
278 /* pages_in_bank[4] */
279 WRITE_WORD(p, 0);
280 WRITE_WORD(p, 0);
281 WRITE_WORD(p, 0);
282 WRITE_WORD(p, 0);
283 /* pages_in_vram */
284 WRITE_WORD(p, 0);
285 /* initrd_start */
286 if (initrd_size) {
287 WRITE_WORD(p, info->initrd_start);
288 } else {
289 WRITE_WORD(p, 0);
290 }
291 /* initrd_size */
292 WRITE_WORD(p, initrd_size);
293 /* rd_start */
294 WRITE_WORD(p, 0);
295 /* system_rev */
296 WRITE_WORD(p, 0);
297 /* system_serial_low */
298 WRITE_WORD(p, 0);
299 /* system_serial_high */
300 WRITE_WORD(p, 0);
301 /* mem_fclk_21285 */
302 WRITE_WORD(p, 0);
303 /* zero unused fields */
304 while (p < base + KERNEL_ARGS_ADDR + 256 + 1024) {
305 WRITE_WORD(p, 0);
306 }
307 s = info->kernel_cmdline;
308 if (s) {
309 cpu_physical_memory_write(p, s, strlen(s) + 1);
310 } else {
311 WRITE_WORD(p, 0);
312 }
313 }
314
315 static int load_dtb(hwaddr addr, const struct arm_boot_info *binfo)
316 {
317 void *fdt = NULL;
318 int size, rc;
319 uint32_t acells, scells;
320
321 if (binfo->dtb_filename) {
322 char *filename;
323 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, binfo->dtb_filename);
324 if (!filename) {
325 fprintf(stderr, "Couldn't open dtb file %s\n", binfo->dtb_filename);
326 goto fail;
327 }
328
329 fdt = load_device_tree(filename, &size);
330 if (!fdt) {
331 fprintf(stderr, "Couldn't open dtb file %s\n", filename);
332 g_free(filename);
333 goto fail;
334 }
335 g_free(filename);
336 } else if (binfo->get_dtb) {
337 fdt = binfo->get_dtb(binfo, &size);
338 if (!fdt) {
339 fprintf(stderr, "Board was unable to create a dtb blob\n");
340 goto fail;
341 }
342 }
343
344 acells = qemu_fdt_getprop_cell(fdt, "/", "#address-cells");
345 scells = qemu_fdt_getprop_cell(fdt, "/", "#size-cells");
346 if (acells == 0 || scells == 0) {
347 fprintf(stderr, "dtb file invalid (#address-cells or #size-cells 0)\n");
348 goto fail;
349 }
350
351 if (scells < 2 && binfo->ram_size >= (1ULL << 32)) {
352 /* This is user error so deserves a friendlier error message
353 * than the failure of setprop_sized_cells would provide
354 */
355 fprintf(stderr, "qemu: dtb file not compatible with "
356 "RAM size > 4GB\n");
357 goto fail;
358 }
359
360 rc = qemu_fdt_setprop_sized_cells(fdt, "/memory", "reg",
361 acells, binfo->loader_start,
362 scells, binfo->ram_size);
363 if (rc < 0) {
364 fprintf(stderr, "couldn't set /memory/reg\n");
365 goto fail;
366 }
367
368 if (binfo->kernel_cmdline && *binfo->kernel_cmdline) {
369 rc = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs",
370 binfo->kernel_cmdline);
371 if (rc < 0) {
372 fprintf(stderr, "couldn't set /chosen/bootargs\n");
373 goto fail;
374 }
375 }
376
377 if (binfo->initrd_size) {
378 rc = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start",
379 binfo->initrd_start);
380 if (rc < 0) {
381 fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
382 goto fail;
383 }
384
385 rc = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end",
386 binfo->initrd_start + binfo->initrd_size);
387 if (rc < 0) {
388 fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
389 goto fail;
390 }
391 }
392
393 if (binfo->modify_dtb) {
394 binfo->modify_dtb(binfo, fdt);
395 }
396
397 qemu_fdt_dumpdtb(fdt, size);
398
399 cpu_physical_memory_write(addr, fdt, size);
400
401 g_free(fdt);
402
403 return 0;
404
405 fail:
406 g_free(fdt);
407 return -1;
408 }
409
410 static void do_cpu_reset(void *opaque)
411 {
412 ARMCPU *cpu = opaque;
413 CPUARMState *env = &cpu->env;
414 const struct arm_boot_info *info = env->boot_info;
415
416 cpu_reset(CPU(cpu));
417 if (info) {
418 if (!info->is_linux) {
419 /* Jump to the entry point. */
420 env->regs[15] = info->entry & 0xfffffffe;
421 env->thumb = info->entry & 1;
422 } else {
423 if (CPU(cpu) == first_cpu) {
424 if (env->aarch64) {
425 env->pc = info->loader_start;
426 } else {
427 env->regs[15] = info->loader_start;
428 }
429
430 if (!have_dtb(info)) {
431 if (old_param) {
432 set_kernel_args_old(info);
433 } else {
434 set_kernel_args(info);
435 }
436 }
437 } else {
438 info->secondary_cpu_reset_hook(cpu, info);
439 }
440 }
441 }
442 }
443
444 void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info)
445 {
446 CPUState *cs = CPU(cpu);
447 int kernel_size;
448 int initrd_size;
449 int is_linux = 0;
450 uint64_t elf_entry;
451 int elf_machine;
452 hwaddr entry, kernel_load_offset;
453 int big_endian;
454 static const ARMInsnFixup *primary_loader;
455
456 /* Load the kernel. */
457 if (!info->kernel_filename) {
458 /* If no kernel specified, do nothing; we will start from address 0
459 * (typically a boot ROM image) in the same way as hardware.
460 */
461 return;
462 }
463
464 if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
465 primary_loader = bootloader_aarch64;
466 kernel_load_offset = KERNEL64_LOAD_ADDR;
467 elf_machine = EM_AARCH64;
468 } else {
469 primary_loader = bootloader;
470 kernel_load_offset = KERNEL_LOAD_ADDR;
471 elf_machine = EM_ARM;
472 }
473
474 info->dtb_filename = qemu_opt_get(qemu_get_machine_opts(), "dtb");
475
476 if (!info->secondary_cpu_reset_hook) {
477 info->secondary_cpu_reset_hook = default_reset_secondary;
478 }
479 if (!info->write_secondary_boot) {
480 info->write_secondary_boot = default_write_secondary;
481 }
482
483 if (info->nb_cpus == 0)
484 info->nb_cpus = 1;
485
486 #ifdef TARGET_WORDS_BIGENDIAN
487 big_endian = 1;
488 #else
489 big_endian = 0;
490 #endif
491
492 /* We want to put the initrd far enough into RAM that when the
493 * kernel is uncompressed it will not clobber the initrd. However
494 * on boards without much RAM we must ensure that we still leave
495 * enough room for a decent sized initrd, and on boards with large
496 * amounts of RAM we must avoid the initrd being so far up in RAM
497 * that it is outside lowmem and inaccessible to the kernel.
498 * So for boards with less than 256MB of RAM we put the initrd
499 * halfway into RAM, and for boards with 256MB of RAM or more we put
500 * the initrd at 128MB.
501 */
502 info->initrd_start = info->loader_start +
503 MIN(info->ram_size / 2, 128 * 1024 * 1024);
504
505 /* Assume that raw images are linux kernels, and ELF images are not. */
506 kernel_size = load_elf(info->kernel_filename, NULL, NULL, &elf_entry,
507 NULL, NULL, big_endian, elf_machine, 1);
508 entry = elf_entry;
509 if (kernel_size < 0) {
510 kernel_size = load_uimage(info->kernel_filename, &entry, NULL,
511 &is_linux);
512 }
513 if (kernel_size < 0) {
514 entry = info->loader_start + kernel_load_offset;
515 kernel_size = load_image_targphys(info->kernel_filename, entry,
516 info->ram_size - kernel_load_offset);
517 is_linux = 1;
518 }
519 if (kernel_size < 0) {
520 fprintf(stderr, "qemu: could not load kernel '%s'\n",
521 info->kernel_filename);
522 exit(1);
523 }
524 info->entry = entry;
525 if (is_linux) {
526 uint32_t fixupcontext[FIXUP_MAX];
527
528 if (info->initrd_filename) {
529 initrd_size = load_ramdisk(info->initrd_filename,
530 info->initrd_start,
531 info->ram_size -
532 info->initrd_start);
533 if (initrd_size < 0) {
534 initrd_size = load_image_targphys(info->initrd_filename,
535 info->initrd_start,
536 info->ram_size -
537 info->initrd_start);
538 }
539 if (initrd_size < 0) {
540 fprintf(stderr, "qemu: could not load initrd '%s'\n",
541 info->initrd_filename);
542 exit(1);
543 }
544 } else {
545 initrd_size = 0;
546 }
547 info->initrd_size = initrd_size;
548
549 fixupcontext[FIXUP_BOARDID] = info->board_id;
550
551 /* for device tree boot, we pass the DTB directly in r2. Otherwise
552 * we point to the kernel args.
553 */
554 if (have_dtb(info)) {
555 /* Place the DTB after the initrd in memory. Note that some
556 * kernels will trash anything in the 4K page the initrd
557 * ends in, so make sure the DTB isn't caught up in that.
558 */
559 hwaddr dtb_start = QEMU_ALIGN_UP(info->initrd_start + initrd_size,
560 4096);
561 if (load_dtb(dtb_start, info)) {
562 exit(1);
563 }
564 fixupcontext[FIXUP_ARGPTR] = dtb_start;
565 } else {
566 fixupcontext[FIXUP_ARGPTR] = info->loader_start + KERNEL_ARGS_ADDR;
567 if (info->ram_size >= (1ULL << 32)) {
568 fprintf(stderr, "qemu: RAM size must be less than 4GB to boot"
569 " Linux kernel using ATAGS (try passing a device tree"
570 " using -dtb)\n");
571 exit(1);
572 }
573 }
574 fixupcontext[FIXUP_ENTRYPOINT] = entry;
575
576 write_bootloader("bootloader", info->loader_start,
577 primary_loader, fixupcontext);
578
579 if (info->nb_cpus > 1) {
580 info->write_secondary_boot(cpu, info);
581 }
582 }
583 info->is_linux = is_linux;
584
585 for (; cs; cs = CPU_NEXT(cs)) {
586 cpu = ARM_CPU(cs);
587 cpu->env.boot_info = info;
588 qemu_register_reset(do_cpu_reset, cpu);
589 }
590 }