hw/arm/boot: Increase fdt alignment
[qemu.git] / hw / arm / boot.c
1 /*
2 * ARM kernel loader.
3 *
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
6 *
7 * This code is licensed under the GPL.
8 */
9
10 #include "config.h"
11 #include "hw/hw.h"
12 #include "hw/arm/arm.h"
13 #include "sysemu/sysemu.h"
14 #include "hw/boards.h"
15 #include "hw/loader.h"
16 #include "elf.h"
17 #include "sysemu/device_tree.h"
18 #include "qemu/config-file.h"
19 #include "exec/address-spaces.h"
20
21 /* Kernel boot protocol is specified in the kernel docs
22 * Documentation/arm/Booting and Documentation/arm64/booting.txt
23 * They have different preferred image load offsets from system RAM base.
24 */
25 #define KERNEL_ARGS_ADDR 0x100
26 #define KERNEL_LOAD_ADDR 0x00010000
27 #define KERNEL64_LOAD_ADDR 0x00080000
28
29 typedef enum {
30 FIXUP_NONE = 0, /* do nothing */
31 FIXUP_TERMINATOR, /* end of insns */
32 FIXUP_BOARDID, /* overwrite with board ID number */
33 FIXUP_ARGPTR, /* overwrite with pointer to kernel args */
34 FIXUP_ENTRYPOINT, /* overwrite with kernel entry point */
35 FIXUP_GIC_CPU_IF, /* overwrite with GIC CPU interface address */
36 FIXUP_BOOTREG, /* overwrite with boot register address */
37 FIXUP_DSB, /* overwrite with correct DSB insn for cpu */
38 FIXUP_MAX,
39 } FixupType;
40
41 typedef struct ARMInsnFixup {
42 uint32_t insn;
43 FixupType fixup;
44 } ARMInsnFixup;
45
46 static const ARMInsnFixup bootloader_aarch64[] = {
47 { 0x580000c0 }, /* ldr x0, arg ; Load the lower 32-bits of DTB */
48 { 0xaa1f03e1 }, /* mov x1, xzr */
49 { 0xaa1f03e2 }, /* mov x2, xzr */
50 { 0xaa1f03e3 }, /* mov x3, xzr */
51 { 0x58000084 }, /* ldr x4, entry ; Load the lower 32-bits of kernel entry */
52 { 0xd61f0080 }, /* br x4 ; Jump to the kernel entry point */
53 { 0, FIXUP_ARGPTR }, /* arg: .word @DTB Lower 32-bits */
54 { 0 }, /* .word @DTB Higher 32-bits */
55 { 0, FIXUP_ENTRYPOINT }, /* entry: .word @Kernel Entry Lower 32-bits */
56 { 0 }, /* .word @Kernel Entry Higher 32-bits */
57 { 0, FIXUP_TERMINATOR }
58 };
59
60 /* The worlds second smallest bootloader. Set r0-r2, then jump to kernel. */
61 static const ARMInsnFixup bootloader[] = {
62 { 0xe3a00000 }, /* mov r0, #0 */
63 { 0xe59f1004 }, /* ldr r1, [pc, #4] */
64 { 0xe59f2004 }, /* ldr r2, [pc, #4] */
65 { 0xe59ff004 }, /* ldr pc, [pc, #4] */
66 { 0, FIXUP_BOARDID },
67 { 0, FIXUP_ARGPTR },
68 { 0, FIXUP_ENTRYPOINT },
69 { 0, FIXUP_TERMINATOR }
70 };
71
72 /* Handling for secondary CPU boot in a multicore system.
73 * Unlike the uniprocessor/primary CPU boot, this is platform
74 * dependent. The default code here is based on the secondary
75 * CPU boot protocol used on realview/vexpress boards, with
76 * some parameterisation to increase its flexibility.
77 * QEMU platform models for which this code is not appropriate
78 * should override write_secondary_boot and secondary_cpu_reset_hook
79 * instead.
80 *
81 * This code enables the interrupt controllers for the secondary
82 * CPUs and then puts all the secondary CPUs into a loop waiting
83 * for an interprocessor interrupt and polling a configurable
84 * location for the kernel secondary CPU entry point.
85 */
86 #define DSB_INSN 0xf57ff04f
87 #define CP15_DSB_INSN 0xee070f9a /* mcr cp15, 0, r0, c7, c10, 4 */
88
89 static const ARMInsnFixup smpboot[] = {
90 { 0xe59f2028 }, /* ldr r2, gic_cpu_if */
91 { 0xe59f0028 }, /* ldr r0, bootreg_addr */
92 { 0xe3a01001 }, /* mov r1, #1 */
93 { 0xe5821000 }, /* str r1, [r2] - set GICC_CTLR.Enable */
94 { 0xe3a010ff }, /* mov r1, #0xff */
95 { 0xe5821004 }, /* str r1, [r2, 4] - set GIC_PMR.Priority to 0xff */
96 { 0, FIXUP_DSB }, /* dsb */
97 { 0xe320f003 }, /* wfi */
98 { 0xe5901000 }, /* ldr r1, [r0] */
99 { 0xe1110001 }, /* tst r1, r1 */
100 { 0x0afffffb }, /* beq <wfi> */
101 { 0xe12fff11 }, /* bx r1 */
102 { 0, FIXUP_GIC_CPU_IF }, /* gic_cpu_if: .word 0x.... */
103 { 0, FIXUP_BOOTREG }, /* bootreg_addr: .word 0x.... */
104 { 0, FIXUP_TERMINATOR }
105 };
106
107 static void write_bootloader(const char *name, hwaddr addr,
108 const ARMInsnFixup *insns, uint32_t *fixupcontext)
109 {
110 /* Fix up the specified bootloader fragment and write it into
111 * guest memory using rom_add_blob_fixed(). fixupcontext is
112 * an array giving the values to write in for the fixup types
113 * which write a value into the code array.
114 */
115 int i, len;
116 uint32_t *code;
117
118 len = 0;
119 while (insns[len].fixup != FIXUP_TERMINATOR) {
120 len++;
121 }
122
123 code = g_new0(uint32_t, len);
124
125 for (i = 0; i < len; i++) {
126 uint32_t insn = insns[i].insn;
127 FixupType fixup = insns[i].fixup;
128
129 switch (fixup) {
130 case FIXUP_NONE:
131 break;
132 case FIXUP_BOARDID:
133 case FIXUP_ARGPTR:
134 case FIXUP_ENTRYPOINT:
135 case FIXUP_GIC_CPU_IF:
136 case FIXUP_BOOTREG:
137 case FIXUP_DSB:
138 insn = fixupcontext[fixup];
139 break;
140 default:
141 abort();
142 }
143 code[i] = tswap32(insn);
144 }
145
146 rom_add_blob_fixed(name, code, len * sizeof(uint32_t), addr);
147
148 g_free(code);
149 }
150
151 static void default_write_secondary(ARMCPU *cpu,
152 const struct arm_boot_info *info)
153 {
154 uint32_t fixupcontext[FIXUP_MAX];
155
156 fixupcontext[FIXUP_GIC_CPU_IF] = info->gic_cpu_if_addr;
157 fixupcontext[FIXUP_BOOTREG] = info->smp_bootreg_addr;
158 if (arm_feature(&cpu->env, ARM_FEATURE_V7)) {
159 fixupcontext[FIXUP_DSB] = DSB_INSN;
160 } else {
161 fixupcontext[FIXUP_DSB] = CP15_DSB_INSN;
162 }
163
164 write_bootloader("smpboot", info->smp_loader_start,
165 smpboot, fixupcontext);
166 }
167
168 static void default_reset_secondary(ARMCPU *cpu,
169 const struct arm_boot_info *info)
170 {
171 CPUState *cs = CPU(cpu);
172
173 address_space_stl_notdirty(&address_space_memory, info->smp_bootreg_addr,
174 0, MEMTXATTRS_UNSPECIFIED, NULL);
175 cpu_set_pc(cs, info->smp_loader_start);
176 }
177
178 static inline bool have_dtb(const struct arm_boot_info *info)
179 {
180 return info->dtb_filename || info->get_dtb;
181 }
182
183 #define WRITE_WORD(p, value) do { \
184 address_space_stl_notdirty(&address_space_memory, p, value, \
185 MEMTXATTRS_UNSPECIFIED, NULL); \
186 p += 4; \
187 } while (0)
188
189 static void set_kernel_args(const struct arm_boot_info *info)
190 {
191 int initrd_size = info->initrd_size;
192 hwaddr base = info->loader_start;
193 hwaddr p;
194
195 p = base + KERNEL_ARGS_ADDR;
196 /* ATAG_CORE */
197 WRITE_WORD(p, 5);
198 WRITE_WORD(p, 0x54410001);
199 WRITE_WORD(p, 1);
200 WRITE_WORD(p, 0x1000);
201 WRITE_WORD(p, 0);
202 /* ATAG_MEM */
203 /* TODO: handle multiple chips on one ATAG list */
204 WRITE_WORD(p, 4);
205 WRITE_WORD(p, 0x54410002);
206 WRITE_WORD(p, info->ram_size);
207 WRITE_WORD(p, info->loader_start);
208 if (initrd_size) {
209 /* ATAG_INITRD2 */
210 WRITE_WORD(p, 4);
211 WRITE_WORD(p, 0x54420005);
212 WRITE_WORD(p, info->initrd_start);
213 WRITE_WORD(p, initrd_size);
214 }
215 if (info->kernel_cmdline && *info->kernel_cmdline) {
216 /* ATAG_CMDLINE */
217 int cmdline_size;
218
219 cmdline_size = strlen(info->kernel_cmdline);
220 cpu_physical_memory_write(p + 8, info->kernel_cmdline,
221 cmdline_size + 1);
222 cmdline_size = (cmdline_size >> 2) + 1;
223 WRITE_WORD(p, cmdline_size + 2);
224 WRITE_WORD(p, 0x54410009);
225 p += cmdline_size * 4;
226 }
227 if (info->atag_board) {
228 /* ATAG_BOARD */
229 int atag_board_len;
230 uint8_t atag_board_buf[0x1000];
231
232 atag_board_len = (info->atag_board(info, atag_board_buf) + 3) & ~3;
233 WRITE_WORD(p, (atag_board_len + 8) >> 2);
234 WRITE_WORD(p, 0x414f4d50);
235 cpu_physical_memory_write(p, atag_board_buf, atag_board_len);
236 p += atag_board_len;
237 }
238 /* ATAG_END */
239 WRITE_WORD(p, 0);
240 WRITE_WORD(p, 0);
241 }
242
243 static void set_kernel_args_old(const struct arm_boot_info *info)
244 {
245 hwaddr p;
246 const char *s;
247 int initrd_size = info->initrd_size;
248 hwaddr base = info->loader_start;
249
250 /* see linux/include/asm-arm/setup.h */
251 p = base + KERNEL_ARGS_ADDR;
252 /* page_size */
253 WRITE_WORD(p, 4096);
254 /* nr_pages */
255 WRITE_WORD(p, info->ram_size / 4096);
256 /* ramdisk_size */
257 WRITE_WORD(p, 0);
258 #define FLAG_READONLY 1
259 #define FLAG_RDLOAD 4
260 #define FLAG_RDPROMPT 8
261 /* flags */
262 WRITE_WORD(p, FLAG_READONLY | FLAG_RDLOAD | FLAG_RDPROMPT);
263 /* rootdev */
264 WRITE_WORD(p, (31 << 8) | 0); /* /dev/mtdblock0 */
265 /* video_num_cols */
266 WRITE_WORD(p, 0);
267 /* video_num_rows */
268 WRITE_WORD(p, 0);
269 /* video_x */
270 WRITE_WORD(p, 0);
271 /* video_y */
272 WRITE_WORD(p, 0);
273 /* memc_control_reg */
274 WRITE_WORD(p, 0);
275 /* unsigned char sounddefault */
276 /* unsigned char adfsdrives */
277 /* unsigned char bytes_per_char_h */
278 /* unsigned char bytes_per_char_v */
279 WRITE_WORD(p, 0);
280 /* pages_in_bank[4] */
281 WRITE_WORD(p, 0);
282 WRITE_WORD(p, 0);
283 WRITE_WORD(p, 0);
284 WRITE_WORD(p, 0);
285 /* pages_in_vram */
286 WRITE_WORD(p, 0);
287 /* initrd_start */
288 if (initrd_size) {
289 WRITE_WORD(p, info->initrd_start);
290 } else {
291 WRITE_WORD(p, 0);
292 }
293 /* initrd_size */
294 WRITE_WORD(p, initrd_size);
295 /* rd_start */
296 WRITE_WORD(p, 0);
297 /* system_rev */
298 WRITE_WORD(p, 0);
299 /* system_serial_low */
300 WRITE_WORD(p, 0);
301 /* system_serial_high */
302 WRITE_WORD(p, 0);
303 /* mem_fclk_21285 */
304 WRITE_WORD(p, 0);
305 /* zero unused fields */
306 while (p < base + KERNEL_ARGS_ADDR + 256 + 1024) {
307 WRITE_WORD(p, 0);
308 }
309 s = info->kernel_cmdline;
310 if (s) {
311 cpu_physical_memory_write(p, s, strlen(s) + 1);
312 } else {
313 WRITE_WORD(p, 0);
314 }
315 }
316
317 /**
318 * load_dtb() - load a device tree binary image into memory
319 * @addr: the address to load the image at
320 * @binfo: struct describing the boot environment
321 * @addr_limit: upper limit of the available memory area at @addr
322 *
323 * Load a device tree supplied by the machine or by the user with the
324 * '-dtb' command line option, and put it at offset @addr in target
325 * memory.
326 *
327 * If @addr_limit contains a meaningful value (i.e., it is strictly greater
328 * than @addr), the device tree is only loaded if its size does not exceed
329 * the limit.
330 *
331 * Returns: the size of the device tree image on success,
332 * 0 if the image size exceeds the limit,
333 * -1 on errors.
334 *
335 * Note: Must not be called unless have_dtb(binfo) is true.
336 */
337 static int load_dtb(hwaddr addr, const struct arm_boot_info *binfo,
338 hwaddr addr_limit)
339 {
340 void *fdt = NULL;
341 int size, rc;
342 uint32_t acells, scells;
343
344 if (binfo->dtb_filename) {
345 char *filename;
346 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, binfo->dtb_filename);
347 if (!filename) {
348 fprintf(stderr, "Couldn't open dtb file %s\n", binfo->dtb_filename);
349 goto fail;
350 }
351
352 fdt = load_device_tree(filename, &size);
353 if (!fdt) {
354 fprintf(stderr, "Couldn't open dtb file %s\n", filename);
355 g_free(filename);
356 goto fail;
357 }
358 g_free(filename);
359 } else {
360 fdt = binfo->get_dtb(binfo, &size);
361 if (!fdt) {
362 fprintf(stderr, "Board was unable to create a dtb blob\n");
363 goto fail;
364 }
365 }
366
367 if (addr_limit > addr && size > (addr_limit - addr)) {
368 /* Installing the device tree blob at addr would exceed addr_limit.
369 * Whether this constitutes failure is up to the caller to decide,
370 * so just return 0 as size, i.e., no error.
371 */
372 g_free(fdt);
373 return 0;
374 }
375
376 acells = qemu_fdt_getprop_cell(fdt, "/", "#address-cells");
377 scells = qemu_fdt_getprop_cell(fdt, "/", "#size-cells");
378 if (acells == 0 || scells == 0) {
379 fprintf(stderr, "dtb file invalid (#address-cells or #size-cells 0)\n");
380 goto fail;
381 }
382
383 if (scells < 2 && binfo->ram_size >= (1ULL << 32)) {
384 /* This is user error so deserves a friendlier error message
385 * than the failure of setprop_sized_cells would provide
386 */
387 fprintf(stderr, "qemu: dtb file not compatible with "
388 "RAM size > 4GB\n");
389 goto fail;
390 }
391
392 rc = qemu_fdt_setprop_sized_cells(fdt, "/memory", "reg",
393 acells, binfo->loader_start,
394 scells, binfo->ram_size);
395 if (rc < 0) {
396 fprintf(stderr, "couldn't set /memory/reg\n");
397 goto fail;
398 }
399
400 if (binfo->kernel_cmdline && *binfo->kernel_cmdline) {
401 rc = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs",
402 binfo->kernel_cmdline);
403 if (rc < 0) {
404 fprintf(stderr, "couldn't set /chosen/bootargs\n");
405 goto fail;
406 }
407 }
408
409 if (binfo->initrd_size) {
410 rc = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start",
411 binfo->initrd_start);
412 if (rc < 0) {
413 fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
414 goto fail;
415 }
416
417 rc = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end",
418 binfo->initrd_start + binfo->initrd_size);
419 if (rc < 0) {
420 fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
421 goto fail;
422 }
423 }
424
425 if (binfo->modify_dtb) {
426 binfo->modify_dtb(binfo, fdt);
427 }
428
429 qemu_fdt_dumpdtb(fdt, size);
430
431 /* Put the DTB into the memory map as a ROM image: this will ensure
432 * the DTB is copied again upon reset, even if addr points into RAM.
433 */
434 rom_add_blob_fixed("dtb", fdt, size, addr);
435
436 g_free(fdt);
437
438 return size;
439
440 fail:
441 g_free(fdt);
442 return -1;
443 }
444
445 static void do_cpu_reset(void *opaque)
446 {
447 ARMCPU *cpu = opaque;
448 CPUState *cs = CPU(cpu);
449 CPUARMState *env = &cpu->env;
450 const struct arm_boot_info *info = env->boot_info;
451
452 cpu_reset(cs);
453 if (info) {
454 if (!info->is_linux) {
455 /* Jump to the entry point. */
456 uint64_t entry = info->entry;
457
458 if (!env->aarch64) {
459 env->thumb = info->entry & 1;
460 entry &= 0xfffffffe;
461 }
462 cpu_set_pc(cs, entry);
463 } else {
464 /* If we are booting Linux then we need to check whether we are
465 * booting into secure or non-secure state and adjust the state
466 * accordingly. Out of reset, ARM is defined to be in secure state
467 * (SCR.NS = 0), we change that here if non-secure boot has been
468 * requested.
469 */
470 if (arm_feature(env, ARM_FEATURE_EL3)) {
471 /* AArch64 is defined to come out of reset into EL3 if enabled.
472 * If we are booting Linux then we need to adjust our EL as
473 * Linux expects us to be in EL2 or EL1. AArch32 resets into
474 * SVC, which Linux expects, so no privilege/exception level to
475 * adjust.
476 */
477 if (env->aarch64) {
478 if (arm_feature(env, ARM_FEATURE_EL2)) {
479 env->pstate = PSTATE_MODE_EL2h;
480 } else {
481 env->pstate = PSTATE_MODE_EL1h;
482 }
483 }
484
485 /* Set to non-secure if not a secure boot */
486 if (!info->secure_boot) {
487 /* Linux expects non-secure state */
488 env->cp15.scr_el3 |= SCR_NS;
489 }
490 }
491
492 if (cs == first_cpu) {
493 cpu_set_pc(cs, info->loader_start);
494
495 if (!have_dtb(info)) {
496 if (old_param) {
497 set_kernel_args_old(info);
498 } else {
499 set_kernel_args(info);
500 }
501 }
502 } else {
503 info->secondary_cpu_reset_hook(cpu, info);
504 }
505 }
506 }
507 }
508
509 /**
510 * load_image_to_fw_cfg() - Load an image file into an fw_cfg entry identified
511 * by key.
512 * @fw_cfg: The firmware config instance to store the data in.
513 * @size_key: The firmware config key to store the size of the loaded
514 * data under, with fw_cfg_add_i32().
515 * @data_key: The firmware config key to store the loaded data under,
516 * with fw_cfg_add_bytes().
517 * @image_name: The name of the image file to load. If it is NULL, the
518 * function returns without doing anything.
519 * @try_decompress: Whether the image should be decompressed (gunzipped) before
520 * adding it to fw_cfg. If decompression fails, the image is
521 * loaded as-is.
522 *
523 * In case of failure, the function prints an error message to stderr and the
524 * process exits with status 1.
525 */
526 static void load_image_to_fw_cfg(FWCfgState *fw_cfg, uint16_t size_key,
527 uint16_t data_key, const char *image_name,
528 bool try_decompress)
529 {
530 size_t size = -1;
531 uint8_t *data;
532
533 if (image_name == NULL) {
534 return;
535 }
536
537 if (try_decompress) {
538 size = load_image_gzipped_buffer(image_name,
539 LOAD_IMAGE_MAX_GUNZIP_BYTES, &data);
540 }
541
542 if (size == (size_t)-1) {
543 gchar *contents;
544 gsize length;
545
546 if (!g_file_get_contents(image_name, &contents, &length, NULL)) {
547 fprintf(stderr, "failed to load \"%s\"\n", image_name);
548 exit(1);
549 }
550 size = length;
551 data = (uint8_t *)contents;
552 }
553
554 fw_cfg_add_i32(fw_cfg, size_key, size);
555 fw_cfg_add_bytes(fw_cfg, data_key, data, size);
556 }
557
558 static void arm_load_kernel_notify(Notifier *notifier, void *data)
559 {
560 CPUState *cs;
561 int kernel_size;
562 int initrd_size;
563 int is_linux = 0;
564 uint64_t elf_entry, elf_low_addr, elf_high_addr;
565 int elf_machine;
566 hwaddr entry, kernel_load_offset;
567 int big_endian;
568 static const ARMInsnFixup *primary_loader;
569 ArmLoadKernelNotifier *n = DO_UPCAST(ArmLoadKernelNotifier,
570 notifier, notifier);
571 ARMCPU *cpu = n->cpu;
572 struct arm_boot_info *info =
573 container_of(n, struct arm_boot_info, load_kernel_notifier);
574
575 /* Load the kernel. */
576 if (!info->kernel_filename || info->firmware_loaded) {
577
578 if (have_dtb(info)) {
579 /* If we have a device tree blob, but no kernel to supply it to (or
580 * the kernel is supposed to be loaded by the bootloader), copy the
581 * DTB to the base of RAM for the bootloader to pick up.
582 */
583 if (load_dtb(info->loader_start, info, 0) < 0) {
584 exit(1);
585 }
586 }
587
588 if (info->kernel_filename) {
589 FWCfgState *fw_cfg;
590 bool try_decompressing_kernel;
591
592 fw_cfg = fw_cfg_find();
593 try_decompressing_kernel = arm_feature(&cpu->env,
594 ARM_FEATURE_AARCH64);
595
596 /* Expose the kernel, the command line, and the initrd in fw_cfg.
597 * We don't process them here at all, it's all left to the
598 * firmware.
599 */
600 load_image_to_fw_cfg(fw_cfg,
601 FW_CFG_KERNEL_SIZE, FW_CFG_KERNEL_DATA,
602 info->kernel_filename,
603 try_decompressing_kernel);
604 load_image_to_fw_cfg(fw_cfg,
605 FW_CFG_INITRD_SIZE, FW_CFG_INITRD_DATA,
606 info->initrd_filename, false);
607
608 if (info->kernel_cmdline) {
609 fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
610 strlen(info->kernel_cmdline) + 1);
611 fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA,
612 info->kernel_cmdline);
613 }
614 }
615
616 /* We will start from address 0 (typically a boot ROM image) in the
617 * same way as hardware.
618 */
619 return;
620 }
621
622 if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
623 primary_loader = bootloader_aarch64;
624 kernel_load_offset = KERNEL64_LOAD_ADDR;
625 elf_machine = EM_AARCH64;
626 } else {
627 primary_loader = bootloader;
628 kernel_load_offset = KERNEL_LOAD_ADDR;
629 elf_machine = EM_ARM;
630 }
631
632 info->dtb_filename = qemu_opt_get(qemu_get_machine_opts(), "dtb");
633
634 if (!info->secondary_cpu_reset_hook) {
635 info->secondary_cpu_reset_hook = default_reset_secondary;
636 }
637 if (!info->write_secondary_boot) {
638 info->write_secondary_boot = default_write_secondary;
639 }
640
641 if (info->nb_cpus == 0)
642 info->nb_cpus = 1;
643
644 #ifdef TARGET_WORDS_BIGENDIAN
645 big_endian = 1;
646 #else
647 big_endian = 0;
648 #endif
649
650 /* We want to put the initrd far enough into RAM that when the
651 * kernel is uncompressed it will not clobber the initrd. However
652 * on boards without much RAM we must ensure that we still leave
653 * enough room for a decent sized initrd, and on boards with large
654 * amounts of RAM we must avoid the initrd being so far up in RAM
655 * that it is outside lowmem and inaccessible to the kernel.
656 * So for boards with less than 256MB of RAM we put the initrd
657 * halfway into RAM, and for boards with 256MB of RAM or more we put
658 * the initrd at 128MB.
659 */
660 info->initrd_start = info->loader_start +
661 MIN(info->ram_size / 2, 128 * 1024 * 1024);
662
663 /* Assume that raw images are linux kernels, and ELF images are not. */
664 kernel_size = load_elf(info->kernel_filename, NULL, NULL, &elf_entry,
665 &elf_low_addr, &elf_high_addr, big_endian,
666 elf_machine, 1);
667 if (kernel_size > 0 && have_dtb(info)) {
668 /* If there is still some room left at the base of RAM, try and put
669 * the DTB there like we do for images loaded with -bios or -pflash.
670 */
671 if (elf_low_addr > info->loader_start
672 || elf_high_addr < info->loader_start) {
673 /* Pass elf_low_addr as address limit to load_dtb if it may be
674 * pointing into RAM, otherwise pass '0' (no limit)
675 */
676 if (elf_low_addr < info->loader_start) {
677 elf_low_addr = 0;
678 }
679 if (load_dtb(info->loader_start, info, elf_low_addr) < 0) {
680 exit(1);
681 }
682 }
683 }
684 entry = elf_entry;
685 if (kernel_size < 0) {
686 kernel_size = load_uimage(info->kernel_filename, &entry, NULL,
687 &is_linux, NULL, NULL);
688 }
689 /* On aarch64, it's the bootloader's job to uncompress the kernel. */
690 if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64) && kernel_size < 0) {
691 entry = info->loader_start + kernel_load_offset;
692 kernel_size = load_image_gzipped(info->kernel_filename, entry,
693 info->ram_size - kernel_load_offset);
694 is_linux = 1;
695 }
696 if (kernel_size < 0) {
697 entry = info->loader_start + kernel_load_offset;
698 kernel_size = load_image_targphys(info->kernel_filename, entry,
699 info->ram_size - kernel_load_offset);
700 is_linux = 1;
701 }
702 if (kernel_size < 0) {
703 fprintf(stderr, "qemu: could not load kernel '%s'\n",
704 info->kernel_filename);
705 exit(1);
706 }
707 info->entry = entry;
708 if (is_linux) {
709 uint32_t fixupcontext[FIXUP_MAX];
710
711 if (info->initrd_filename) {
712 initrd_size = load_ramdisk(info->initrd_filename,
713 info->initrd_start,
714 info->ram_size -
715 info->initrd_start);
716 if (initrd_size < 0) {
717 initrd_size = load_image_targphys(info->initrd_filename,
718 info->initrd_start,
719 info->ram_size -
720 info->initrd_start);
721 }
722 if (initrd_size < 0) {
723 fprintf(stderr, "qemu: could not load initrd '%s'\n",
724 info->initrd_filename);
725 exit(1);
726 }
727 } else {
728 initrd_size = 0;
729 }
730 info->initrd_size = initrd_size;
731
732 fixupcontext[FIXUP_BOARDID] = info->board_id;
733
734 /* for device tree boot, we pass the DTB directly in r2. Otherwise
735 * we point to the kernel args.
736 */
737 if (have_dtb(info)) {
738 hwaddr align;
739 hwaddr dtb_start;
740
741 if (elf_machine == EM_AARCH64) {
742 /*
743 * Some AArch64 kernels on early bootup map the fdt region as
744 *
745 * [ ALIGN_DOWN(fdt, 2MB) ... ALIGN_DOWN(fdt, 2MB) + 2MB ]
746 *
747 * Let's play safe and prealign it to 2MB to give us some space.
748 */
749 align = 2 * 1024 * 1024;
750 } else {
751 /*
752 * Some 32bit kernels will trash anything in the 4K page the
753 * initrd ends in, so make sure the DTB isn't caught up in that.
754 */
755 align = 4096;
756 }
757
758 /* Place the DTB after the initrd in memory with alignment. */
759 dtb_start = QEMU_ALIGN_UP(info->initrd_start + initrd_size, align);
760 if (load_dtb(dtb_start, info, 0) < 0) {
761 exit(1);
762 }
763 fixupcontext[FIXUP_ARGPTR] = dtb_start;
764 } else {
765 fixupcontext[FIXUP_ARGPTR] = info->loader_start + KERNEL_ARGS_ADDR;
766 if (info->ram_size >= (1ULL << 32)) {
767 fprintf(stderr, "qemu: RAM size must be less than 4GB to boot"
768 " Linux kernel using ATAGS (try passing a device tree"
769 " using -dtb)\n");
770 exit(1);
771 }
772 }
773 fixupcontext[FIXUP_ENTRYPOINT] = entry;
774
775 write_bootloader("bootloader", info->loader_start,
776 primary_loader, fixupcontext);
777
778 if (info->nb_cpus > 1) {
779 info->write_secondary_boot(cpu, info);
780 }
781 }
782 info->is_linux = is_linux;
783
784 for (cs = CPU(cpu); cs; cs = CPU_NEXT(cs)) {
785 ARM_CPU(cs)->env.boot_info = info;
786 }
787 }
788
789 void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info)
790 {
791 CPUState *cs;
792
793 info->load_kernel_notifier.cpu = cpu;
794 info->load_kernel_notifier.notifier.notify = arm_load_kernel_notify;
795 qemu_add_machine_init_done_notifier(&info->load_kernel_notifier.notifier);
796
797 /* CPU objects (unlike devices) are not automatically reset on system
798 * reset, so we must always register a handler to do so. If we're
799 * actually loading a kernel, the handler is also responsible for
800 * arranging that we start it correctly.
801 */
802 for (cs = CPU(cpu); cs; cs = CPU_NEXT(cs)) {
803 qemu_register_reset(do_cpu_reset, ARM_CPU(cs));
804 }
805 }