Merge tag 'seabios-20211203-pull-request' of git://git.kraxel.org/qemu into staging
[qemu.git] / hw / arm / omap_sx1.c
1 /* omap_sx1.c Support for the Siemens SX1 smartphone emulation.
2 *
3 * Copyright (C) 2008
4 * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 * Copyright (C) 2007 Vladimir Ananiev <vovan888@gmail.com>
6 *
7 * based on PalmOne's (TM) PDAs support (palm.c)
8 */
9
10 /*
11 * PalmOne's (TM) PDAs.
12 *
13 * Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, see <http://www.gnu.org/licenses/>.
27 */
28 #include "qemu/osdep.h"
29 #include "qapi/error.h"
30 #include "ui/console.h"
31 #include "hw/arm/omap.h"
32 #include "hw/boards.h"
33 #include "hw/arm/boot.h"
34 #include "hw/block/flash.h"
35 #include "sysemu/qtest.h"
36 #include "exec/address-spaces.h"
37 #include "cpu.h"
38 #include "qemu/cutils.h"
39
40 /*****************************************************************************/
41 /* Siemens SX1 Cellphone V1 */
42 /* - ARM OMAP310 processor
43 * - SRAM 192 kB
44 * - SDRAM 32 MB at 0x10000000
45 * - Boot flash 16 MB at 0x00000000
46 * - Application flash 8 MB at 0x04000000
47 * - 3 serial ports
48 * - 1 SecureDigital
49 * - 1 LCD display
50 * - 1 RTC
51 */
52
53 /*****************************************************************************/
54 /* Siemens SX1 Cellphone V2 */
55 /* - ARM OMAP310 processor
56 * - SRAM 192 kB
57 * - SDRAM 32 MB at 0x10000000
58 * - Boot flash 32 MB at 0x00000000
59 * - 3 serial ports
60 * - 1 SecureDigital
61 * - 1 LCD display
62 * - 1 RTC
63 */
64
65 static uint64_t static_read(void *opaque, hwaddr offset,
66 unsigned size)
67 {
68 uint32_t *val = (uint32_t *) opaque;
69 uint32_t mask = (4 / size) - 1;
70
71 return *val >> ((offset & mask) << 3);
72 }
73
74 static void static_write(void *opaque, hwaddr offset,
75 uint64_t value, unsigned size)
76 {
77 #ifdef SPY
78 printf("%s: value %" PRIx64 " %u bytes written at 0x%x\n",
79 __func__, value, size, (int)offset);
80 #endif
81 }
82
83 static const MemoryRegionOps static_ops = {
84 .read = static_read,
85 .write = static_write,
86 .endianness = DEVICE_NATIVE_ENDIAN,
87 };
88
89 #define sdram_size 0x02000000
90 #define sector_size (128 * 1024)
91 #define flash0_size (16 * 1024 * 1024)
92 #define flash1_size ( 8 * 1024 * 1024)
93 #define flash2_size (32 * 1024 * 1024)
94 #define total_ram_v1 (sdram_size + flash0_size + flash1_size + OMAP15XX_SRAM_SIZE)
95 #define total_ram_v2 (sdram_size + flash2_size + OMAP15XX_SRAM_SIZE)
96
97 static struct arm_boot_info sx1_binfo = {
98 .loader_start = OMAP_EMIFF_BASE,
99 .ram_size = sdram_size,
100 .board_id = 0x265,
101 };
102
103 static void sx1_init(MachineState *machine, const int version)
104 {
105 struct omap_mpu_state_s *mpu;
106 MachineClass *mc = MACHINE_GET_CLASS(machine);
107 MemoryRegion *address_space = get_system_memory();
108 MemoryRegion *flash = g_new(MemoryRegion, 1);
109 MemoryRegion *cs = g_new(MemoryRegion, 4);
110 static uint32_t cs0val = 0x00213090;
111 static uint32_t cs1val = 0x00215070;
112 static uint32_t cs2val = 0x00001139;
113 static uint32_t cs3val = 0x00001139;
114 DriveInfo *dinfo;
115 int fl_idx;
116 uint32_t flash_size = flash0_size;
117
118 if (machine->ram_size != mc->default_ram_size) {
119 char *sz = size_to_str(mc->default_ram_size);
120 error_report("Invalid RAM size, should be %s", sz);
121 g_free(sz);
122 exit(EXIT_FAILURE);
123 }
124
125 if (version == 2) {
126 flash_size = flash2_size;
127 }
128
129 memory_region_add_subregion(address_space, OMAP_EMIFF_BASE, machine->ram);
130
131 mpu = omap310_mpu_init(machine->ram, machine->cpu_type);
132
133 /* External Flash (EMIFS) */
134 memory_region_init_rom(flash, NULL, "omap_sx1.flash0-0", flash_size,
135 &error_fatal);
136 memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash);
137
138 memory_region_init_io(&cs[0], NULL, &static_ops, &cs0val,
139 "sx1.cs0", OMAP_CS0_SIZE - flash_size);
140 memory_region_add_subregion(address_space,
141 OMAP_CS0_BASE + flash_size, &cs[0]);
142
143
144 memory_region_init_io(&cs[2], NULL, &static_ops, &cs2val,
145 "sx1.cs2", OMAP_CS2_SIZE);
146 memory_region_add_subregion(address_space,
147 OMAP_CS2_BASE, &cs[2]);
148
149 memory_region_init_io(&cs[3], NULL, &static_ops, &cs3val,
150 "sx1.cs3", OMAP_CS3_SIZE);
151 memory_region_add_subregion(address_space,
152 OMAP_CS2_BASE, &cs[3]);
153
154 fl_idx = 0;
155 if ((dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
156 if (!pflash_cfi01_register(OMAP_CS0_BASE,
157 "omap_sx1.flash0-1", flash_size,
158 blk_by_legacy_dinfo(dinfo),
159 sector_size, 4, 0, 0, 0, 0, 0)) {
160 fprintf(stderr, "qemu: Error registering flash memory %d.\n",
161 fl_idx);
162 }
163 fl_idx++;
164 }
165
166 if ((version == 1) &&
167 (dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
168 MemoryRegion *flash_1 = g_new(MemoryRegion, 1);
169 memory_region_init_rom(flash_1, NULL, "omap_sx1.flash1-0",
170 flash1_size, &error_fatal);
171 memory_region_add_subregion(address_space, OMAP_CS1_BASE, flash_1);
172
173 memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val,
174 "sx1.cs1", OMAP_CS1_SIZE - flash1_size);
175 memory_region_add_subregion(address_space,
176 OMAP_CS1_BASE + flash1_size, &cs[1]);
177
178 if (!pflash_cfi01_register(OMAP_CS1_BASE,
179 "omap_sx1.flash1-1", flash1_size,
180 blk_by_legacy_dinfo(dinfo),
181 sector_size, 4, 0, 0, 0, 0, 0)) {
182 fprintf(stderr, "qemu: Error registering flash memory %d.\n",
183 fl_idx);
184 }
185 fl_idx++;
186 } else {
187 memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val,
188 "sx1.cs1", OMAP_CS1_SIZE);
189 memory_region_add_subregion(address_space,
190 OMAP_CS1_BASE, &cs[1]);
191 }
192
193 if (!machine->kernel_filename && !fl_idx && !qtest_enabled()) {
194 error_report("Kernel or Flash image must be specified");
195 exit(1);
196 }
197
198 /* Load the kernel. */
199 arm_load_kernel(mpu->cpu, machine, &sx1_binfo);
200
201 /* TODO: fix next line */
202 //~ qemu_console_resize(ds, 640, 480);
203 }
204
205 static void sx1_init_v1(MachineState *machine)
206 {
207 sx1_init(machine, 1);
208 }
209
210 static void sx1_init_v2(MachineState *machine)
211 {
212 sx1_init(machine, 2);
213 }
214
215 static void sx1_machine_v2_class_init(ObjectClass *oc, void *data)
216 {
217 MachineClass *mc = MACHINE_CLASS(oc);
218
219 mc->desc = "Siemens SX1 (OMAP310) V2";
220 mc->init = sx1_init_v2;
221 mc->ignore_memory_transaction_failures = true;
222 mc->default_cpu_type = ARM_CPU_TYPE_NAME("ti925t");
223 mc->default_ram_size = sdram_size;
224 mc->default_ram_id = "omap1.dram";
225 }
226
227 static const TypeInfo sx1_machine_v2_type = {
228 .name = MACHINE_TYPE_NAME("sx1"),
229 .parent = TYPE_MACHINE,
230 .class_init = sx1_machine_v2_class_init,
231 };
232
233 static void sx1_machine_v1_class_init(ObjectClass *oc, void *data)
234 {
235 MachineClass *mc = MACHINE_CLASS(oc);
236
237 mc->desc = "Siemens SX1 (OMAP310) V1";
238 mc->init = sx1_init_v1;
239 mc->ignore_memory_transaction_failures = true;
240 mc->default_cpu_type = ARM_CPU_TYPE_NAME("ti925t");
241 mc->default_ram_size = sdram_size;
242 mc->default_ram_id = "omap1.dram";
243 }
244
245 static const TypeInfo sx1_machine_v1_type = {
246 .name = MACHINE_TYPE_NAME("sx1-v1"),
247 .parent = TYPE_MACHINE,
248 .class_init = sx1_machine_v1_class_init,
249 };
250
251 static void sx1_machine_init(void)
252 {
253 type_register_static(&sx1_machine_v1_type);
254 type_register_static(&sx1_machine_v2_type);
255 }
256
257 type_init(sx1_machine_init)