Merge remote-tracking branch 'remotes/philmd-gitlab/tags/renesas-20201027' into staging
[qemu.git] / hw / arm / raspi.c
1 /*
2 * Raspberry Pi emulation (c) 2012 Gregory Estrade
3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
4 *
5 * Rasperry Pi 2 emulation Copyright (c) 2015, Microsoft
6 * Written by Andrew Baumann
7 *
8 * Raspberry Pi 3 emulation Copyright (c) 2018 Zoltán Baldaszti
9 * Upstream code cleanup (c) 2018 Pekka Enberg
10 *
11 * This work is licensed under the terms of the GNU GPL, version 2 or later.
12 * See the COPYING file in the top-level directory.
13 */
14
15 #include "qemu/osdep.h"
16 #include "qemu/units.h"
17 #include "qemu/cutils.h"
18 #include "qapi/error.h"
19 #include "cpu.h"
20 #include "hw/arm/bcm2836.h"
21 #include "hw/registerfields.h"
22 #include "qemu/error-report.h"
23 #include "hw/boards.h"
24 #include "hw/loader.h"
25 #include "hw/arm/boot.h"
26 #include "sysemu/sysemu.h"
27 #include "qom/object.h"
28
29 #define SMPBOOT_ADDR 0x300 /* this should leave enough space for ATAGS */
30 #define MVBAR_ADDR 0x400 /* secure vectors */
31 #define BOARDSETUP_ADDR (MVBAR_ADDR + 0x20) /* board setup code */
32 #define FIRMWARE_ADDR_2 0x8000 /* Pi 2 loads kernel.img here by default */
33 #define FIRMWARE_ADDR_3 0x80000 /* Pi 3 loads kernel.img here by default */
34 #define SPINTABLE_ADDR 0xd8 /* Pi 3 bootloader spintable */
35
36 /* Registered machine type (matches RPi Foundation bootloader and U-Boot) */
37 #define MACH_TYPE_BCM2708 3138
38
39 struct RaspiMachineState {
40 /*< private >*/
41 MachineState parent_obj;
42 /*< public >*/
43 BCM283XState soc;
44 struct arm_boot_info binfo;
45 };
46 typedef struct RaspiMachineState RaspiMachineState;
47
48 struct RaspiMachineClass {
49 /*< private >*/
50 MachineClass parent_obj;
51 /*< public >*/
52 uint32_t board_rev;
53 };
54 typedef struct RaspiMachineClass RaspiMachineClass;
55
56 #define TYPE_RASPI_MACHINE MACHINE_TYPE_NAME("raspi-common")
57 DECLARE_OBJ_CHECKERS(RaspiMachineState, RaspiMachineClass,
58 RASPI_MACHINE, TYPE_RASPI_MACHINE)
59
60
61 /*
62 * Board revision codes:
63 * www.raspberrypi.org/documentation/hardware/raspberrypi/revision-codes/
64 */
65 FIELD(REV_CODE, REVISION, 0, 4);
66 FIELD(REV_CODE, TYPE, 4, 8);
67 FIELD(REV_CODE, PROCESSOR, 12, 4);
68 FIELD(REV_CODE, MANUFACTURER, 16, 4);
69 FIELD(REV_CODE, MEMORY_SIZE, 20, 3);
70 FIELD(REV_CODE, STYLE, 23, 1);
71
72 typedef enum RaspiProcessorId {
73 PROCESSOR_ID_BCM2836 = 1,
74 PROCESSOR_ID_BCM2837 = 2,
75 } RaspiProcessorId;
76
77 static const struct {
78 const char *type;
79 int cores_count;
80 } soc_property[] = {
81 [PROCESSOR_ID_BCM2836] = {TYPE_BCM2836, BCM283X_NCPUS},
82 [PROCESSOR_ID_BCM2837] = {TYPE_BCM2837, BCM283X_NCPUS},
83 };
84
85 static uint64_t board_ram_size(uint32_t board_rev)
86 {
87 assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */
88 return 256 * MiB << FIELD_EX32(board_rev, REV_CODE, MEMORY_SIZE);
89 }
90
91 static RaspiProcessorId board_processor_id(uint32_t board_rev)
92 {
93 int proc_id = FIELD_EX32(board_rev, REV_CODE, PROCESSOR);
94
95 assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */
96 assert(proc_id < ARRAY_SIZE(soc_property) && soc_property[proc_id].type);
97
98 return proc_id;
99 }
100
101 static const char *board_soc_type(uint32_t board_rev)
102 {
103 return soc_property[board_processor_id(board_rev)].type;
104 }
105
106 static int cores_count(uint32_t board_rev)
107 {
108 return soc_property[board_processor_id(board_rev)].cores_count;
109 }
110
111 static const char *board_type(uint32_t board_rev)
112 {
113 static const char *types[] = {
114 "A", "B", "A+", "B+", "2B", "Alpha", "CM1", NULL, "3B", "Zero",
115 "CM3", NULL, "Zero W", "3B+", "3A+", NULL, "CM3+", "4B",
116 };
117 assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */
118 int bt = FIELD_EX32(board_rev, REV_CODE, TYPE);
119 if (bt >= ARRAY_SIZE(types) || !types[bt]) {
120 return "Unknown";
121 }
122 return types[bt];
123 }
124
125 static void write_smpboot(ARMCPU *cpu, const struct arm_boot_info *info)
126 {
127 static const uint32_t smpboot[] = {
128 0xe1a0e00f, /* mov lr, pc */
129 0xe3a0fe00 + (BOARDSETUP_ADDR >> 4), /* mov pc, BOARDSETUP_ADDR */
130 0xee100fb0, /* mrc p15, 0, r0, c0, c0, 5;get core ID */
131 0xe7e10050, /* ubfx r0, r0, #0, #2 ;extract LSB */
132 0xe59f5014, /* ldr r5, =0x400000CC ;load mbox base */
133 0xe320f001, /* 1: yield */
134 0xe7953200, /* ldr r3, [r5, r0, lsl #4] ;read mbox for our core*/
135 0xe3530000, /* cmp r3, #0 ;spin while zero */
136 0x0afffffb, /* beq 1b */
137 0xe7853200, /* str r3, [r5, r0, lsl #4] ;clear mbox */
138 0xe12fff13, /* bx r3 ;jump to target */
139 0x400000cc, /* (constant: mailbox 3 read/clear base) */
140 };
141
142 /* check that we don't overrun board setup vectors */
143 QEMU_BUILD_BUG_ON(SMPBOOT_ADDR + sizeof(smpboot) > MVBAR_ADDR);
144 /* check that board setup address is correctly relocated */
145 QEMU_BUILD_BUG_ON((BOARDSETUP_ADDR & 0xf) != 0
146 || (BOARDSETUP_ADDR >> 4) >= 0x100);
147
148 rom_add_blob_fixed_as("raspi_smpboot", smpboot, sizeof(smpboot),
149 info->smp_loader_start,
150 arm_boot_address_space(cpu, info));
151 }
152
153 static void write_smpboot64(ARMCPU *cpu, const struct arm_boot_info *info)
154 {
155 AddressSpace *as = arm_boot_address_space(cpu, info);
156 /* Unlike the AArch32 version we don't need to call the board setup hook.
157 * The mechanism for doing the spin-table is also entirely different.
158 * We must have four 64-bit fields at absolute addresses
159 * 0xd8, 0xe0, 0xe8, 0xf0 in RAM, which are the flag variables for
160 * our CPUs, and which we must ensure are zero initialized before
161 * the primary CPU goes into the kernel. We put these variables inside
162 * a rom blob, so that the reset for ROM contents zeroes them for us.
163 */
164 static const uint32_t smpboot[] = {
165 0xd2801b05, /* mov x5, 0xd8 */
166 0xd53800a6, /* mrs x6, mpidr_el1 */
167 0x924004c6, /* and x6, x6, #0x3 */
168 0xd503205f, /* spin: wfe */
169 0xf86678a4, /* ldr x4, [x5,x6,lsl #3] */
170 0xb4ffffc4, /* cbz x4, spin */
171 0xd2800000, /* mov x0, #0x0 */
172 0xd2800001, /* mov x1, #0x0 */
173 0xd2800002, /* mov x2, #0x0 */
174 0xd2800003, /* mov x3, #0x0 */
175 0xd61f0080, /* br x4 */
176 };
177
178 static const uint64_t spintables[] = {
179 0, 0, 0, 0
180 };
181
182 rom_add_blob_fixed_as("raspi_smpboot", smpboot, sizeof(smpboot),
183 info->smp_loader_start, as);
184 rom_add_blob_fixed_as("raspi_spintables", spintables, sizeof(spintables),
185 SPINTABLE_ADDR, as);
186 }
187
188 static void write_board_setup(ARMCPU *cpu, const struct arm_boot_info *info)
189 {
190 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR);
191 }
192
193 static void reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info)
194 {
195 CPUState *cs = CPU(cpu);
196 cpu_set_pc(cs, info->smp_loader_start);
197 }
198
199 static void setup_boot(MachineState *machine, RaspiProcessorId processor_id,
200 size_t ram_size)
201 {
202 RaspiMachineState *s = RASPI_MACHINE(machine);
203 int r;
204
205 s->binfo.board_id = MACH_TYPE_BCM2708;
206 s->binfo.ram_size = ram_size;
207 s->binfo.nb_cpus = machine->smp.cpus;
208
209 if (processor_id <= PROCESSOR_ID_BCM2836) {
210 /*
211 * The BCM2835 and BCM2836 require some custom setup code to run
212 * in Secure mode before booting a kernel (to set up the SMC vectors
213 * so that we get a no-op SMC; this is used by Linux to call the
214 * firmware for some cache maintenance operations.
215 * The BCM2837 doesn't need this.
216 */
217 s->binfo.board_setup_addr = BOARDSETUP_ADDR;
218 s->binfo.write_board_setup = write_board_setup;
219 s->binfo.secure_board_setup = true;
220 s->binfo.secure_boot = true;
221 }
222
223 /* BCM2836 and BCM2837 requires SMP setup */
224 if (processor_id >= PROCESSOR_ID_BCM2836) {
225 s->binfo.smp_loader_start = SMPBOOT_ADDR;
226 if (processor_id == PROCESSOR_ID_BCM2836) {
227 s->binfo.write_secondary_boot = write_smpboot;
228 } else {
229 s->binfo.write_secondary_boot = write_smpboot64;
230 }
231 s->binfo.secondary_cpu_reset_hook = reset_secondary;
232 }
233
234 /* If the user specified a "firmware" image (e.g. UEFI), we bypass
235 * the normal Linux boot process
236 */
237 if (machine->firmware) {
238 hwaddr firmware_addr = processor_id <= PROCESSOR_ID_BCM2836
239 ? FIRMWARE_ADDR_2 : FIRMWARE_ADDR_3;
240 /* load the firmware image (typically kernel.img) */
241 r = load_image_targphys(machine->firmware, firmware_addr,
242 ram_size - firmware_addr);
243 if (r < 0) {
244 error_report("Failed to load firmware from %s", machine->firmware);
245 exit(1);
246 }
247
248 s->binfo.entry = firmware_addr;
249 s->binfo.firmware_loaded = true;
250 }
251
252 arm_load_kernel(&s->soc.cpu[0].core, machine, &s->binfo);
253 }
254
255 static void raspi_machine_init(MachineState *machine)
256 {
257 RaspiMachineClass *mc = RASPI_MACHINE_GET_CLASS(machine);
258 RaspiMachineState *s = RASPI_MACHINE(machine);
259 uint32_t board_rev = mc->board_rev;
260 uint64_t ram_size = board_ram_size(board_rev);
261 uint32_t vcram_size;
262 DriveInfo *di;
263 BlockBackend *blk;
264 BusState *bus;
265 DeviceState *carddev;
266
267 if (machine->ram_size != ram_size) {
268 char *size_str = size_to_str(ram_size);
269 error_report("Invalid RAM size, should be %s", size_str);
270 g_free(size_str);
271 exit(1);
272 }
273
274 /* FIXME: Remove when we have custom CPU address space support */
275 memory_region_add_subregion_overlap(get_system_memory(), 0,
276 machine->ram, 0);
277
278 /* Setup the SOC */
279 object_initialize_child(OBJECT(machine), "soc", &s->soc,
280 board_soc_type(board_rev));
281 object_property_add_const_link(OBJECT(&s->soc), "ram", OBJECT(machine->ram));
282 object_property_set_int(OBJECT(&s->soc), "board-rev", board_rev,
283 &error_abort);
284 qdev_realize(DEVICE(&s->soc), NULL, &error_abort);
285
286 /* Create and plug in the SD cards */
287 di = drive_get_next(IF_SD);
288 blk = di ? blk_by_legacy_dinfo(di) : NULL;
289 bus = qdev_get_child_bus(DEVICE(&s->soc), "sd-bus");
290 if (bus == NULL) {
291 error_report("No SD bus found in SOC object");
292 exit(1);
293 }
294 carddev = qdev_new(TYPE_SD_CARD);
295 qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal);
296 qdev_realize_and_unref(carddev, bus, &error_fatal);
297
298 vcram_size = object_property_get_uint(OBJECT(&s->soc), "vcram-size",
299 &error_abort);
300 setup_boot(machine, board_processor_id(mc->board_rev),
301 machine->ram_size - vcram_size);
302 }
303
304 static void raspi_machine_class_common_init(MachineClass *mc,
305 uint32_t board_rev)
306 {
307 mc->desc = g_strdup_printf("Raspberry Pi %s (revision 1.%u)",
308 board_type(board_rev),
309 FIELD_EX32(board_rev, REV_CODE, REVISION));
310 mc->init = raspi_machine_init;
311 mc->block_default_type = IF_SD;
312 mc->no_parallel = 1;
313 mc->no_floppy = 1;
314 mc->no_cdrom = 1;
315 mc->default_cpus = mc->min_cpus = mc->max_cpus = cores_count(board_rev);
316 mc->default_ram_size = board_ram_size(board_rev);
317 mc->default_ram_id = "ram";
318 };
319
320 static void raspi2b_machine_class_init(ObjectClass *oc, void *data)
321 {
322 MachineClass *mc = MACHINE_CLASS(oc);
323 RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
324
325 mc->alias = "raspi2";
326 rmc->board_rev = 0xa21041;
327 raspi_machine_class_common_init(mc, rmc->board_rev);
328 };
329
330 #ifdef TARGET_AARCH64
331 static void raspi3b_machine_class_init(ObjectClass *oc, void *data)
332 {
333 MachineClass *mc = MACHINE_CLASS(oc);
334 RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
335
336 mc->alias = "raspi3";
337 rmc->board_rev = 0xa02082;
338 raspi_machine_class_common_init(mc, rmc->board_rev);
339 };
340 #endif /* TARGET_AARCH64 */
341
342 static const TypeInfo raspi_machine_types[] = {
343 {
344 .name = MACHINE_TYPE_NAME("raspi2b"),
345 .parent = TYPE_RASPI_MACHINE,
346 .class_init = raspi2b_machine_class_init,
347 #ifdef TARGET_AARCH64
348 }, {
349 .name = MACHINE_TYPE_NAME("raspi3b"),
350 .parent = TYPE_RASPI_MACHINE,
351 .class_init = raspi3b_machine_class_init,
352 #endif
353 }, {
354 .name = TYPE_RASPI_MACHINE,
355 .parent = TYPE_MACHINE,
356 .instance_size = sizeof(RaspiMachineState),
357 .class_size = sizeof(RaspiMachineClass),
358 .abstract = true,
359 }
360 };
361
362 DEFINE_TYPES(raspi_machine_types)