Add access control support to qemu bridge helper
[qemu.git] / hw / arm_boot.c
1 /*
2 * ARM kernel loader.
3 *
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
6 *
7 * This code is licensed under the GPL.
8 */
9
10 #include "hw.h"
11 #include "arm-misc.h"
12 #include "sysemu.h"
13 #include "loader.h"
14 #include "elf.h"
15
16 #define KERNEL_ARGS_ADDR 0x100
17 #define KERNEL_LOAD_ADDR 0x00010000
18 #define INITRD_LOAD_ADDR 0x00d00000
19
20 /* The worlds second smallest bootloader. Set r0-r2, then jump to kernel. */
21 static uint32_t bootloader[] = {
22 0xe3a00000, /* mov r0, #0 */
23 0xe59f1004, /* ldr r1, [pc, #4] */
24 0xe59f2004, /* ldr r2, [pc, #4] */
25 0xe59ff004, /* ldr pc, [pc, #4] */
26 0, /* Board ID */
27 0, /* Address of kernel args. Set by integratorcp_init. */
28 0 /* Kernel entry point. Set by integratorcp_init. */
29 };
30
31 /* Handling for secondary CPU boot in a multicore system.
32 * Unlike the uniprocessor/primary CPU boot, this is platform
33 * dependent. The default code here is based on the secondary
34 * CPU boot protocol used on realview/vexpress boards, with
35 * some parameterisation to increase its flexibility.
36 * QEMU platform models for which this code is not appropriate
37 * should override write_secondary_boot and secondary_cpu_reset_hook
38 * instead.
39 *
40 * This code enables the interrupt controllers for the secondary
41 * CPUs and then puts all the secondary CPUs into a loop waiting
42 * for an interprocessor interrupt and polling a configurable
43 * location for the kernel secondary CPU entry point.
44 */
45 static uint32_t smpboot[] = {
46 0xe59f201c, /* ldr r2, privbase */
47 0xe59f001c, /* ldr r0, startaddr */
48 0xe3a01001, /* mov r1, #1 */
49 0xe5821100, /* str r1, [r2, #256] */
50 0xe320f003, /* wfi */
51 0xe5901000, /* ldr r1, [r0] */
52 0xe1110001, /* tst r1, r1 */
53 0x0afffffb, /* beq <wfi> */
54 0xe12fff11, /* bx r1 */
55 0, /* privbase: Private memory region base address. */
56 0 /* bootreg: Boot register address is held here */
57 };
58
59 static void default_write_secondary(CPUState *env,
60 const struct arm_boot_info *info)
61 {
62 int n;
63 smpboot[ARRAY_SIZE(smpboot) - 1] = info->smp_bootreg_addr;
64 smpboot[ARRAY_SIZE(smpboot) - 2] = info->smp_priv_base;
65 for (n = 0; n < ARRAY_SIZE(smpboot); n++) {
66 smpboot[n] = tswap32(smpboot[n]);
67 }
68 rom_add_blob_fixed("smpboot", smpboot, sizeof(smpboot),
69 info->smp_loader_start);
70 }
71
72 static void default_reset_secondary(CPUState *env,
73 const struct arm_boot_info *info)
74 {
75 stl_phys_notdirty(info->smp_bootreg_addr, 0);
76 env->regs[15] = info->smp_loader_start;
77 }
78
79 #define WRITE_WORD(p, value) do { \
80 stl_phys_notdirty(p, value); \
81 p += 4; \
82 } while (0)
83
84 static void set_kernel_args(const struct arm_boot_info *info,
85 int initrd_size, target_phys_addr_t base)
86 {
87 target_phys_addr_t p;
88
89 p = base + KERNEL_ARGS_ADDR;
90 /* ATAG_CORE */
91 WRITE_WORD(p, 5);
92 WRITE_WORD(p, 0x54410001);
93 WRITE_WORD(p, 1);
94 WRITE_WORD(p, 0x1000);
95 WRITE_WORD(p, 0);
96 /* ATAG_MEM */
97 /* TODO: handle multiple chips on one ATAG list */
98 WRITE_WORD(p, 4);
99 WRITE_WORD(p, 0x54410002);
100 WRITE_WORD(p, info->ram_size);
101 WRITE_WORD(p, info->loader_start);
102 if (initrd_size) {
103 /* ATAG_INITRD2 */
104 WRITE_WORD(p, 4);
105 WRITE_WORD(p, 0x54420005);
106 WRITE_WORD(p, info->loader_start + INITRD_LOAD_ADDR);
107 WRITE_WORD(p, initrd_size);
108 }
109 if (info->kernel_cmdline && *info->kernel_cmdline) {
110 /* ATAG_CMDLINE */
111 int cmdline_size;
112
113 cmdline_size = strlen(info->kernel_cmdline);
114 cpu_physical_memory_write(p + 8, (void *)info->kernel_cmdline,
115 cmdline_size + 1);
116 cmdline_size = (cmdline_size >> 2) + 1;
117 WRITE_WORD(p, cmdline_size + 2);
118 WRITE_WORD(p, 0x54410009);
119 p += cmdline_size * 4;
120 }
121 if (info->atag_board) {
122 /* ATAG_BOARD */
123 int atag_board_len;
124 uint8_t atag_board_buf[0x1000];
125
126 atag_board_len = (info->atag_board(info, atag_board_buf) + 3) & ~3;
127 WRITE_WORD(p, (atag_board_len + 8) >> 2);
128 WRITE_WORD(p, 0x414f4d50);
129 cpu_physical_memory_write(p, atag_board_buf, atag_board_len);
130 p += atag_board_len;
131 }
132 /* ATAG_END */
133 WRITE_WORD(p, 0);
134 WRITE_WORD(p, 0);
135 }
136
137 static void set_kernel_args_old(const struct arm_boot_info *info,
138 int initrd_size, target_phys_addr_t base)
139 {
140 target_phys_addr_t p;
141 const char *s;
142
143
144 /* see linux/include/asm-arm/setup.h */
145 p = base + KERNEL_ARGS_ADDR;
146 /* page_size */
147 WRITE_WORD(p, 4096);
148 /* nr_pages */
149 WRITE_WORD(p, info->ram_size / 4096);
150 /* ramdisk_size */
151 WRITE_WORD(p, 0);
152 #define FLAG_READONLY 1
153 #define FLAG_RDLOAD 4
154 #define FLAG_RDPROMPT 8
155 /* flags */
156 WRITE_WORD(p, FLAG_READONLY | FLAG_RDLOAD | FLAG_RDPROMPT);
157 /* rootdev */
158 WRITE_WORD(p, (31 << 8) | 0); /* /dev/mtdblock0 */
159 /* video_num_cols */
160 WRITE_WORD(p, 0);
161 /* video_num_rows */
162 WRITE_WORD(p, 0);
163 /* video_x */
164 WRITE_WORD(p, 0);
165 /* video_y */
166 WRITE_WORD(p, 0);
167 /* memc_control_reg */
168 WRITE_WORD(p, 0);
169 /* unsigned char sounddefault */
170 /* unsigned char adfsdrives */
171 /* unsigned char bytes_per_char_h */
172 /* unsigned char bytes_per_char_v */
173 WRITE_WORD(p, 0);
174 /* pages_in_bank[4] */
175 WRITE_WORD(p, 0);
176 WRITE_WORD(p, 0);
177 WRITE_WORD(p, 0);
178 WRITE_WORD(p, 0);
179 /* pages_in_vram */
180 WRITE_WORD(p, 0);
181 /* initrd_start */
182 if (initrd_size)
183 WRITE_WORD(p, info->loader_start + INITRD_LOAD_ADDR);
184 else
185 WRITE_WORD(p, 0);
186 /* initrd_size */
187 WRITE_WORD(p, initrd_size);
188 /* rd_start */
189 WRITE_WORD(p, 0);
190 /* system_rev */
191 WRITE_WORD(p, 0);
192 /* system_serial_low */
193 WRITE_WORD(p, 0);
194 /* system_serial_high */
195 WRITE_WORD(p, 0);
196 /* mem_fclk_21285 */
197 WRITE_WORD(p, 0);
198 /* zero unused fields */
199 while (p < base + KERNEL_ARGS_ADDR + 256 + 1024) {
200 WRITE_WORD(p, 0);
201 }
202 s = info->kernel_cmdline;
203 if (s) {
204 cpu_physical_memory_write(p, (void *)s, strlen(s) + 1);
205 } else {
206 WRITE_WORD(p, 0);
207 }
208 }
209
210 static void do_cpu_reset(void *opaque)
211 {
212 CPUState *env = opaque;
213 const struct arm_boot_info *info = env->boot_info;
214
215 cpu_reset(env);
216 if (info) {
217 if (!info->is_linux) {
218 /* Jump to the entry point. */
219 env->regs[15] = info->entry & 0xfffffffe;
220 env->thumb = info->entry & 1;
221 } else {
222 if (env == first_cpu) {
223 env->regs[15] = info->loader_start;
224 if (old_param) {
225 set_kernel_args_old(info, info->initrd_size,
226 info->loader_start);
227 } else {
228 set_kernel_args(info, info->initrd_size,
229 info->loader_start);
230 }
231 } else {
232 info->secondary_cpu_reset_hook(env, info);
233 }
234 }
235 }
236 }
237
238 void arm_load_kernel(CPUState *env, struct arm_boot_info *info)
239 {
240 int kernel_size;
241 int initrd_size;
242 int n;
243 int is_linux = 0;
244 uint64_t elf_entry;
245 target_phys_addr_t entry;
246 int big_endian;
247
248 /* Load the kernel. */
249 if (!info->kernel_filename) {
250 fprintf(stderr, "Kernel image must be specified\n");
251 exit(1);
252 }
253
254 if (!info->secondary_cpu_reset_hook) {
255 info->secondary_cpu_reset_hook = default_reset_secondary;
256 }
257 if (!info->write_secondary_boot) {
258 info->write_secondary_boot = default_write_secondary;
259 }
260
261 if (info->nb_cpus == 0)
262 info->nb_cpus = 1;
263
264 #ifdef TARGET_WORDS_BIGENDIAN
265 big_endian = 1;
266 #else
267 big_endian = 0;
268 #endif
269
270 /* Assume that raw images are linux kernels, and ELF images are not. */
271 kernel_size = load_elf(info->kernel_filename, NULL, NULL, &elf_entry,
272 NULL, NULL, big_endian, ELF_MACHINE, 1);
273 entry = elf_entry;
274 if (kernel_size < 0) {
275 kernel_size = load_uimage(info->kernel_filename, &entry, NULL,
276 &is_linux);
277 }
278 if (kernel_size < 0) {
279 entry = info->loader_start + KERNEL_LOAD_ADDR;
280 kernel_size = load_image_targphys(info->kernel_filename, entry,
281 ram_size - KERNEL_LOAD_ADDR);
282 is_linux = 1;
283 }
284 if (kernel_size < 0) {
285 fprintf(stderr, "qemu: could not load kernel '%s'\n",
286 info->kernel_filename);
287 exit(1);
288 }
289 info->entry = entry;
290 if (is_linux) {
291 if (info->initrd_filename) {
292 initrd_size = load_image_targphys(info->initrd_filename,
293 info->loader_start
294 + INITRD_LOAD_ADDR,
295 ram_size - INITRD_LOAD_ADDR);
296 if (initrd_size < 0) {
297 fprintf(stderr, "qemu: could not load initrd '%s'\n",
298 info->initrd_filename);
299 exit(1);
300 }
301 } else {
302 initrd_size = 0;
303 }
304 bootloader[4] = info->board_id;
305 bootloader[5] = info->loader_start + KERNEL_ARGS_ADDR;
306 bootloader[6] = entry;
307 for (n = 0; n < sizeof(bootloader) / 4; n++) {
308 bootloader[n] = tswap32(bootloader[n]);
309 }
310 rom_add_blob_fixed("bootloader", bootloader, sizeof(bootloader),
311 info->loader_start);
312 if (info->nb_cpus > 1) {
313 info->write_secondary_boot(env, info);
314 }
315 info->initrd_size = initrd_size;
316 }
317 info->is_linux = is_linux;
318
319 for (; env; env = env->next_cpu) {
320 env->boot_info = info;
321 qemu_register_reset(do_cpu_reset, env);
322 }
323 }