Update VERSION for v7.2.0-rc4
[qemu.git] / hw / block / fdc-sysbus.c
1 /*
2 * QEMU Floppy disk emulator (Intel 82078)
3 *
4 * Copyright (c) 2003, 2007 Jocelyn Mayer
5 * Copyright (c) 2008 Hervé Poussineau
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
26 #include "qemu/osdep.h"
27 #include "qapi/error.h"
28 #include "qom/object.h"
29 #include "hw/sysbus.h"
30 #include "hw/block/fdc.h"
31 #include "migration/vmstate.h"
32 #include "fdc-internal.h"
33 #include "trace.h"
34
35 #define TYPE_SYSBUS_FDC "base-sysbus-fdc"
36 typedef struct FDCtrlSysBusClass FDCtrlSysBusClass;
37 typedef struct FDCtrlSysBus FDCtrlSysBus;
38 DECLARE_OBJ_CHECKERS(FDCtrlSysBus, FDCtrlSysBusClass,
39 SYSBUS_FDC, TYPE_SYSBUS_FDC)
40
41 struct FDCtrlSysBusClass {
42 /*< private >*/
43 SysBusDeviceClass parent_class;
44 /*< public >*/
45
46 bool use_strict_io;
47 };
48
49 struct FDCtrlSysBus {
50 /*< private >*/
51 SysBusDevice parent_obj;
52 /*< public >*/
53
54 struct FDCtrl state;
55 };
56
57 static uint64_t fdctrl_read_mem(void *opaque, hwaddr reg, unsigned ize)
58 {
59 return fdctrl_read(opaque, (uint32_t)reg);
60 }
61
62 static void fdctrl_write_mem(void *opaque, hwaddr reg,
63 uint64_t value, unsigned size)
64 {
65 fdctrl_write(opaque, (uint32_t)reg, value);
66 }
67
68 static const MemoryRegionOps fdctrl_mem_ops = {
69 .read = fdctrl_read_mem,
70 .write = fdctrl_write_mem,
71 .endianness = DEVICE_NATIVE_ENDIAN,
72 };
73
74 static const MemoryRegionOps fdctrl_mem_strict_ops = {
75 .read = fdctrl_read_mem,
76 .write = fdctrl_write_mem,
77 .endianness = DEVICE_NATIVE_ENDIAN,
78 .valid = {
79 .min_access_size = 1,
80 .max_access_size = 1,
81 },
82 };
83
84 static void fdctrl_external_reset_sysbus(DeviceState *d)
85 {
86 FDCtrlSysBus *sys = SYSBUS_FDC(d);
87 FDCtrl *s = &sys->state;
88
89 fdctrl_reset(s, 0);
90 }
91
92 static void fdctrl_handle_tc(void *opaque, int irq, int level)
93 {
94 trace_fdctrl_tc_pulse(level);
95 }
96
97 void fdctrl_init_sysbus(qemu_irq irq, hwaddr mmio_base, DriveInfo **fds)
98 {
99 DeviceState *dev;
100 SysBusDevice *sbd;
101 FDCtrlSysBus *sys;
102
103 dev = qdev_new("sysbus-fdc");
104 sys = SYSBUS_FDC(dev);
105 sbd = SYS_BUS_DEVICE(dev);
106 sysbus_realize_and_unref(sbd, &error_fatal);
107 sysbus_connect_irq(sbd, 0, irq);
108 sysbus_mmio_map(sbd, 0, mmio_base);
109
110 fdctrl_init_drives(&sys->state.bus, fds);
111 }
112
113 void sun4m_fdctrl_init(qemu_irq irq, hwaddr io_base,
114 DriveInfo **fds, qemu_irq *fdc_tc)
115 {
116 DeviceState *dev;
117 FDCtrlSysBus *sys;
118
119 dev = qdev_new("sun-fdtwo");
120 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
121 sys = SYSBUS_FDC(dev);
122 sysbus_connect_irq(SYS_BUS_DEVICE(sys), 0, irq);
123 sysbus_mmio_map(SYS_BUS_DEVICE(sys), 0, io_base);
124 *fdc_tc = qdev_get_gpio_in(dev, 0);
125
126 fdctrl_init_drives(&sys->state.bus, fds);
127 }
128
129 static void sysbus_fdc_common_instance_init(Object *obj)
130 {
131 DeviceState *dev = DEVICE(obj);
132 FDCtrlSysBusClass *sbdc = SYSBUS_FDC_GET_CLASS(obj);
133 SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
134 FDCtrlSysBus *sys = SYSBUS_FDC(obj);
135 FDCtrl *fdctrl = &sys->state;
136
137 /*
138 * DMA is not currently supported for sysbus floppy controllers.
139 * If we wanted to add support then probably the best approach is
140 * to have a QOM link property 'dma-controller' which the board
141 * code can set to an instance of IsaDmaClass, and an integer
142 * property 'dma-channel', so that we can set fdctrl->dma and
143 * fdctrl->dma_chann accordingly.
144 */
145 fdctrl->dma_chann = -1;
146
147 qdev_set_legacy_instance_id(dev, 0 /* io */, 2); /* FIXME */
148
149 memory_region_init_io(&fdctrl->iomem, obj,
150 sbdc->use_strict_io ? &fdctrl_mem_strict_ops
151 : &fdctrl_mem_ops,
152 fdctrl, "fdc", 0x08);
153 sysbus_init_mmio(sbd, &fdctrl->iomem);
154
155 sysbus_init_irq(sbd, &fdctrl->irq);
156 qdev_init_gpio_in(dev, fdctrl_handle_tc, 1);
157 }
158
159 static void sysbus_fdc_realize(DeviceState *dev, Error **errp)
160 {
161 FDCtrlSysBus *sys = SYSBUS_FDC(dev);
162 FDCtrl *fdctrl = &sys->state;
163
164 fdctrl_realize_common(dev, fdctrl, errp);
165 }
166
167 static const VMStateDescription vmstate_sysbus_fdc = {
168 .name = "fdc",
169 .version_id = 2,
170 .minimum_version_id = 2,
171 .fields = (VMStateField[]) {
172 VMSTATE_STRUCT(state, FDCtrlSysBus, 0, vmstate_fdc, FDCtrl),
173 VMSTATE_END_OF_LIST()
174 }
175 };
176
177 static void sysbus_fdc_common_class_init(ObjectClass *klass, void *data)
178 {
179 DeviceClass *dc = DEVICE_CLASS(klass);
180
181 dc->realize = sysbus_fdc_realize;
182 dc->reset = fdctrl_external_reset_sysbus;
183 dc->vmsd = &vmstate_sysbus_fdc;
184 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
185 }
186
187 static const TypeInfo sysbus_fdc_common_typeinfo = {
188 .name = TYPE_SYSBUS_FDC,
189 .parent = TYPE_SYS_BUS_DEVICE,
190 .instance_size = sizeof(FDCtrlSysBus),
191 .instance_init = sysbus_fdc_common_instance_init,
192 .abstract = true,
193 .class_init = sysbus_fdc_common_class_init,
194 .class_size = sizeof(FDCtrlSysBusClass),
195 };
196
197 static Property sysbus_fdc_properties[] = {
198 DEFINE_PROP_SIGNED("fdtypeA", FDCtrlSysBus, state.qdev_for_drives[0].type,
199 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
200 FloppyDriveType),
201 DEFINE_PROP_SIGNED("fdtypeB", FDCtrlSysBus, state.qdev_for_drives[1].type,
202 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
203 FloppyDriveType),
204 DEFINE_PROP_SIGNED("fallback", FDCtrlSysBus, state.fallback,
205 FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type,
206 FloppyDriveType),
207 DEFINE_PROP_END_OF_LIST(),
208 };
209
210 static void sysbus_fdc_class_init(ObjectClass *klass, void *data)
211 {
212 DeviceClass *dc = DEVICE_CLASS(klass);
213
214 dc->desc = "virtual floppy controller";
215 device_class_set_props(dc, sysbus_fdc_properties);
216 }
217
218 static const TypeInfo sysbus_fdc_typeinfo = {
219 .name = "sysbus-fdc",
220 .parent = TYPE_SYSBUS_FDC,
221 .class_init = sysbus_fdc_class_init,
222 };
223
224 static Property sun4m_fdc_properties[] = {
225 DEFINE_PROP_SIGNED("fdtype", FDCtrlSysBus, state.qdev_for_drives[0].type,
226 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
227 FloppyDriveType),
228 DEFINE_PROP_SIGNED("fallback", FDCtrlSysBus, state.fallback,
229 FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type,
230 FloppyDriveType),
231 DEFINE_PROP_END_OF_LIST(),
232 };
233
234 static void sun4m_fdc_class_init(ObjectClass *klass, void *data)
235 {
236 FDCtrlSysBusClass *sbdc = SYSBUS_FDC_CLASS(klass);
237 DeviceClass *dc = DEVICE_CLASS(klass);
238
239 sbdc->use_strict_io = true;
240 dc->desc = "virtual floppy controller";
241 device_class_set_props(dc, sun4m_fdc_properties);
242 }
243
244 static const TypeInfo sun4m_fdc_typeinfo = {
245 .name = "sun-fdtwo",
246 .parent = TYPE_SYSBUS_FDC,
247 .class_init = sun4m_fdc_class_init,
248 };
249
250 static void sysbus_fdc_register_types(void)
251 {
252 type_register_static(&sysbus_fdc_common_typeinfo);
253 type_register_static(&sysbus_fdc_typeinfo);
254 type_register_static(&sun4m_fdc_typeinfo);
255 }
256
257 type_init(sysbus_fdc_register_types)