meson: convert hw/vfio
[qemu.git] / hw / block / nvme.h
1 #ifndef HW_NVME_H
2 #define HW_NVME_H
3
4 #include "block/nvme.h"
5
6 typedef struct NvmeParams {
7 char *serial;
8 uint32_t num_queues; /* deprecated since 5.1 */
9 uint32_t max_ioqpairs;
10 uint16_t msix_qsize;
11 uint32_t cmb_size_mb;
12 } NvmeParams;
13
14 typedef struct NvmeAsyncEvent {
15 QSIMPLEQ_ENTRY(NvmeAsyncEvent) entry;
16 NvmeAerResult result;
17 } NvmeAsyncEvent;
18
19 typedef struct NvmeRequest {
20 struct NvmeSQueue *sq;
21 BlockAIOCB *aiocb;
22 uint16_t status;
23 bool has_sg;
24 NvmeCqe cqe;
25 BlockAcctCookie acct;
26 QEMUSGList qsg;
27 QEMUIOVector iov;
28 QTAILQ_ENTRY(NvmeRequest)entry;
29 } NvmeRequest;
30
31 typedef struct NvmeSQueue {
32 struct NvmeCtrl *ctrl;
33 uint16_t sqid;
34 uint16_t cqid;
35 uint32_t head;
36 uint32_t tail;
37 uint32_t size;
38 uint64_t dma_addr;
39 QEMUTimer *timer;
40 NvmeRequest *io_req;
41 QTAILQ_HEAD(, NvmeRequest) req_list;
42 QTAILQ_HEAD(, NvmeRequest) out_req_list;
43 QTAILQ_ENTRY(NvmeSQueue) entry;
44 } NvmeSQueue;
45
46 typedef struct NvmeCQueue {
47 struct NvmeCtrl *ctrl;
48 uint8_t phase;
49 uint16_t cqid;
50 uint16_t irq_enabled;
51 uint32_t head;
52 uint32_t tail;
53 uint32_t vector;
54 uint32_t size;
55 uint64_t dma_addr;
56 QEMUTimer *timer;
57 QTAILQ_HEAD(, NvmeSQueue) sq_list;
58 QTAILQ_HEAD(, NvmeRequest) req_list;
59 } NvmeCQueue;
60
61 typedef struct NvmeNamespace {
62 NvmeIdNs id_ns;
63 } NvmeNamespace;
64
65 static inline NvmeLBAF *nvme_ns_lbaf(NvmeNamespace *ns)
66 {
67 NvmeIdNs *id_ns = &ns->id_ns;
68 return &id_ns->lbaf[NVME_ID_NS_FLBAS_INDEX(id_ns->flbas)];
69 }
70
71 static inline uint8_t nvme_ns_lbads(NvmeNamespace *ns)
72 {
73 return nvme_ns_lbaf(ns)->ds;
74 }
75
76 #define TYPE_NVME "nvme"
77 #define NVME(obj) \
78 OBJECT_CHECK(NvmeCtrl, (obj), TYPE_NVME)
79
80 typedef struct NvmeCtrl {
81 PCIDevice parent_obj;
82 MemoryRegion iomem;
83 MemoryRegion ctrl_mem;
84 NvmeBar bar;
85 BlockConf conf;
86 NvmeParams params;
87
88 uint32_t page_size;
89 uint16_t page_bits;
90 uint16_t max_prp_ents;
91 uint16_t cqe_size;
92 uint16_t sqe_size;
93 uint32_t reg_size;
94 uint32_t num_namespaces;
95 uint32_t max_q_ents;
96 uint64_t ns_size;
97 uint8_t *cmbuf;
98 uint32_t irq_status;
99 uint64_t host_timestamp; /* Timestamp sent by the host */
100 uint64_t timestamp_set_qemu_clock_ms; /* QEMU clock time */
101
102 HostMemoryBackend *pmrdev;
103
104 NvmeNamespace *namespaces;
105 NvmeSQueue **sq;
106 NvmeCQueue **cq;
107 NvmeSQueue admin_sq;
108 NvmeCQueue admin_cq;
109 NvmeIdCtrl id_ctrl;
110 } NvmeCtrl;
111
112 /* calculate the number of LBAs that the namespace can accomodate */
113 static inline uint64_t nvme_ns_nlbas(NvmeCtrl *n, NvmeNamespace *ns)
114 {
115 return n->ns_size >> nvme_ns_lbads(ns);
116 }
117
118 #endif /* HW_NVME_H */