Merge tag 'pull-request-2022-09-28' of https://gitlab.com/thuth/qemu into staging
[qemu.git] / hw / core / cpu-common.c
1 /*
2 * QEMU CPU model
3 *
4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
19 */
20
21 #include "qemu/osdep.h"
22 #include "qapi/error.h"
23 #include "hw/core/cpu.h"
24 #include "sysemu/hw_accel.h"
25 #include "qemu/notify.h"
26 #include "qemu/log.h"
27 #include "qemu/main-loop.h"
28 #include "exec/log.h"
29 #include "exec/cpu-common.h"
30 #include "qemu/error-report.h"
31 #include "qemu/qemu-print.h"
32 #include "sysemu/tcg.h"
33 #include "hw/boards.h"
34 #include "hw/qdev-properties.h"
35 #include "trace/trace-root.h"
36 #include "qemu/plugin.h"
37
38 CPUState *cpu_by_arch_id(int64_t id)
39 {
40 CPUState *cpu;
41
42 CPU_FOREACH(cpu) {
43 CPUClass *cc = CPU_GET_CLASS(cpu);
44
45 if (cc->get_arch_id(cpu) == id) {
46 return cpu;
47 }
48 }
49 return NULL;
50 }
51
52 bool cpu_exists(int64_t id)
53 {
54 return !!cpu_by_arch_id(id);
55 }
56
57 CPUState *cpu_create(const char *typename)
58 {
59 Error *err = NULL;
60 CPUState *cpu = CPU(object_new(typename));
61 if (!qdev_realize(DEVICE(cpu), NULL, &err)) {
62 error_report_err(err);
63 object_unref(OBJECT(cpu));
64 exit(EXIT_FAILURE);
65 }
66 return cpu;
67 }
68
69 /* Resetting the IRQ comes from across the code base so we take the
70 * BQL here if we need to. cpu_interrupt assumes it is held.*/
71 void cpu_reset_interrupt(CPUState *cpu, int mask)
72 {
73 bool need_lock = !qemu_mutex_iothread_locked();
74
75 if (need_lock) {
76 qemu_mutex_lock_iothread();
77 }
78 cpu->interrupt_request &= ~mask;
79 if (need_lock) {
80 qemu_mutex_unlock_iothread();
81 }
82 }
83
84 void cpu_exit(CPUState *cpu)
85 {
86 qatomic_set(&cpu->exit_request, 1);
87 /* Ensure cpu_exec will see the exit request after TCG has exited. */
88 smp_wmb();
89 qatomic_set(&cpu->icount_decr_ptr->u16.high, -1);
90 }
91
92 static int cpu_common_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg)
93 {
94 return 0;
95 }
96
97 static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
98 {
99 return 0;
100 }
101
102 void cpu_dump_state(CPUState *cpu, FILE *f, int flags)
103 {
104 CPUClass *cc = CPU_GET_CLASS(cpu);
105
106 if (cc->dump_state) {
107 cpu_synchronize_state(cpu);
108 cc->dump_state(cpu, f, flags);
109 }
110 }
111
112 void cpu_reset(CPUState *cpu)
113 {
114 device_cold_reset(DEVICE(cpu));
115
116 trace_guest_cpu_reset(cpu);
117 }
118
119 static void cpu_common_reset(DeviceState *dev)
120 {
121 CPUState *cpu = CPU(dev);
122 CPUClass *cc = CPU_GET_CLASS(cpu);
123
124 if (qemu_loglevel_mask(CPU_LOG_RESET)) {
125 qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
126 log_cpu_state(cpu, cc->reset_dump_flags);
127 }
128
129 cpu->interrupt_request = 0;
130 cpu->halted = cpu->start_powered_off;
131 cpu->mem_io_pc = 0;
132 cpu->icount_extra = 0;
133 qatomic_set(&cpu->icount_decr_ptr->u32, 0);
134 cpu->can_do_io = 1;
135 cpu->exception_index = -1;
136 cpu->crash_occurred = false;
137 cpu->cflags_next_tb = -1;
138
139 if (tcg_enabled()) {
140 cpu_tb_jmp_cache_clear(cpu);
141
142 tcg_flush_softmmu_tlb(cpu);
143 }
144 }
145
146 static bool cpu_common_has_work(CPUState *cs)
147 {
148 return false;
149 }
150
151 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
152 {
153 CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
154
155 assert(cpu_model && cc->class_by_name);
156 return cc->class_by_name(cpu_model);
157 }
158
159 static void cpu_common_parse_features(const char *typename, char *features,
160 Error **errp)
161 {
162 char *val;
163 static bool cpu_globals_initialized;
164 /* Single "key=value" string being parsed */
165 char *featurestr = features ? strtok(features, ",") : NULL;
166
167 /* should be called only once, catch invalid users */
168 assert(!cpu_globals_initialized);
169 cpu_globals_initialized = true;
170
171 while (featurestr) {
172 val = strchr(featurestr, '=');
173 if (val) {
174 GlobalProperty *prop = g_new0(typeof(*prop), 1);
175 *val = 0;
176 val++;
177 prop->driver = typename;
178 prop->property = g_strdup(featurestr);
179 prop->value = g_strdup(val);
180 qdev_prop_register_global(prop);
181 } else {
182 error_setg(errp, "Expected key=value format, found %s.",
183 featurestr);
184 return;
185 }
186 featurestr = strtok(NULL, ",");
187 }
188 }
189
190 static void cpu_common_realizefn(DeviceState *dev, Error **errp)
191 {
192 CPUState *cpu = CPU(dev);
193 Object *machine = qdev_get_machine();
194
195 /* qdev_get_machine() can return something that's not TYPE_MACHINE
196 * if this is one of the user-only emulators; in that case there's
197 * no need to check the ignore_memory_transaction_failures board flag.
198 */
199 if (object_dynamic_cast(machine, TYPE_MACHINE)) {
200 ObjectClass *oc = object_get_class(machine);
201 MachineClass *mc = MACHINE_CLASS(oc);
202
203 if (mc) {
204 cpu->ignore_memory_transaction_failures =
205 mc->ignore_memory_transaction_failures;
206 }
207 }
208
209 if (dev->hotplugged) {
210 cpu_synchronize_post_init(cpu);
211 cpu_resume(cpu);
212 }
213
214 /* NOTE: latest generic point where the cpu is fully realized */
215 trace_init_vcpu(cpu);
216 }
217
218 static void cpu_common_unrealizefn(DeviceState *dev)
219 {
220 CPUState *cpu = CPU(dev);
221
222 /* NOTE: latest generic point before the cpu is fully unrealized */
223 trace_fini_vcpu(cpu);
224 cpu_exec_unrealizefn(cpu);
225 }
226
227 static void cpu_common_initfn(Object *obj)
228 {
229 CPUState *cpu = CPU(obj);
230 CPUClass *cc = CPU_GET_CLASS(obj);
231
232 cpu->cpu_index = UNASSIGNED_CPU_INDEX;
233 cpu->cluster_index = UNASSIGNED_CLUSTER_INDEX;
234 cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
235 /* *-user doesn't have configurable SMP topology */
236 /* the default value is changed by qemu_init_vcpu() for softmmu */
237 cpu->nr_cores = 1;
238 cpu->nr_threads = 1;
239
240 qemu_mutex_init(&cpu->work_mutex);
241 QSIMPLEQ_INIT(&cpu->work_list);
242 QTAILQ_INIT(&cpu->breakpoints);
243 QTAILQ_INIT(&cpu->watchpoints);
244
245 cpu_exec_initfn(cpu);
246 }
247
248 static void cpu_common_finalize(Object *obj)
249 {
250 CPUState *cpu = CPU(obj);
251
252 qemu_mutex_destroy(&cpu->work_mutex);
253 }
254
255 static int64_t cpu_common_get_arch_id(CPUState *cpu)
256 {
257 return cpu->cpu_index;
258 }
259
260 static void cpu_class_init(ObjectClass *klass, void *data)
261 {
262 DeviceClass *dc = DEVICE_CLASS(klass);
263 CPUClass *k = CPU_CLASS(klass);
264
265 k->parse_features = cpu_common_parse_features;
266 k->get_arch_id = cpu_common_get_arch_id;
267 k->has_work = cpu_common_has_work;
268 k->gdb_read_register = cpu_common_gdb_read_register;
269 k->gdb_write_register = cpu_common_gdb_write_register;
270 set_bit(DEVICE_CATEGORY_CPU, dc->categories);
271 dc->realize = cpu_common_realizefn;
272 dc->unrealize = cpu_common_unrealizefn;
273 dc->reset = cpu_common_reset;
274 cpu_class_init_props(dc);
275 /*
276 * Reason: CPUs still need special care by board code: wiring up
277 * IRQs, adding reset handlers, halting non-first CPUs, ...
278 */
279 dc->user_creatable = false;
280 }
281
282 static const TypeInfo cpu_type_info = {
283 .name = TYPE_CPU,
284 .parent = TYPE_DEVICE,
285 .instance_size = sizeof(CPUState),
286 .instance_init = cpu_common_initfn,
287 .instance_finalize = cpu_common_finalize,
288 .abstract = true,
289 .class_size = sizeof(CPUClass),
290 .class_init = cpu_class_init,
291 };
292
293 static void cpu_register_types(void)
294 {
295 type_register_static(&cpu_type_info);
296 }
297
298 type_init(cpu_register_types)