Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-request...
[qemu.git] / hw / core / cpu.c
1 /*
2 * QEMU CPU model
3 *
4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
19 */
20
21 #include "qemu/osdep.h"
22 #include "qapi/error.h"
23 #include "hw/core/cpu.h"
24 #include "sysemu/hw_accel.h"
25 #include "qemu/notify.h"
26 #include "qemu/log.h"
27 #include "qemu/main-loop.h"
28 #include "exec/log.h"
29 #include "qemu/error-report.h"
30 #include "qemu/qemu-print.h"
31 #include "sysemu/tcg.h"
32 #include "hw/boards.h"
33 #include "hw/qdev-properties.h"
34 #include "trace-root.h"
35 #include "qemu/plugin.h"
36
37 CPUInterruptHandler cpu_interrupt_handler;
38
39 CPUState *cpu_by_arch_id(int64_t id)
40 {
41 CPUState *cpu;
42
43 CPU_FOREACH(cpu) {
44 CPUClass *cc = CPU_GET_CLASS(cpu);
45
46 if (cc->get_arch_id(cpu) == id) {
47 return cpu;
48 }
49 }
50 return NULL;
51 }
52
53 bool cpu_exists(int64_t id)
54 {
55 return !!cpu_by_arch_id(id);
56 }
57
58 CPUState *cpu_create(const char *typename)
59 {
60 Error *err = NULL;
61 CPUState *cpu = CPU(object_new(typename));
62 object_property_set_bool(OBJECT(cpu), true, "realized", &err);
63 if (err != NULL) {
64 error_report_err(err);
65 object_unref(OBJECT(cpu));
66 exit(EXIT_FAILURE);
67 }
68 return cpu;
69 }
70
71 bool cpu_paging_enabled(const CPUState *cpu)
72 {
73 CPUClass *cc = CPU_GET_CLASS(cpu);
74
75 return cc->get_paging_enabled(cpu);
76 }
77
78 static bool cpu_common_get_paging_enabled(const CPUState *cpu)
79 {
80 return false;
81 }
82
83 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
84 Error **errp)
85 {
86 CPUClass *cc = CPU_GET_CLASS(cpu);
87
88 cc->get_memory_mapping(cpu, list, errp);
89 }
90
91 static void cpu_common_get_memory_mapping(CPUState *cpu,
92 MemoryMappingList *list,
93 Error **errp)
94 {
95 error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
96 }
97
98 /* Resetting the IRQ comes from across the code base so we take the
99 * BQL here if we need to. cpu_interrupt assumes it is held.*/
100 void cpu_reset_interrupt(CPUState *cpu, int mask)
101 {
102 bool need_lock = !qemu_mutex_iothread_locked();
103
104 if (need_lock) {
105 qemu_mutex_lock_iothread();
106 }
107 cpu->interrupt_request &= ~mask;
108 if (need_lock) {
109 qemu_mutex_unlock_iothread();
110 }
111 }
112
113 void cpu_exit(CPUState *cpu)
114 {
115 atomic_set(&cpu->exit_request, 1);
116 /* Ensure cpu_exec will see the exit request after TCG has exited. */
117 smp_wmb();
118 atomic_set(&cpu->icount_decr_ptr->u16.high, -1);
119 }
120
121 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
122 void *opaque)
123 {
124 CPUClass *cc = CPU_GET_CLASS(cpu);
125
126 return (*cc->write_elf32_qemunote)(f, cpu, opaque);
127 }
128
129 static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f,
130 CPUState *cpu, void *opaque)
131 {
132 return 0;
133 }
134
135 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
136 int cpuid, void *opaque)
137 {
138 CPUClass *cc = CPU_GET_CLASS(cpu);
139
140 return (*cc->write_elf32_note)(f, cpu, cpuid, opaque);
141 }
142
143 static int cpu_common_write_elf32_note(WriteCoreDumpFunction f,
144 CPUState *cpu, int cpuid,
145 void *opaque)
146 {
147 return -1;
148 }
149
150 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
151 void *opaque)
152 {
153 CPUClass *cc = CPU_GET_CLASS(cpu);
154
155 return (*cc->write_elf64_qemunote)(f, cpu, opaque);
156 }
157
158 static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f,
159 CPUState *cpu, void *opaque)
160 {
161 return 0;
162 }
163
164 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
165 int cpuid, void *opaque)
166 {
167 CPUClass *cc = CPU_GET_CLASS(cpu);
168
169 return (*cc->write_elf64_note)(f, cpu, cpuid, opaque);
170 }
171
172 static int cpu_common_write_elf64_note(WriteCoreDumpFunction f,
173 CPUState *cpu, int cpuid,
174 void *opaque)
175 {
176 return -1;
177 }
178
179
180 static int cpu_common_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg)
181 {
182 return 0;
183 }
184
185 static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
186 {
187 return 0;
188 }
189
190 static bool cpu_common_debug_check_watchpoint(CPUState *cpu, CPUWatchpoint *wp)
191 {
192 /* If no extra check is required, QEMU watchpoint match can be considered
193 * as an architectural match.
194 */
195 return true;
196 }
197
198 static bool cpu_common_virtio_is_big_endian(CPUState *cpu)
199 {
200 return target_words_bigendian();
201 }
202
203 static void cpu_common_noop(CPUState *cpu)
204 {
205 }
206
207 static bool cpu_common_exec_interrupt(CPUState *cpu, int int_req)
208 {
209 return false;
210 }
211
212 GuestPanicInformation *cpu_get_crash_info(CPUState *cpu)
213 {
214 CPUClass *cc = CPU_GET_CLASS(cpu);
215 GuestPanicInformation *res = NULL;
216
217 if (cc->get_crash_info) {
218 res = cc->get_crash_info(cpu);
219 }
220 return res;
221 }
222
223 void cpu_dump_state(CPUState *cpu, FILE *f, int flags)
224 {
225 CPUClass *cc = CPU_GET_CLASS(cpu);
226
227 if (cc->dump_state) {
228 cpu_synchronize_state(cpu);
229 cc->dump_state(cpu, f, flags);
230 }
231 }
232
233 void cpu_dump_statistics(CPUState *cpu, int flags)
234 {
235 CPUClass *cc = CPU_GET_CLASS(cpu);
236
237 if (cc->dump_statistics) {
238 cc->dump_statistics(cpu, flags);
239 }
240 }
241
242 void cpu_reset(CPUState *cpu)
243 {
244 device_cold_reset(DEVICE(cpu));
245
246 trace_guest_cpu_reset(cpu);
247 }
248
249 static void cpu_common_reset(DeviceState *dev)
250 {
251 CPUState *cpu = CPU(dev);
252 CPUClass *cc = CPU_GET_CLASS(cpu);
253
254 if (qemu_loglevel_mask(CPU_LOG_RESET)) {
255 qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
256 log_cpu_state(cpu, cc->reset_dump_flags);
257 }
258
259 cpu->interrupt_request = 0;
260 cpu->halted = 0;
261 cpu->mem_io_pc = 0;
262 cpu->icount_extra = 0;
263 atomic_set(&cpu->icount_decr_ptr->u32, 0);
264 cpu->can_do_io = 1;
265 cpu->exception_index = -1;
266 cpu->crash_occurred = false;
267 cpu->cflags_next_tb = -1;
268
269 if (tcg_enabled()) {
270 cpu_tb_jmp_cache_clear(cpu);
271
272 tcg_flush_softmmu_tlb(cpu);
273 }
274 }
275
276 static bool cpu_common_has_work(CPUState *cs)
277 {
278 return false;
279 }
280
281 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
282 {
283 CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
284
285 assert(cpu_model && cc->class_by_name);
286 return cc->class_by_name(cpu_model);
287 }
288
289 static void cpu_common_parse_features(const char *typename, char *features,
290 Error **errp)
291 {
292 char *val;
293 static bool cpu_globals_initialized;
294 /* Single "key=value" string being parsed */
295 char *featurestr = features ? strtok(features, ",") : NULL;
296
297 /* should be called only once, catch invalid users */
298 assert(!cpu_globals_initialized);
299 cpu_globals_initialized = true;
300
301 while (featurestr) {
302 val = strchr(featurestr, '=');
303 if (val) {
304 GlobalProperty *prop = g_new0(typeof(*prop), 1);
305 *val = 0;
306 val++;
307 prop->driver = typename;
308 prop->property = g_strdup(featurestr);
309 prop->value = g_strdup(val);
310 qdev_prop_register_global(prop);
311 } else {
312 error_setg(errp, "Expected key=value format, found %s.",
313 featurestr);
314 return;
315 }
316 featurestr = strtok(NULL, ",");
317 }
318 }
319
320 static void cpu_common_realizefn(DeviceState *dev, Error **errp)
321 {
322 CPUState *cpu = CPU(dev);
323 Object *machine = qdev_get_machine();
324
325 /* qdev_get_machine() can return something that's not TYPE_MACHINE
326 * if this is one of the user-only emulators; in that case there's
327 * no need to check the ignore_memory_transaction_failures board flag.
328 */
329 if (object_dynamic_cast(machine, TYPE_MACHINE)) {
330 ObjectClass *oc = object_get_class(machine);
331 MachineClass *mc = MACHINE_CLASS(oc);
332
333 if (mc) {
334 cpu->ignore_memory_transaction_failures =
335 mc->ignore_memory_transaction_failures;
336 }
337 }
338
339 if (dev->hotplugged) {
340 cpu_synchronize_post_init(cpu);
341 cpu_resume(cpu);
342 }
343
344 /* NOTE: latest generic point where the cpu is fully realized */
345 trace_init_vcpu(cpu);
346 }
347
348 static void cpu_common_unrealizefn(DeviceState *dev, Error **errp)
349 {
350 CPUState *cpu = CPU(dev);
351 /* NOTE: latest generic point before the cpu is fully unrealized */
352 trace_fini_vcpu(cpu);
353 qemu_plugin_vcpu_exit_hook(cpu);
354 cpu_exec_unrealizefn(cpu);
355 }
356
357 static void cpu_common_initfn(Object *obj)
358 {
359 CPUState *cpu = CPU(obj);
360 CPUClass *cc = CPU_GET_CLASS(obj);
361
362 cpu->cpu_index = UNASSIGNED_CPU_INDEX;
363 cpu->cluster_index = UNASSIGNED_CLUSTER_INDEX;
364 cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
365 /* *-user doesn't have configurable SMP topology */
366 /* the default value is changed by qemu_init_vcpu() for softmmu */
367 cpu->nr_cores = 1;
368 cpu->nr_threads = 1;
369
370 qemu_mutex_init(&cpu->work_mutex);
371 QTAILQ_INIT(&cpu->breakpoints);
372 QTAILQ_INIT(&cpu->watchpoints);
373
374 cpu_exec_initfn(cpu);
375 }
376
377 static void cpu_common_finalize(Object *obj)
378 {
379 CPUState *cpu = CPU(obj);
380
381 qemu_mutex_destroy(&cpu->work_mutex);
382 }
383
384 static int64_t cpu_common_get_arch_id(CPUState *cpu)
385 {
386 return cpu->cpu_index;
387 }
388
389 static vaddr cpu_adjust_watchpoint_address(CPUState *cpu, vaddr addr, int len)
390 {
391 return addr;
392 }
393
394 static void generic_handle_interrupt(CPUState *cpu, int mask)
395 {
396 cpu->interrupt_request |= mask;
397
398 if (!qemu_cpu_is_self(cpu)) {
399 qemu_cpu_kick(cpu);
400 }
401 }
402
403 CPUInterruptHandler cpu_interrupt_handler = generic_handle_interrupt;
404
405 static void cpu_class_init(ObjectClass *klass, void *data)
406 {
407 DeviceClass *dc = DEVICE_CLASS(klass);
408 CPUClass *k = CPU_CLASS(klass);
409
410 k->parse_features = cpu_common_parse_features;
411 k->get_arch_id = cpu_common_get_arch_id;
412 k->has_work = cpu_common_has_work;
413 k->get_paging_enabled = cpu_common_get_paging_enabled;
414 k->get_memory_mapping = cpu_common_get_memory_mapping;
415 k->write_elf32_qemunote = cpu_common_write_elf32_qemunote;
416 k->write_elf32_note = cpu_common_write_elf32_note;
417 k->write_elf64_qemunote = cpu_common_write_elf64_qemunote;
418 k->write_elf64_note = cpu_common_write_elf64_note;
419 k->gdb_read_register = cpu_common_gdb_read_register;
420 k->gdb_write_register = cpu_common_gdb_write_register;
421 k->virtio_is_big_endian = cpu_common_virtio_is_big_endian;
422 k->debug_excp_handler = cpu_common_noop;
423 k->debug_check_watchpoint = cpu_common_debug_check_watchpoint;
424 k->cpu_exec_enter = cpu_common_noop;
425 k->cpu_exec_exit = cpu_common_noop;
426 k->cpu_exec_interrupt = cpu_common_exec_interrupt;
427 k->adjust_watchpoint_address = cpu_adjust_watchpoint_address;
428 set_bit(DEVICE_CATEGORY_CPU, dc->categories);
429 dc->realize = cpu_common_realizefn;
430 dc->unrealize = cpu_common_unrealizefn;
431 dc->reset = cpu_common_reset;
432 device_class_set_props(dc, cpu_common_props);
433 /*
434 * Reason: CPUs still need special care by board code: wiring up
435 * IRQs, adding reset handlers, halting non-first CPUs, ...
436 */
437 dc->user_creatable = false;
438 }
439
440 static const TypeInfo cpu_type_info = {
441 .name = TYPE_CPU,
442 .parent = TYPE_DEVICE,
443 .instance_size = sizeof(CPUState),
444 .instance_init = cpu_common_initfn,
445 .instance_finalize = cpu_common_finalize,
446 .abstract = true,
447 .class_size = sizeof(CPUClass),
448 .class_init = cpu_class_init,
449 };
450
451 static void cpu_register_types(void)
452 {
453 type_register_static(&cpu_type_info);
454 }
455
456 type_init(cpu_register_types)