meson: convert hw/vfio
[qemu.git] / hw / core / machine.c
1 /*
2 * QEMU Machine
3 *
4 * Copyright (C) 2014 Red Hat Inc
5 *
6 * Authors:
7 * Marcel Apfelbaum <marcel.a@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
11 */
12
13 #include "qemu/osdep.h"
14 #include "qemu/option.h"
15 #include "qapi/qmp/qerror.h"
16 #include "sysemu/replay.h"
17 #include "qemu/units.h"
18 #include "hw/boards.h"
19 #include "qapi/error.h"
20 #include "qapi/qapi-visit-common.h"
21 #include "qapi/visitor.h"
22 #include "hw/sysbus.h"
23 #include "sysemu/sysemu.h"
24 #include "sysemu/numa.h"
25 #include "qemu/error-report.h"
26 #include "sysemu/qtest.h"
27 #include "hw/pci/pci.h"
28 #include "hw/mem/nvdimm.h"
29 #include "migration/vmstate.h"
30
31 GlobalProperty hw_compat_5_0[] = {
32 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" },
33 { "virtio-balloon-device", "page-poison", "false" },
34 { "vmport", "x-read-set-eax", "off" },
35 { "vmport", "x-signal-unsupported-cmd", "off" },
36 { "vmport", "x-report-vmx-type", "off" },
37 { "vmport", "x-cmds-v2", "off" },
38 };
39 const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0);
40
41 GlobalProperty hw_compat_4_2[] = {
42 { "virtio-blk-device", "queue-size", "128"},
43 { "virtio-scsi-device", "virtqueue_size", "128"},
44 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
45 { "virtio-blk-device", "seg-max-adjust", "off"},
46 { "virtio-scsi-device", "seg_max_adjust", "off"},
47 { "vhost-blk-device", "seg_max_adjust", "off"},
48 { "usb-host", "suppress-remote-wake", "off" },
49 { "usb-redir", "suppress-remote-wake", "off" },
50 { "qxl", "revision", "4" },
51 { "qxl-vga", "revision", "4" },
52 { "fw_cfg", "acpi-mr-restore", "false" },
53 };
54 const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2);
55
56 GlobalProperty hw_compat_4_1[] = {
57 { "virtio-pci", "x-pcie-flr-init", "off" },
58 { "virtio-device", "use-disabled-flag", "false" },
59 };
60 const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1);
61
62 GlobalProperty hw_compat_4_0[] = {
63 { "VGA", "edid", "false" },
64 { "secondary-vga", "edid", "false" },
65 { "bochs-display", "edid", "false" },
66 { "virtio-vga", "edid", "false" },
67 { "virtio-gpu-device", "edid", "false" },
68 { "virtio-device", "use-started", "false" },
69 { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
70 { "pl031", "migrate-tick-offset", "false" },
71 };
72 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0);
73
74 GlobalProperty hw_compat_3_1[] = {
75 { "pcie-root-port", "x-speed", "2_5" },
76 { "pcie-root-port", "x-width", "1" },
77 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
78 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
79 { "tpm-crb", "ppi", "false" },
80 { "tpm-tis", "ppi", "false" },
81 { "usb-kbd", "serial", "42" },
82 { "usb-mouse", "serial", "42" },
83 { "usb-tablet", "serial", "42" },
84 { "virtio-blk-device", "discard", "false" },
85 { "virtio-blk-device", "write-zeroes", "false" },
86 { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
87 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
88 };
89 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1);
90
91 GlobalProperty hw_compat_3_0[] = {};
92 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0);
93
94 GlobalProperty hw_compat_2_12[] = {
95 { "migration", "decompress-error-check", "off" },
96 { "hda-audio", "use-timer", "false" },
97 { "cirrus-vga", "global-vmstate", "true" },
98 { "VGA", "global-vmstate", "true" },
99 { "vmware-svga", "global-vmstate", "true" },
100 { "qxl-vga", "global-vmstate", "true" },
101 };
102 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12);
103
104 GlobalProperty hw_compat_2_11[] = {
105 { "hpet", "hpet-offset-saved", "false" },
106 { "virtio-blk-pci", "vectors", "2" },
107 { "vhost-user-blk-pci", "vectors", "2" },
108 { "e1000", "migrate_tso_props", "off" },
109 };
110 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11);
111
112 GlobalProperty hw_compat_2_10[] = {
113 { "virtio-mouse-device", "wheel-axis", "false" },
114 { "virtio-tablet-device", "wheel-axis", "false" },
115 };
116 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10);
117
118 GlobalProperty hw_compat_2_9[] = {
119 { "pci-bridge", "shpc", "off" },
120 { "intel-iommu", "pt", "off" },
121 { "virtio-net-device", "x-mtu-bypass-backend", "off" },
122 { "pcie-root-port", "x-migrate-msix", "false" },
123 };
124 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9);
125
126 GlobalProperty hw_compat_2_8[] = {
127 { "fw_cfg_mem", "x-file-slots", "0x10" },
128 { "fw_cfg_io", "x-file-slots", "0x10" },
129 { "pflash_cfi01", "old-multiple-chip-handling", "on" },
130 { "pci-bridge", "shpc", "on" },
131 { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" },
132 { "virtio-pci", "x-pcie-deverr-init", "off" },
133 { "virtio-pci", "x-pcie-lnkctl-init", "off" },
134 { "virtio-pci", "x-pcie-pm-init", "off" },
135 { "cirrus-vga", "vgamem_mb", "8" },
136 { "isa-cirrus-vga", "vgamem_mb", "8" },
137 };
138 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8);
139
140 GlobalProperty hw_compat_2_7[] = {
141 { "virtio-pci", "page-per-vq", "on" },
142 { "virtio-serial-device", "emergency-write", "off" },
143 { "ioapic", "version", "0x11" },
144 { "intel-iommu", "x-buggy-eim", "true" },
145 { "virtio-pci", "x-ignore-backend-features", "on" },
146 };
147 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7);
148
149 GlobalProperty hw_compat_2_6[] = {
150 { "virtio-mmio", "format_transport_address", "off" },
151 /* Optional because not all virtio-pci devices support legacy mode */
152 { "virtio-pci", "disable-modern", "on", .optional = true },
153 { "virtio-pci", "disable-legacy", "off", .optional = true },
154 };
155 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6);
156
157 GlobalProperty hw_compat_2_5[] = {
158 { "isa-fdc", "fallback", "144" },
159 { "pvscsi", "x-old-pci-configuration", "on" },
160 { "pvscsi", "x-disable-pcie", "on" },
161 { "vmxnet3", "x-old-msi-offsets", "on" },
162 { "vmxnet3", "x-disable-pcie", "on" },
163 };
164 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5);
165
166 GlobalProperty hw_compat_2_4[] = {
167 /* Optional because the 'scsi' property is Linux-only */
168 { "virtio-blk-device", "scsi", "true", .optional = true },
169 { "e1000", "extra_mac_registers", "off" },
170 { "virtio-pci", "x-disable-pcie", "on" },
171 { "virtio-pci", "migrate-extra", "off" },
172 { "fw_cfg_mem", "dma_enabled", "off" },
173 { "fw_cfg_io", "dma_enabled", "off" }
174 };
175 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4);
176
177 GlobalProperty hw_compat_2_3[] = {
178 { "virtio-blk-pci", "any_layout", "off" },
179 { "virtio-balloon-pci", "any_layout", "off" },
180 { "virtio-serial-pci", "any_layout", "off" },
181 { "virtio-9p-pci", "any_layout", "off" },
182 { "virtio-rng-pci", "any_layout", "off" },
183 { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" },
184 { "migration", "send-configuration", "off" },
185 { "migration", "send-section-footer", "off" },
186 { "migration", "store-global-state", "off" },
187 };
188 const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3);
189
190 GlobalProperty hw_compat_2_2[] = {};
191 const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2);
192
193 GlobalProperty hw_compat_2_1[] = {
194 { "intel-hda", "old_msi_addr", "on" },
195 { "VGA", "qemu-extended-regs", "off" },
196 { "secondary-vga", "qemu-extended-regs", "off" },
197 { "virtio-scsi-pci", "any_layout", "off" },
198 { "usb-mouse", "usb_version", "1" },
199 { "usb-kbd", "usb_version", "1" },
200 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
201 };
202 const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1);
203
204 static char *machine_get_kernel(Object *obj, Error **errp)
205 {
206 MachineState *ms = MACHINE(obj);
207
208 return g_strdup(ms->kernel_filename);
209 }
210
211 static void machine_set_kernel(Object *obj, const char *value, Error **errp)
212 {
213 MachineState *ms = MACHINE(obj);
214
215 g_free(ms->kernel_filename);
216 ms->kernel_filename = g_strdup(value);
217 }
218
219 static char *machine_get_initrd(Object *obj, Error **errp)
220 {
221 MachineState *ms = MACHINE(obj);
222
223 return g_strdup(ms->initrd_filename);
224 }
225
226 static void machine_set_initrd(Object *obj, const char *value, Error **errp)
227 {
228 MachineState *ms = MACHINE(obj);
229
230 g_free(ms->initrd_filename);
231 ms->initrd_filename = g_strdup(value);
232 }
233
234 static char *machine_get_append(Object *obj, Error **errp)
235 {
236 MachineState *ms = MACHINE(obj);
237
238 return g_strdup(ms->kernel_cmdline);
239 }
240
241 static void machine_set_append(Object *obj, const char *value, Error **errp)
242 {
243 MachineState *ms = MACHINE(obj);
244
245 g_free(ms->kernel_cmdline);
246 ms->kernel_cmdline = g_strdup(value);
247 }
248
249 static char *machine_get_dtb(Object *obj, Error **errp)
250 {
251 MachineState *ms = MACHINE(obj);
252
253 return g_strdup(ms->dtb);
254 }
255
256 static void machine_set_dtb(Object *obj, const char *value, Error **errp)
257 {
258 MachineState *ms = MACHINE(obj);
259
260 g_free(ms->dtb);
261 ms->dtb = g_strdup(value);
262 }
263
264 static char *machine_get_dumpdtb(Object *obj, Error **errp)
265 {
266 MachineState *ms = MACHINE(obj);
267
268 return g_strdup(ms->dumpdtb);
269 }
270
271 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp)
272 {
273 MachineState *ms = MACHINE(obj);
274
275 g_free(ms->dumpdtb);
276 ms->dumpdtb = g_strdup(value);
277 }
278
279 static void machine_get_phandle_start(Object *obj, Visitor *v,
280 const char *name, void *opaque,
281 Error **errp)
282 {
283 MachineState *ms = MACHINE(obj);
284 int64_t value = ms->phandle_start;
285
286 visit_type_int(v, name, &value, errp);
287 }
288
289 static void machine_set_phandle_start(Object *obj, Visitor *v,
290 const char *name, void *opaque,
291 Error **errp)
292 {
293 MachineState *ms = MACHINE(obj);
294 int64_t value;
295
296 if (!visit_type_int(v, name, &value, errp)) {
297 return;
298 }
299
300 ms->phandle_start = value;
301 }
302
303 static char *machine_get_dt_compatible(Object *obj, Error **errp)
304 {
305 MachineState *ms = MACHINE(obj);
306
307 return g_strdup(ms->dt_compatible);
308 }
309
310 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp)
311 {
312 MachineState *ms = MACHINE(obj);
313
314 g_free(ms->dt_compatible);
315 ms->dt_compatible = g_strdup(value);
316 }
317
318 static bool machine_get_dump_guest_core(Object *obj, Error **errp)
319 {
320 MachineState *ms = MACHINE(obj);
321
322 return ms->dump_guest_core;
323 }
324
325 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp)
326 {
327 MachineState *ms = MACHINE(obj);
328
329 ms->dump_guest_core = value;
330 }
331
332 static bool machine_get_mem_merge(Object *obj, Error **errp)
333 {
334 MachineState *ms = MACHINE(obj);
335
336 return ms->mem_merge;
337 }
338
339 static void machine_set_mem_merge(Object *obj, bool value, Error **errp)
340 {
341 MachineState *ms = MACHINE(obj);
342
343 ms->mem_merge = value;
344 }
345
346 static bool machine_get_usb(Object *obj, Error **errp)
347 {
348 MachineState *ms = MACHINE(obj);
349
350 return ms->usb;
351 }
352
353 static void machine_set_usb(Object *obj, bool value, Error **errp)
354 {
355 MachineState *ms = MACHINE(obj);
356
357 ms->usb = value;
358 ms->usb_disabled = !value;
359 }
360
361 static bool machine_get_graphics(Object *obj, Error **errp)
362 {
363 MachineState *ms = MACHINE(obj);
364
365 return ms->enable_graphics;
366 }
367
368 static void machine_set_graphics(Object *obj, bool value, Error **errp)
369 {
370 MachineState *ms = MACHINE(obj);
371
372 ms->enable_graphics = value;
373 }
374
375 static char *machine_get_firmware(Object *obj, Error **errp)
376 {
377 MachineState *ms = MACHINE(obj);
378
379 return g_strdup(ms->firmware);
380 }
381
382 static void machine_set_firmware(Object *obj, const char *value, Error **errp)
383 {
384 MachineState *ms = MACHINE(obj);
385
386 g_free(ms->firmware);
387 ms->firmware = g_strdup(value);
388 }
389
390 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp)
391 {
392 MachineState *ms = MACHINE(obj);
393
394 ms->suppress_vmdesc = value;
395 }
396
397 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp)
398 {
399 MachineState *ms = MACHINE(obj);
400
401 return ms->suppress_vmdesc;
402 }
403
404 static void machine_set_enforce_config_section(Object *obj, bool value,
405 Error **errp)
406 {
407 MachineState *ms = MACHINE(obj);
408
409 warn_report("enforce-config-section is deprecated, please use "
410 "-global migration.send-configuration=on|off instead");
411
412 ms->enforce_config_section = value;
413 }
414
415 static bool machine_get_enforce_config_section(Object *obj, Error **errp)
416 {
417 MachineState *ms = MACHINE(obj);
418
419 return ms->enforce_config_section;
420 }
421
422 static char *machine_get_memory_encryption(Object *obj, Error **errp)
423 {
424 MachineState *ms = MACHINE(obj);
425
426 return g_strdup(ms->memory_encryption);
427 }
428
429 static void machine_set_memory_encryption(Object *obj, const char *value,
430 Error **errp)
431 {
432 MachineState *ms = MACHINE(obj);
433
434 g_free(ms->memory_encryption);
435 ms->memory_encryption = g_strdup(value);
436
437 /*
438 * With memory encryption, the host can't see the real contents of RAM,
439 * so there's no point in it trying to merge areas.
440 */
441 if (value) {
442 machine_set_mem_merge(obj, false, errp);
443 }
444 }
445
446 static bool machine_get_nvdimm(Object *obj, Error **errp)
447 {
448 MachineState *ms = MACHINE(obj);
449
450 return ms->nvdimms_state->is_enabled;
451 }
452
453 static void machine_set_nvdimm(Object *obj, bool value, Error **errp)
454 {
455 MachineState *ms = MACHINE(obj);
456
457 ms->nvdimms_state->is_enabled = value;
458 }
459
460 static bool machine_get_hmat(Object *obj, Error **errp)
461 {
462 MachineState *ms = MACHINE(obj);
463
464 return ms->numa_state->hmat_enabled;
465 }
466
467 static void machine_set_hmat(Object *obj, bool value, Error **errp)
468 {
469 MachineState *ms = MACHINE(obj);
470
471 ms->numa_state->hmat_enabled = value;
472 }
473
474 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp)
475 {
476 MachineState *ms = MACHINE(obj);
477
478 return g_strdup(ms->nvdimms_state->persistence_string);
479 }
480
481 static void machine_set_nvdimm_persistence(Object *obj, const char *value,
482 Error **errp)
483 {
484 MachineState *ms = MACHINE(obj);
485 NVDIMMState *nvdimms_state = ms->nvdimms_state;
486
487 if (strcmp(value, "cpu") == 0) {
488 nvdimms_state->persistence = 3;
489 } else if (strcmp(value, "mem-ctrl") == 0) {
490 nvdimms_state->persistence = 2;
491 } else {
492 error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option",
493 value);
494 return;
495 }
496
497 g_free(nvdimms_state->persistence_string);
498 nvdimms_state->persistence_string = g_strdup(value);
499 }
500
501 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type)
502 {
503 strList *item = g_new0(strList, 1);
504
505 item->value = g_strdup(type);
506 item->next = mc->allowed_dynamic_sysbus_devices;
507 mc->allowed_dynamic_sysbus_devices = item;
508 }
509
510 static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque)
511 {
512 MachineState *machine = opaque;
513 MachineClass *mc = MACHINE_GET_CLASS(machine);
514 bool allowed = false;
515 strList *wl;
516
517 for (wl = mc->allowed_dynamic_sysbus_devices;
518 !allowed && wl;
519 wl = wl->next) {
520 allowed |= !!object_dynamic_cast(OBJECT(sbdev), wl->value);
521 }
522
523 if (!allowed) {
524 error_report("Option '-device %s' cannot be handled by this machine",
525 object_class_get_name(object_get_class(OBJECT(sbdev))));
526 exit(1);
527 }
528 }
529
530 static char *machine_get_memdev(Object *obj, Error **errp)
531 {
532 MachineState *ms = MACHINE(obj);
533
534 return g_strdup(ms->ram_memdev_id);
535 }
536
537 static void machine_set_memdev(Object *obj, const char *value, Error **errp)
538 {
539 MachineState *ms = MACHINE(obj);
540
541 g_free(ms->ram_memdev_id);
542 ms->ram_memdev_id = g_strdup(value);
543 }
544
545
546 static void machine_init_notify(Notifier *notifier, void *data)
547 {
548 MachineState *machine = MACHINE(qdev_get_machine());
549
550 /*
551 * Loop through all dynamically created sysbus devices and check if they are
552 * all allowed. If a device is not allowed, error out.
553 */
554 foreach_dynamic_sysbus_device(validate_sysbus_device, machine);
555 }
556
557 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine)
558 {
559 int i;
560 HotpluggableCPUList *head = NULL;
561 MachineClass *mc = MACHINE_GET_CLASS(machine);
562
563 /* force board to initialize possible_cpus if it hasn't been done yet */
564 mc->possible_cpu_arch_ids(machine);
565
566 for (i = 0; i < machine->possible_cpus->len; i++) {
567 Object *cpu;
568 HotpluggableCPUList *list_item = g_new0(typeof(*list_item), 1);
569 HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1);
570
571 cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type);
572 cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count;
573 cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props,
574 sizeof(*cpu_item->props));
575
576 cpu = machine->possible_cpus->cpus[i].cpu;
577 if (cpu) {
578 cpu_item->has_qom_path = true;
579 cpu_item->qom_path = object_get_canonical_path(cpu);
580 }
581 list_item->value = cpu_item;
582 list_item->next = head;
583 head = list_item;
584 }
585 return head;
586 }
587
588 /**
589 * machine_set_cpu_numa_node:
590 * @machine: machine object to modify
591 * @props: specifies which cpu objects to assign to
592 * numa node specified by @props.node_id
593 * @errp: if an error occurs, a pointer to an area to store the error
594 *
595 * Associate NUMA node specified by @props.node_id with cpu slots that
596 * match socket/core/thread-ids specified by @props. It's recommended to use
597 * query-hotpluggable-cpus.props values to specify affected cpu slots,
598 * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
599 *
600 * However for CLI convenience it's possible to pass in subset of properties,
601 * which would affect all cpu slots that match it.
602 * Ex for pc machine:
603 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
604 * -numa cpu,node-id=0,socket_id=0 \
605 * -numa cpu,node-id=1,socket_id=1
606 * will assign all child cores of socket 0 to node 0 and
607 * of socket 1 to node 1.
608 *
609 * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
610 * return error.
611 * Empty subset is disallowed and function will return with error in this case.
612 */
613 void machine_set_cpu_numa_node(MachineState *machine,
614 const CpuInstanceProperties *props, Error **errp)
615 {
616 MachineClass *mc = MACHINE_GET_CLASS(machine);
617 NodeInfo *numa_info = machine->numa_state->nodes;
618 bool match = false;
619 int i;
620
621 if (!mc->possible_cpu_arch_ids) {
622 error_setg(errp, "mapping of CPUs to NUMA node is not supported");
623 return;
624 }
625
626 /* disabling node mapping is not supported, forbid it */
627 assert(props->has_node_id);
628
629 /* force board to initialize possible_cpus if it hasn't been done yet */
630 mc->possible_cpu_arch_ids(machine);
631
632 for (i = 0; i < machine->possible_cpus->len; i++) {
633 CPUArchId *slot = &machine->possible_cpus->cpus[i];
634
635 /* reject unsupported by board properties */
636 if (props->has_thread_id && !slot->props.has_thread_id) {
637 error_setg(errp, "thread-id is not supported");
638 return;
639 }
640
641 if (props->has_core_id && !slot->props.has_core_id) {
642 error_setg(errp, "core-id is not supported");
643 return;
644 }
645
646 if (props->has_socket_id && !slot->props.has_socket_id) {
647 error_setg(errp, "socket-id is not supported");
648 return;
649 }
650
651 if (props->has_die_id && !slot->props.has_die_id) {
652 error_setg(errp, "die-id is not supported");
653 return;
654 }
655
656 /* skip slots with explicit mismatch */
657 if (props->has_thread_id && props->thread_id != slot->props.thread_id) {
658 continue;
659 }
660
661 if (props->has_core_id && props->core_id != slot->props.core_id) {
662 continue;
663 }
664
665 if (props->has_die_id && props->die_id != slot->props.die_id) {
666 continue;
667 }
668
669 if (props->has_socket_id && props->socket_id != slot->props.socket_id) {
670 continue;
671 }
672
673 /* reject assignment if slot is already assigned, for compatibility
674 * of legacy cpu_index mapping with SPAPR core based mapping do not
675 * error out if cpu thread and matched core have the same node-id */
676 if (slot->props.has_node_id &&
677 slot->props.node_id != props->node_id) {
678 error_setg(errp, "CPU is already assigned to node-id: %" PRId64,
679 slot->props.node_id);
680 return;
681 }
682
683 /* assign slot to node as it's matched '-numa cpu' key */
684 match = true;
685 slot->props.node_id = props->node_id;
686 slot->props.has_node_id = props->has_node_id;
687
688 if (machine->numa_state->hmat_enabled) {
689 if ((numa_info[props->node_id].initiator < MAX_NODES) &&
690 (props->node_id != numa_info[props->node_id].initiator)) {
691 error_setg(errp, "The initiator of CPU NUMA node %" PRId64
692 " should be itself", props->node_id);
693 return;
694 }
695 numa_info[props->node_id].has_cpu = true;
696 numa_info[props->node_id].initiator = props->node_id;
697 }
698 }
699
700 if (!match) {
701 error_setg(errp, "no match found");
702 }
703 }
704
705 static void smp_parse(MachineState *ms, QemuOpts *opts)
706 {
707 if (opts) {
708 unsigned cpus = qemu_opt_get_number(opts, "cpus", 0);
709 unsigned sockets = qemu_opt_get_number(opts, "sockets", 0);
710 unsigned cores = qemu_opt_get_number(opts, "cores", 0);
711 unsigned threads = qemu_opt_get_number(opts, "threads", 0);
712
713 /* compute missing values, prefer sockets over cores over threads */
714 if (cpus == 0 || sockets == 0) {
715 cores = cores > 0 ? cores : 1;
716 threads = threads > 0 ? threads : 1;
717 if (cpus == 0) {
718 sockets = sockets > 0 ? sockets : 1;
719 cpus = cores * threads * sockets;
720 } else {
721 ms->smp.max_cpus =
722 qemu_opt_get_number(opts, "maxcpus", cpus);
723 sockets = ms->smp.max_cpus / (cores * threads);
724 }
725 } else if (cores == 0) {
726 threads = threads > 0 ? threads : 1;
727 cores = cpus / (sockets * threads);
728 cores = cores > 0 ? cores : 1;
729 } else if (threads == 0) {
730 threads = cpus / (cores * sockets);
731 threads = threads > 0 ? threads : 1;
732 } else if (sockets * cores * threads < cpus) {
733 error_report("cpu topology: "
734 "sockets (%u) * cores (%u) * threads (%u) < "
735 "smp_cpus (%u)",
736 sockets, cores, threads, cpus);
737 exit(1);
738 }
739
740 ms->smp.max_cpus =
741 qemu_opt_get_number(opts, "maxcpus", cpus);
742
743 if (ms->smp.max_cpus < cpus) {
744 error_report("maxcpus must be equal to or greater than smp");
745 exit(1);
746 }
747
748 if (sockets * cores * threads > ms->smp.max_cpus) {
749 error_report("cpu topology: "
750 "sockets (%u) * cores (%u) * threads (%u) > "
751 "maxcpus (%u)",
752 sockets, cores, threads,
753 ms->smp.max_cpus);
754 exit(1);
755 }
756
757 if (sockets * cores * threads != ms->smp.max_cpus) {
758 warn_report("Invalid CPU topology deprecated: "
759 "sockets (%u) * cores (%u) * threads (%u) "
760 "!= maxcpus (%u)",
761 sockets, cores, threads,
762 ms->smp.max_cpus);
763 }
764
765 ms->smp.cpus = cpus;
766 ms->smp.cores = cores;
767 ms->smp.threads = threads;
768 ms->smp.sockets = sockets;
769 }
770
771 if (ms->smp.cpus > 1) {
772 Error *blocker = NULL;
773 error_setg(&blocker, QERR_REPLAY_NOT_SUPPORTED, "smp");
774 replay_add_blocker(blocker);
775 }
776 }
777
778 static void machine_class_init(ObjectClass *oc, void *data)
779 {
780 MachineClass *mc = MACHINE_CLASS(oc);
781
782 /* Default 128 MB as guest ram size */
783 mc->default_ram_size = 128 * MiB;
784 mc->rom_file_has_mr = true;
785 mc->smp_parse = smp_parse;
786
787 /* numa node memory size aligned on 8MB by default.
788 * On Linux, each node's border has to be 8MB aligned
789 */
790 mc->numa_mem_align_shift = 23;
791 mc->numa_auto_assign_ram = numa_default_auto_assign_ram;
792
793 object_class_property_add_str(oc, "kernel",
794 machine_get_kernel, machine_set_kernel);
795 object_class_property_set_description(oc, "kernel",
796 "Linux kernel image file");
797
798 object_class_property_add_str(oc, "initrd",
799 machine_get_initrd, machine_set_initrd);
800 object_class_property_set_description(oc, "initrd",
801 "Linux initial ramdisk file");
802
803 object_class_property_add_str(oc, "append",
804 machine_get_append, machine_set_append);
805 object_class_property_set_description(oc, "append",
806 "Linux kernel command line");
807
808 object_class_property_add_str(oc, "dtb",
809 machine_get_dtb, machine_set_dtb);
810 object_class_property_set_description(oc, "dtb",
811 "Linux kernel device tree file");
812
813 object_class_property_add_str(oc, "dumpdtb",
814 machine_get_dumpdtb, machine_set_dumpdtb);
815 object_class_property_set_description(oc, "dumpdtb",
816 "Dump current dtb to a file and quit");
817
818 object_class_property_add(oc, "phandle-start", "int",
819 machine_get_phandle_start, machine_set_phandle_start,
820 NULL, NULL);
821 object_class_property_set_description(oc, "phandle-start",
822 "The first phandle ID we may generate dynamically");
823
824 object_class_property_add_str(oc, "dt-compatible",
825 machine_get_dt_compatible, machine_set_dt_compatible);
826 object_class_property_set_description(oc, "dt-compatible",
827 "Overrides the \"compatible\" property of the dt root node");
828
829 object_class_property_add_bool(oc, "dump-guest-core",
830 machine_get_dump_guest_core, machine_set_dump_guest_core);
831 object_class_property_set_description(oc, "dump-guest-core",
832 "Include guest memory in a core dump");
833
834 object_class_property_add_bool(oc, "mem-merge",
835 machine_get_mem_merge, machine_set_mem_merge);
836 object_class_property_set_description(oc, "mem-merge",
837 "Enable/disable memory merge support");
838
839 object_class_property_add_bool(oc, "usb",
840 machine_get_usb, machine_set_usb);
841 object_class_property_set_description(oc, "usb",
842 "Set on/off to enable/disable usb");
843
844 object_class_property_add_bool(oc, "graphics",
845 machine_get_graphics, machine_set_graphics);
846 object_class_property_set_description(oc, "graphics",
847 "Set on/off to enable/disable graphics emulation");
848
849 object_class_property_add_str(oc, "firmware",
850 machine_get_firmware, machine_set_firmware);
851 object_class_property_set_description(oc, "firmware",
852 "Firmware image");
853
854 object_class_property_add_bool(oc, "suppress-vmdesc",
855 machine_get_suppress_vmdesc, machine_set_suppress_vmdesc);
856 object_class_property_set_description(oc, "suppress-vmdesc",
857 "Set on to disable self-describing migration");
858
859 object_class_property_add_bool(oc, "enforce-config-section",
860 machine_get_enforce_config_section, machine_set_enforce_config_section);
861 object_class_property_set_description(oc, "enforce-config-section",
862 "Set on to enforce configuration section migration");
863
864 object_class_property_add_str(oc, "memory-encryption",
865 machine_get_memory_encryption, machine_set_memory_encryption);
866 object_class_property_set_description(oc, "memory-encryption",
867 "Set memory encryption object to use");
868 }
869
870 static void machine_class_base_init(ObjectClass *oc, void *data)
871 {
872 if (!object_class_is_abstract(oc)) {
873 MachineClass *mc = MACHINE_CLASS(oc);
874 const char *cname = object_class_get_name(oc);
875 assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX));
876 mc->name = g_strndup(cname,
877 strlen(cname) - strlen(TYPE_MACHINE_SUFFIX));
878 mc->compat_props = g_ptr_array_new();
879 }
880 }
881
882 static void machine_initfn(Object *obj)
883 {
884 MachineState *ms = MACHINE(obj);
885 MachineClass *mc = MACHINE_GET_CLASS(obj);
886
887 ms->dump_guest_core = true;
888 ms->mem_merge = true;
889 ms->enable_graphics = true;
890
891 if (mc->nvdimm_supported) {
892 Object *obj = OBJECT(ms);
893
894 ms->nvdimms_state = g_new0(NVDIMMState, 1);
895 object_property_add_bool(obj, "nvdimm",
896 machine_get_nvdimm, machine_set_nvdimm);
897 object_property_set_description(obj, "nvdimm",
898 "Set on/off to enable/disable "
899 "NVDIMM instantiation");
900
901 object_property_add_str(obj, "nvdimm-persistence",
902 machine_get_nvdimm_persistence,
903 machine_set_nvdimm_persistence);
904 object_property_set_description(obj, "nvdimm-persistence",
905 "Set NVDIMM persistence"
906 "Valid values are cpu, mem-ctrl");
907 }
908
909 if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) {
910 ms->numa_state = g_new0(NumaState, 1);
911 object_property_add_bool(obj, "hmat",
912 machine_get_hmat, machine_set_hmat);
913 object_property_set_description(obj, "hmat",
914 "Set on/off to enable/disable "
915 "ACPI Heterogeneous Memory Attribute "
916 "Table (HMAT)");
917 }
918
919 object_property_add_str(obj, "memory-backend",
920 machine_get_memdev, machine_set_memdev);
921 object_property_set_description(obj, "memory-backend",
922 "Set RAM backend"
923 "Valid value is ID of hostmem based backend");
924
925 /* Register notifier when init is done for sysbus sanity checks */
926 ms->sysbus_notifier.notify = machine_init_notify;
927 qemu_add_machine_init_done_notifier(&ms->sysbus_notifier);
928 }
929
930 static void machine_finalize(Object *obj)
931 {
932 MachineState *ms = MACHINE(obj);
933
934 g_free(ms->kernel_filename);
935 g_free(ms->initrd_filename);
936 g_free(ms->kernel_cmdline);
937 g_free(ms->dtb);
938 g_free(ms->dumpdtb);
939 g_free(ms->dt_compatible);
940 g_free(ms->firmware);
941 g_free(ms->device_memory);
942 g_free(ms->nvdimms_state);
943 g_free(ms->numa_state);
944 }
945
946 bool machine_usb(MachineState *machine)
947 {
948 return machine->usb;
949 }
950
951 int machine_phandle_start(MachineState *machine)
952 {
953 return machine->phandle_start;
954 }
955
956 bool machine_dump_guest_core(MachineState *machine)
957 {
958 return machine->dump_guest_core;
959 }
960
961 bool machine_mem_merge(MachineState *machine)
962 {
963 return machine->mem_merge;
964 }
965
966 static char *cpu_slot_to_string(const CPUArchId *cpu)
967 {
968 GString *s = g_string_new(NULL);
969 if (cpu->props.has_socket_id) {
970 g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id);
971 }
972 if (cpu->props.has_die_id) {
973 g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id);
974 }
975 if (cpu->props.has_core_id) {
976 if (s->len) {
977 g_string_append_printf(s, ", ");
978 }
979 g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id);
980 }
981 if (cpu->props.has_thread_id) {
982 if (s->len) {
983 g_string_append_printf(s, ", ");
984 }
985 g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id);
986 }
987 return g_string_free(s, false);
988 }
989
990 static void numa_validate_initiator(NumaState *numa_state)
991 {
992 int i;
993 NodeInfo *numa_info = numa_state->nodes;
994
995 for (i = 0; i < numa_state->num_nodes; i++) {
996 if (numa_info[i].initiator == MAX_NODES) {
997 error_report("The initiator of NUMA node %d is missing, use "
998 "'-numa node,initiator' option to declare it", i);
999 exit(1);
1000 }
1001
1002 if (!numa_info[numa_info[i].initiator].present) {
1003 error_report("NUMA node %" PRIu16 " is missing, use "
1004 "'-numa node' option to declare it first",
1005 numa_info[i].initiator);
1006 exit(1);
1007 }
1008
1009 if (!numa_info[numa_info[i].initiator].has_cpu) {
1010 error_report("The initiator of NUMA node %d is invalid", i);
1011 exit(1);
1012 }
1013 }
1014 }
1015
1016 static void machine_numa_finish_cpu_init(MachineState *machine)
1017 {
1018 int i;
1019 bool default_mapping;
1020 GString *s = g_string_new(NULL);
1021 MachineClass *mc = MACHINE_GET_CLASS(machine);
1022 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine);
1023
1024 assert(machine->numa_state->num_nodes);
1025 for (i = 0; i < possible_cpus->len; i++) {
1026 if (possible_cpus->cpus[i].props.has_node_id) {
1027 break;
1028 }
1029 }
1030 default_mapping = (i == possible_cpus->len);
1031
1032 for (i = 0; i < possible_cpus->len; i++) {
1033 const CPUArchId *cpu_slot = &possible_cpus->cpus[i];
1034
1035 if (!cpu_slot->props.has_node_id) {
1036 /* fetch default mapping from board and enable it */
1037 CpuInstanceProperties props = cpu_slot->props;
1038
1039 props.node_id = mc->get_default_cpu_node_id(machine, i);
1040 if (!default_mapping) {
1041 /* record slots with not set mapping,
1042 * TODO: make it hard error in future */
1043 char *cpu_str = cpu_slot_to_string(cpu_slot);
1044 g_string_append_printf(s, "%sCPU %d [%s]",
1045 s->len ? ", " : "", i, cpu_str);
1046 g_free(cpu_str);
1047
1048 /* non mapped cpus used to fallback to node 0 */
1049 props.node_id = 0;
1050 }
1051
1052 props.has_node_id = true;
1053 machine_set_cpu_numa_node(machine, &props, &error_fatal);
1054 }
1055 }
1056
1057 if (machine->numa_state->hmat_enabled) {
1058 numa_validate_initiator(machine->numa_state);
1059 }
1060
1061 if (s->len && !qtest_enabled()) {
1062 warn_report("CPU(s) not present in any NUMA nodes: %s",
1063 s->str);
1064 warn_report("All CPU(s) up to maxcpus should be described "
1065 "in NUMA config, ability to start up with partial NUMA "
1066 "mappings is obsoleted and will be removed in future");
1067 }
1068 g_string_free(s, true);
1069 }
1070
1071 MemoryRegion *machine_consume_memdev(MachineState *machine,
1072 HostMemoryBackend *backend)
1073 {
1074 MemoryRegion *ret = host_memory_backend_get_memory(backend);
1075
1076 if (memory_region_is_mapped(ret)) {
1077 error_report("memory backend %s can't be used multiple times.",
1078 object_get_canonical_path_component(OBJECT(backend)));
1079 exit(EXIT_FAILURE);
1080 }
1081 host_memory_backend_set_mapped(backend, true);
1082 vmstate_register_ram_global(ret);
1083 return ret;
1084 }
1085
1086 void machine_run_board_init(MachineState *machine)
1087 {
1088 MachineClass *machine_class = MACHINE_GET_CLASS(machine);
1089
1090 if (machine->ram_memdev_id) {
1091 Object *o;
1092 o = object_resolve_path_type(machine->ram_memdev_id,
1093 TYPE_MEMORY_BACKEND, NULL);
1094 machine->ram = machine_consume_memdev(machine, MEMORY_BACKEND(o));
1095 }
1096
1097 if (machine->numa_state) {
1098 numa_complete_configuration(machine);
1099 if (machine->numa_state->num_nodes) {
1100 machine_numa_finish_cpu_init(machine);
1101 }
1102 }
1103
1104 /* If the machine supports the valid_cpu_types check and the user
1105 * specified a CPU with -cpu check here that the user CPU is supported.
1106 */
1107 if (machine_class->valid_cpu_types && machine->cpu_type) {
1108 ObjectClass *class = object_class_by_name(machine->cpu_type);
1109 int i;
1110
1111 for (i = 0; machine_class->valid_cpu_types[i]; i++) {
1112 if (object_class_dynamic_cast(class,
1113 machine_class->valid_cpu_types[i])) {
1114 /* The user specificed CPU is in the valid field, we are
1115 * good to go.
1116 */
1117 break;
1118 }
1119 }
1120
1121 if (!machine_class->valid_cpu_types[i]) {
1122 /* The user specified CPU is not valid */
1123 error_report("Invalid CPU type: %s", machine->cpu_type);
1124 error_printf("The valid types are: %s",
1125 machine_class->valid_cpu_types[0]);
1126 for (i = 1; machine_class->valid_cpu_types[i]; i++) {
1127 error_printf(", %s", machine_class->valid_cpu_types[i]);
1128 }
1129 error_printf("\n");
1130
1131 exit(1);
1132 }
1133 }
1134
1135 machine_class->init(machine);
1136 }
1137
1138 static const TypeInfo machine_info = {
1139 .name = TYPE_MACHINE,
1140 .parent = TYPE_OBJECT,
1141 .abstract = true,
1142 .class_size = sizeof(MachineClass),
1143 .class_init = machine_class_init,
1144 .class_base_init = machine_class_base_init,
1145 .instance_size = sizeof(MachineState),
1146 .instance_init = machine_initfn,
1147 .instance_finalize = machine_finalize,
1148 };
1149
1150 static void machine_register_types(void)
1151 {
1152 type_register_static(&machine_info);
1153 }
1154
1155 type_init(machine_register_types)