numa: remove deprecated -mem-path fallback to anonymous RAM
[qemu.git] / hw / core / numa.c
1 /*
2 * NUMA parameter parsing routines
3 *
4 * Copyright (c) 2014 Fujitsu Ltd.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include "qemu/osdep.h"
26 #include "qemu/units.h"
27 #include "sysemu/hostmem.h"
28 #include "sysemu/numa.h"
29 #include "sysemu/sysemu.h"
30 #include "exec/cpu-common.h"
31 #include "exec/ramlist.h"
32 #include "qemu/bitmap.h"
33 #include "qemu/error-report.h"
34 #include "qapi/error.h"
35 #include "qapi/opts-visitor.h"
36 #include "qapi/qapi-visit-machine.h"
37 #include "sysemu/qtest.h"
38 #include "hw/core/cpu.h"
39 #include "hw/mem/pc-dimm.h"
40 #include "migration/vmstate.h"
41 #include "hw/boards.h"
42 #include "hw/mem/memory-device.h"
43 #include "qemu/option.h"
44 #include "qemu/config-file.h"
45 #include "qemu/cutils.h"
46
47 QemuOptsList qemu_numa_opts = {
48 .name = "numa",
49 .implied_opt_name = "type",
50 .head = QTAILQ_HEAD_INITIALIZER(qemu_numa_opts.head),
51 .desc = { { 0 } } /* validated with OptsVisitor */
52 };
53
54 static int have_memdevs;
55 static int have_mem;
56 static int max_numa_nodeid; /* Highest specified NUMA node ID, plus one.
57 * For all nodes, nodeid < max_numa_nodeid
58 */
59
60 static void parse_numa_node(MachineState *ms, NumaNodeOptions *node,
61 Error **errp)
62 {
63 Error *err = NULL;
64 uint16_t nodenr;
65 uint16List *cpus = NULL;
66 MachineClass *mc = MACHINE_GET_CLASS(ms);
67 unsigned int max_cpus = ms->smp.max_cpus;
68 NodeInfo *numa_info = ms->numa_state->nodes;
69
70 if (node->has_nodeid) {
71 nodenr = node->nodeid;
72 } else {
73 nodenr = ms->numa_state->num_nodes;
74 }
75
76 if (nodenr >= MAX_NODES) {
77 error_setg(errp, "Max number of NUMA nodes reached: %"
78 PRIu16 "", nodenr);
79 return;
80 }
81
82 if (numa_info[nodenr].present) {
83 error_setg(errp, "Duplicate NUMA nodeid: %" PRIu16, nodenr);
84 return;
85 }
86
87 for (cpus = node->cpus; cpus; cpus = cpus->next) {
88 CpuInstanceProperties props;
89 if (cpus->value >= max_cpus) {
90 error_setg(errp,
91 "CPU index (%" PRIu16 ")"
92 " should be smaller than maxcpus (%d)",
93 cpus->value, max_cpus);
94 return;
95 }
96 props = mc->cpu_index_to_instance_props(ms, cpus->value);
97 props.node_id = nodenr;
98 props.has_node_id = true;
99 machine_set_cpu_numa_node(ms, &props, &err);
100 if (err) {
101 error_propagate(errp, err);
102 return;
103 }
104 }
105
106 have_memdevs = have_memdevs ? : node->has_memdev;
107 have_mem = have_mem ? : node->has_mem;
108 if ((node->has_mem && have_memdevs) || (node->has_memdev && have_mem)) {
109 error_setg(errp, "numa configuration should use either mem= or memdev=,"
110 "mixing both is not allowed");
111 return;
112 }
113
114 if (node->has_mem) {
115 numa_info[nodenr].node_mem = node->mem;
116 if (!qtest_enabled()) {
117 warn_report("Parameter -numa node,mem is deprecated,"
118 " use -numa node,memdev instead");
119 }
120 }
121 if (node->has_memdev) {
122 Object *o;
123 o = object_resolve_path_type(node->memdev, TYPE_MEMORY_BACKEND, NULL);
124 if (!o) {
125 error_setg(errp, "memdev=%s is ambiguous", node->memdev);
126 return;
127 }
128
129 object_ref(o);
130 numa_info[nodenr].node_mem = object_property_get_uint(o, "size", NULL);
131 numa_info[nodenr].node_memdev = MEMORY_BACKEND(o);
132 }
133
134 /*
135 * If not set the initiator, set it to MAX_NODES. And if
136 * HMAT is enabled and this node has no cpus, QEMU will raise error.
137 */
138 numa_info[nodenr].initiator = MAX_NODES;
139 if (node->has_initiator) {
140 if (!ms->numa_state->hmat_enabled) {
141 error_setg(errp, "ACPI Heterogeneous Memory Attribute Table "
142 "(HMAT) is disabled, enable it with -machine hmat=on "
143 "before using any of hmat specific options");
144 return;
145 }
146
147 if (node->initiator >= MAX_NODES) {
148 error_report("The initiator id %" PRIu16 " expects an integer "
149 "between 0 and %d", node->initiator,
150 MAX_NODES - 1);
151 return;
152 }
153
154 numa_info[nodenr].initiator = node->initiator;
155 }
156 numa_info[nodenr].present = true;
157 max_numa_nodeid = MAX(max_numa_nodeid, nodenr + 1);
158 ms->numa_state->num_nodes++;
159 }
160
161 static
162 void parse_numa_distance(MachineState *ms, NumaDistOptions *dist, Error **errp)
163 {
164 uint16_t src = dist->src;
165 uint16_t dst = dist->dst;
166 uint8_t val = dist->val;
167 NodeInfo *numa_info = ms->numa_state->nodes;
168
169 if (src >= MAX_NODES || dst >= MAX_NODES) {
170 error_setg(errp, "Parameter '%s' expects an integer between 0 and %d",
171 src >= MAX_NODES ? "src" : "dst", MAX_NODES - 1);
172 return;
173 }
174
175 if (!numa_info[src].present || !numa_info[dst].present) {
176 error_setg(errp, "Source/Destination NUMA node is missing. "
177 "Please use '-numa node' option to declare it first.");
178 return;
179 }
180
181 if (val < NUMA_DISTANCE_MIN) {
182 error_setg(errp, "NUMA distance (%" PRIu8 ") is invalid, "
183 "it shouldn't be less than %d.",
184 val, NUMA_DISTANCE_MIN);
185 return;
186 }
187
188 if (src == dst && val != NUMA_DISTANCE_MIN) {
189 error_setg(errp, "Local distance of node %d should be %d.",
190 src, NUMA_DISTANCE_MIN);
191 return;
192 }
193
194 numa_info[src].distance[dst] = val;
195 ms->numa_state->have_numa_distance = true;
196 }
197
198 void parse_numa_hmat_lb(NumaState *numa_state, NumaHmatLBOptions *node,
199 Error **errp)
200 {
201 int i, first_bit, last_bit;
202 uint64_t max_entry, temp_base, bitmap_copy;
203 NodeInfo *numa_info = numa_state->nodes;
204 HMAT_LB_Info *hmat_lb =
205 numa_state->hmat_lb[node->hierarchy][node->data_type];
206 HMAT_LB_Data lb_data = {};
207 HMAT_LB_Data *lb_temp;
208
209 /* Error checking */
210 if (node->initiator > numa_state->num_nodes) {
211 error_setg(errp, "Invalid initiator=%d, it should be less than %d",
212 node->initiator, numa_state->num_nodes);
213 return;
214 }
215 if (node->target > numa_state->num_nodes) {
216 error_setg(errp, "Invalid target=%d, it should be less than %d",
217 node->target, numa_state->num_nodes);
218 return;
219 }
220 if (!numa_info[node->initiator].has_cpu) {
221 error_setg(errp, "Invalid initiator=%d, it isn't an "
222 "initiator proximity domain", node->initiator);
223 return;
224 }
225 if (!numa_info[node->target].present) {
226 error_setg(errp, "The target=%d should point to an existing node",
227 node->target);
228 return;
229 }
230
231 if (!hmat_lb) {
232 hmat_lb = g_malloc0(sizeof(*hmat_lb));
233 numa_state->hmat_lb[node->hierarchy][node->data_type] = hmat_lb;
234 hmat_lb->list = g_array_new(false, true, sizeof(HMAT_LB_Data));
235 }
236 hmat_lb->hierarchy = node->hierarchy;
237 hmat_lb->data_type = node->data_type;
238 lb_data.initiator = node->initiator;
239 lb_data.target = node->target;
240
241 if (node->data_type <= HMATLB_DATA_TYPE_WRITE_LATENCY) {
242 /* Input latency data */
243
244 if (!node->has_latency) {
245 error_setg(errp, "Missing 'latency' option");
246 return;
247 }
248 if (node->has_bandwidth) {
249 error_setg(errp, "Invalid option 'bandwidth' since "
250 "the data type is latency");
251 return;
252 }
253
254 /* Detect duplicate configuration */
255 for (i = 0; i < hmat_lb->list->len; i++) {
256 lb_temp = &g_array_index(hmat_lb->list, HMAT_LB_Data, i);
257
258 if (node->initiator == lb_temp->initiator &&
259 node->target == lb_temp->target) {
260 error_setg(errp, "Duplicate configuration of the latency for "
261 "initiator=%d and target=%d", node->initiator,
262 node->target);
263 return;
264 }
265 }
266
267 hmat_lb->base = hmat_lb->base ? hmat_lb->base : UINT64_MAX;
268
269 if (node->latency) {
270 /* Calculate the temporary base and compressed latency */
271 max_entry = node->latency;
272 temp_base = 1;
273 while (QEMU_IS_ALIGNED(max_entry, 10)) {
274 max_entry /= 10;
275 temp_base *= 10;
276 }
277
278 /* Calculate the max compressed latency */
279 temp_base = MIN(hmat_lb->base, temp_base);
280 max_entry = node->latency / hmat_lb->base;
281 max_entry = MAX(hmat_lb->range_bitmap, max_entry);
282
283 /*
284 * For latency hmat_lb->range_bitmap record the max compressed
285 * latency which should be less than 0xFFFF (UINT16_MAX)
286 */
287 if (max_entry >= UINT16_MAX) {
288 error_setg(errp, "Latency %" PRIu64 " between initiator=%d and "
289 "target=%d should not differ from previously entered "
290 "min or max values on more than %d", node->latency,
291 node->initiator, node->target, UINT16_MAX - 1);
292 return;
293 } else {
294 hmat_lb->base = temp_base;
295 hmat_lb->range_bitmap = max_entry;
296 }
297
298 /*
299 * Set lb_info_provided bit 0 as 1,
300 * latency information is provided
301 */
302 numa_info[node->target].lb_info_provided |= BIT(0);
303 }
304 lb_data.data = node->latency;
305 } else if (node->data_type >= HMATLB_DATA_TYPE_ACCESS_BANDWIDTH) {
306 /* Input bandwidth data */
307 if (!node->has_bandwidth) {
308 error_setg(errp, "Missing 'bandwidth' option");
309 return;
310 }
311 if (node->has_latency) {
312 error_setg(errp, "Invalid option 'latency' since "
313 "the data type is bandwidth");
314 return;
315 }
316 if (!QEMU_IS_ALIGNED(node->bandwidth, MiB)) {
317 error_setg(errp, "Bandwidth %" PRIu64 " between initiator=%d and "
318 "target=%d should be 1MB aligned", node->bandwidth,
319 node->initiator, node->target);
320 return;
321 }
322
323 /* Detect duplicate configuration */
324 for (i = 0; i < hmat_lb->list->len; i++) {
325 lb_temp = &g_array_index(hmat_lb->list, HMAT_LB_Data, i);
326
327 if (node->initiator == lb_temp->initiator &&
328 node->target == lb_temp->target) {
329 error_setg(errp, "Duplicate configuration of the bandwidth for "
330 "initiator=%d and target=%d", node->initiator,
331 node->target);
332 return;
333 }
334 }
335
336 hmat_lb->base = hmat_lb->base ? hmat_lb->base : 1;
337
338 if (node->bandwidth) {
339 /* Keep bitmap unchanged when bandwidth out of range */
340 bitmap_copy = hmat_lb->range_bitmap;
341 bitmap_copy |= node->bandwidth;
342 first_bit = ctz64(bitmap_copy);
343 temp_base = UINT64_C(1) << first_bit;
344 max_entry = node->bandwidth / temp_base;
345 last_bit = 64 - clz64(bitmap_copy);
346
347 /*
348 * For bandwidth, first_bit record the base unit of bandwidth bits,
349 * last_bit record the last bit of the max bandwidth. The max
350 * compressed bandwidth should be less than 0xFFFF (UINT16_MAX)
351 */
352 if ((last_bit - first_bit) > UINT16_BITS ||
353 max_entry >= UINT16_MAX) {
354 error_setg(errp, "Bandwidth %" PRIu64 " between initiator=%d "
355 "and target=%d should not differ from previously "
356 "entered values on more than %d", node->bandwidth,
357 node->initiator, node->target, UINT16_MAX - 1);
358 return;
359 } else {
360 hmat_lb->base = temp_base;
361 hmat_lb->range_bitmap = bitmap_copy;
362 }
363
364 /*
365 * Set lb_info_provided bit 1 as 1,
366 * bandwidth information is provided
367 */
368 numa_info[node->target].lb_info_provided |= BIT(1);
369 }
370 lb_data.data = node->bandwidth;
371 } else {
372 assert(0);
373 }
374
375 g_array_append_val(hmat_lb->list, lb_data);
376 }
377
378 void parse_numa_hmat_cache(MachineState *ms, NumaHmatCacheOptions *node,
379 Error **errp)
380 {
381 int nb_numa_nodes = ms->numa_state->num_nodes;
382 NodeInfo *numa_info = ms->numa_state->nodes;
383 NumaHmatCacheOptions *hmat_cache = NULL;
384
385 if (node->node_id >= nb_numa_nodes) {
386 error_setg(errp, "Invalid node-id=%" PRIu32 ", it should be less "
387 "than %d", node->node_id, nb_numa_nodes);
388 return;
389 }
390
391 if (numa_info[node->node_id].lb_info_provided != (BIT(0) | BIT(1))) {
392 error_setg(errp, "The latency and bandwidth information of "
393 "node-id=%" PRIu32 " should be provided before memory side "
394 "cache attributes", node->node_id);
395 return;
396 }
397
398 if (node->level < 1 || node->level >= HMAT_LB_LEVELS) {
399 error_setg(errp, "Invalid level=%" PRIu8 ", it should be larger than 0 "
400 "and less than or equal to %d", node->level,
401 HMAT_LB_LEVELS - 1);
402 return;
403 }
404
405 assert(node->associativity < HMAT_CACHE_ASSOCIATIVITY__MAX);
406 assert(node->policy < HMAT_CACHE_WRITE_POLICY__MAX);
407 if (ms->numa_state->hmat_cache[node->node_id][node->level]) {
408 error_setg(errp, "Duplicate configuration of the side cache for "
409 "node-id=%" PRIu32 " and level=%" PRIu8,
410 node->node_id, node->level);
411 return;
412 }
413
414 if ((node->level > 1) &&
415 ms->numa_state->hmat_cache[node->node_id][node->level - 1] &&
416 (node->size >=
417 ms->numa_state->hmat_cache[node->node_id][node->level - 1]->size)) {
418 error_setg(errp, "Invalid size=%" PRIu64 ", the size of level=%" PRIu8
419 " should be less than the size(%" PRIu64 ") of "
420 "level=%u", node->size, node->level,
421 ms->numa_state->hmat_cache[node->node_id]
422 [node->level - 1]->size,
423 node->level - 1);
424 return;
425 }
426
427 if ((node->level < HMAT_LB_LEVELS - 1) &&
428 ms->numa_state->hmat_cache[node->node_id][node->level + 1] &&
429 (node->size <=
430 ms->numa_state->hmat_cache[node->node_id][node->level + 1]->size)) {
431 error_setg(errp, "Invalid size=%" PRIu64 ", the size of level=%" PRIu8
432 " should be larger than the size(%" PRIu64 ") of "
433 "level=%u", node->size, node->level,
434 ms->numa_state->hmat_cache[node->node_id]
435 [node->level + 1]->size,
436 node->level + 1);
437 return;
438 }
439
440 hmat_cache = g_malloc0(sizeof(*hmat_cache));
441 memcpy(hmat_cache, node, sizeof(*hmat_cache));
442 ms->numa_state->hmat_cache[node->node_id][node->level] = hmat_cache;
443 }
444
445 void set_numa_options(MachineState *ms, NumaOptions *object, Error **errp)
446 {
447 Error *err = NULL;
448
449 if (!ms->numa_state) {
450 error_setg(errp, "NUMA is not supported by this machine-type");
451 goto end;
452 }
453
454 switch (object->type) {
455 case NUMA_OPTIONS_TYPE_NODE:
456 parse_numa_node(ms, &object->u.node, &err);
457 if (err) {
458 goto end;
459 }
460 break;
461 case NUMA_OPTIONS_TYPE_DIST:
462 parse_numa_distance(ms, &object->u.dist, &err);
463 if (err) {
464 goto end;
465 }
466 break;
467 case NUMA_OPTIONS_TYPE_CPU:
468 if (!object->u.cpu.has_node_id) {
469 error_setg(&err, "Missing mandatory node-id property");
470 goto end;
471 }
472 if (!ms->numa_state->nodes[object->u.cpu.node_id].present) {
473 error_setg(&err, "Invalid node-id=%" PRId64 ", NUMA node must be "
474 "defined with -numa node,nodeid=ID before it's used with "
475 "-numa cpu,node-id=ID", object->u.cpu.node_id);
476 goto end;
477 }
478
479 machine_set_cpu_numa_node(ms, qapi_NumaCpuOptions_base(&object->u.cpu),
480 &err);
481 break;
482 case NUMA_OPTIONS_TYPE_HMAT_LB:
483 if (!ms->numa_state->hmat_enabled) {
484 error_setg(errp, "ACPI Heterogeneous Memory Attribute Table "
485 "(HMAT) is disabled, enable it with -machine hmat=on "
486 "before using any of hmat specific options");
487 return;
488 }
489
490 parse_numa_hmat_lb(ms->numa_state, &object->u.hmat_lb, &err);
491 if (err) {
492 goto end;
493 }
494 break;
495 case NUMA_OPTIONS_TYPE_HMAT_CACHE:
496 if (!ms->numa_state->hmat_enabled) {
497 error_setg(errp, "ACPI Heterogeneous Memory Attribute Table "
498 "(HMAT) is disabled, enable it with -machine hmat=on "
499 "before using any of hmat specific options");
500 return;
501 }
502
503 parse_numa_hmat_cache(ms, &object->u.hmat_cache, &err);
504 if (err) {
505 goto end;
506 }
507 break;
508 default:
509 abort();
510 }
511
512 end:
513 error_propagate(errp, err);
514 }
515
516 static int parse_numa(void *opaque, QemuOpts *opts, Error **errp)
517 {
518 NumaOptions *object = NULL;
519 MachineState *ms = MACHINE(opaque);
520 Error *err = NULL;
521 Visitor *v = opts_visitor_new(opts);
522
523 visit_type_NumaOptions(v, NULL, &object, &err);
524 visit_free(v);
525 if (err) {
526 goto end;
527 }
528
529 /* Fix up legacy suffix-less format */
530 if ((object->type == NUMA_OPTIONS_TYPE_NODE) && object->u.node.has_mem) {
531 const char *mem_str = qemu_opt_get(opts, "mem");
532 qemu_strtosz_MiB(mem_str, NULL, &object->u.node.mem);
533 }
534
535 set_numa_options(ms, object, &err);
536
537 end:
538 qapi_free_NumaOptions(object);
539 if (err) {
540 error_propagate(errp, err);
541 return -1;
542 }
543
544 return 0;
545 }
546
547 /* If all node pair distances are symmetric, then only distances
548 * in one direction are enough. If there is even one asymmetric
549 * pair, though, then all distances must be provided. The
550 * distance from a node to itself is always NUMA_DISTANCE_MIN,
551 * so providing it is never necessary.
552 */
553 static void validate_numa_distance(MachineState *ms)
554 {
555 int src, dst;
556 bool is_asymmetrical = false;
557 int nb_numa_nodes = ms->numa_state->num_nodes;
558 NodeInfo *numa_info = ms->numa_state->nodes;
559
560 for (src = 0; src < nb_numa_nodes; src++) {
561 for (dst = src; dst < nb_numa_nodes; dst++) {
562 if (numa_info[src].distance[dst] == 0 &&
563 numa_info[dst].distance[src] == 0) {
564 if (src != dst) {
565 error_report("The distance between node %d and %d is "
566 "missing, at least one distance value "
567 "between each nodes should be provided.",
568 src, dst);
569 exit(EXIT_FAILURE);
570 }
571 }
572
573 if (numa_info[src].distance[dst] != 0 &&
574 numa_info[dst].distance[src] != 0 &&
575 numa_info[src].distance[dst] !=
576 numa_info[dst].distance[src]) {
577 is_asymmetrical = true;
578 }
579 }
580 }
581
582 if (is_asymmetrical) {
583 for (src = 0; src < nb_numa_nodes; src++) {
584 for (dst = 0; dst < nb_numa_nodes; dst++) {
585 if (src != dst && numa_info[src].distance[dst] == 0) {
586 error_report("At least one asymmetrical pair of "
587 "distances is given, please provide distances "
588 "for both directions of all node pairs.");
589 exit(EXIT_FAILURE);
590 }
591 }
592 }
593 }
594 }
595
596 static void complete_init_numa_distance(MachineState *ms)
597 {
598 int src, dst;
599 NodeInfo *numa_info = ms->numa_state->nodes;
600
601 /* Fixup NUMA distance by symmetric policy because if it is an
602 * asymmetric distance table, it should be a complete table and
603 * there would not be any missing distance except local node, which
604 * is verified by validate_numa_distance above.
605 */
606 for (src = 0; src < ms->numa_state->num_nodes; src++) {
607 for (dst = 0; dst < ms->numa_state->num_nodes; dst++) {
608 if (numa_info[src].distance[dst] == 0) {
609 if (src == dst) {
610 numa_info[src].distance[dst] = NUMA_DISTANCE_MIN;
611 } else {
612 numa_info[src].distance[dst] = numa_info[dst].distance[src];
613 }
614 }
615 }
616 }
617 }
618
619 void numa_legacy_auto_assign_ram(MachineClass *mc, NodeInfo *nodes,
620 int nb_nodes, ram_addr_t size)
621 {
622 int i;
623 uint64_t usedmem = 0;
624
625 /* Align each node according to the alignment
626 * requirements of the machine class
627 */
628
629 for (i = 0; i < nb_nodes - 1; i++) {
630 nodes[i].node_mem = (size / nb_nodes) &
631 ~((1 << mc->numa_mem_align_shift) - 1);
632 usedmem += nodes[i].node_mem;
633 }
634 nodes[i].node_mem = size - usedmem;
635 }
636
637 void numa_default_auto_assign_ram(MachineClass *mc, NodeInfo *nodes,
638 int nb_nodes, ram_addr_t size)
639 {
640 int i;
641 uint64_t usedmem = 0, node_mem;
642 uint64_t granularity = size / nb_nodes;
643 uint64_t propagate = 0;
644
645 for (i = 0; i < nb_nodes - 1; i++) {
646 node_mem = (granularity + propagate) &
647 ~((1 << mc->numa_mem_align_shift) - 1);
648 propagate = granularity + propagate - node_mem;
649 nodes[i].node_mem = node_mem;
650 usedmem += node_mem;
651 }
652 nodes[i].node_mem = size - usedmem;
653 }
654
655 void numa_complete_configuration(MachineState *ms)
656 {
657 int i;
658 MachineClass *mc = MACHINE_GET_CLASS(ms);
659 NodeInfo *numa_info = ms->numa_state->nodes;
660
661 /*
662 * If memory hotplug is enabled (slots > 0) but without '-numa'
663 * options explicitly on CLI, guestes will break.
664 *
665 * Windows: won't enable memory hotplug without SRAT table at all
666 *
667 * Linux: if QEMU is started with initial memory all below 4Gb
668 * and no SRAT table present, guest kernel will use nommu DMA ops,
669 * which breaks 32bit hw drivers when memory is hotplugged and
670 * guest tries to use it with that drivers.
671 *
672 * Enable NUMA implicitly by adding a new NUMA node automatically.
673 *
674 * Or if MachineClass::auto_enable_numa is true and no NUMA nodes,
675 * assume there is just one node with whole RAM.
676 */
677 if (ms->numa_state->num_nodes == 0 &&
678 ((ms->ram_slots > 0 &&
679 mc->auto_enable_numa_with_memhp) ||
680 mc->auto_enable_numa)) {
681 NumaNodeOptions node = { };
682 parse_numa_node(ms, &node, &error_abort);
683 numa_info[0].node_mem = ram_size;
684 }
685
686 assert(max_numa_nodeid <= MAX_NODES);
687
688 /* No support for sparse NUMA node IDs yet: */
689 for (i = max_numa_nodeid - 1; i >= 0; i--) {
690 /* Report large node IDs first, to make mistakes easier to spot */
691 if (!numa_info[i].present) {
692 error_report("numa: Node ID missing: %d", i);
693 exit(1);
694 }
695 }
696
697 /* This must be always true if all nodes are present: */
698 assert(ms->numa_state->num_nodes == max_numa_nodeid);
699
700 if (ms->numa_state->num_nodes > 0) {
701 uint64_t numa_total;
702
703 if (ms->numa_state->num_nodes > MAX_NODES) {
704 ms->numa_state->num_nodes = MAX_NODES;
705 }
706
707 /* If no memory size is given for any node, assume the default case
708 * and distribute the available memory equally across all nodes
709 */
710 for (i = 0; i < ms->numa_state->num_nodes; i++) {
711 if (numa_info[i].node_mem != 0) {
712 break;
713 }
714 }
715 if (i == ms->numa_state->num_nodes) {
716 assert(mc->numa_auto_assign_ram);
717 mc->numa_auto_assign_ram(mc, numa_info,
718 ms->numa_state->num_nodes, ram_size);
719 if (!qtest_enabled()) {
720 warn_report("Default splitting of RAM between nodes is deprecated,"
721 " Use '-numa node,memdev' to explictly define RAM"
722 " allocation per node");
723 }
724 }
725
726 numa_total = 0;
727 for (i = 0; i < ms->numa_state->num_nodes; i++) {
728 numa_total += numa_info[i].node_mem;
729 }
730 if (numa_total != ram_size) {
731 error_report("total memory for NUMA nodes (0x%" PRIx64 ")"
732 " should equal RAM size (0x" RAM_ADDR_FMT ")",
733 numa_total, ram_size);
734 exit(1);
735 }
736
737 /* QEMU needs at least all unique node pair distances to build
738 * the whole NUMA distance table. QEMU treats the distance table
739 * as symmetric by default, i.e. distance A->B == distance B->A.
740 * Thus, QEMU is able to complete the distance table
741 * initialization even though only distance A->B is provided and
742 * distance B->A is not. QEMU knows the distance of a node to
743 * itself is always 10, so A->A distances may be omitted. When
744 * the distances of two nodes of a pair differ, i.e. distance
745 * A->B != distance B->A, then that means the distance table is
746 * asymmetric. In this case, the distances for both directions
747 * of all node pairs are required.
748 */
749 if (ms->numa_state->have_numa_distance) {
750 /* Validate enough NUMA distance information was provided. */
751 validate_numa_distance(ms);
752
753 /* Validation succeeded, now fill in any missing distances. */
754 complete_init_numa_distance(ms);
755 }
756 }
757 }
758
759 void parse_numa_opts(MachineState *ms)
760 {
761 qemu_opts_foreach(qemu_find_opts("numa"), parse_numa, ms, &error_fatal);
762 }
763
764 void numa_cpu_pre_plug(const CPUArchId *slot, DeviceState *dev, Error **errp)
765 {
766 int node_id = object_property_get_int(OBJECT(dev), "node-id", &error_abort);
767
768 if (node_id == CPU_UNSET_NUMA_NODE_ID) {
769 /* due to bug in libvirt, it doesn't pass node-id from props on
770 * device_add as expected, so we have to fix it up here */
771 if (slot->props.has_node_id) {
772 object_property_set_int(OBJECT(dev), slot->props.node_id,
773 "node-id", errp);
774 }
775 } else if (node_id != slot->props.node_id) {
776 error_setg(errp, "invalid node-id, must be %"PRId64,
777 slot->props.node_id);
778 }
779 }
780
781 static void allocate_system_memory_nonnuma(MemoryRegion *mr, Object *owner,
782 const char *name,
783 uint64_t ram_size)
784 {
785 if (mem_path) {
786 #ifdef __linux__
787 memory_region_init_ram_from_file(mr, owner, name, ram_size, 0, 0,
788 mem_path, &error_fatal);
789 #else
790 fprintf(stderr, "-mem-path not supported on this host\n");
791 exit(1);
792 #endif
793 } else {
794 memory_region_init_ram_nomigrate(mr, owner, name, ram_size, &error_fatal);
795 }
796 vmstate_register_ram_global(mr);
797 }
798
799 void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner,
800 const char *name,
801 uint64_t ram_size)
802 {
803 uint64_t addr = 0;
804 int i;
805 MachineState *ms = MACHINE(qdev_get_machine());
806
807 if (ms->numa_state == NULL ||
808 ms->numa_state->num_nodes == 0 || !have_memdevs) {
809 allocate_system_memory_nonnuma(mr, owner, name, ram_size);
810 return;
811 }
812
813 memory_region_init(mr, owner, name, ram_size);
814 for (i = 0; i < ms->numa_state->num_nodes; i++) {
815 uint64_t size = ms->numa_state->nodes[i].node_mem;
816 HostMemoryBackend *backend = ms->numa_state->nodes[i].node_memdev;
817 if (!backend) {
818 continue;
819 }
820 MemoryRegion *seg = host_memory_backend_get_memory(backend);
821
822 if (memory_region_is_mapped(seg)) {
823 char *path = object_get_canonical_path_component(OBJECT(backend));
824 error_report("memory backend %s is used multiple times. Each "
825 "-numa option must use a different memdev value.",
826 path);
827 g_free(path);
828 exit(1);
829 }
830
831 host_memory_backend_set_mapped(backend, true);
832 memory_region_add_subregion(mr, addr, seg);
833 vmstate_register_ram_global(seg);
834 addr += size;
835 }
836 }
837
838 static void numa_stat_memory_devices(NumaNodeMem node_mem[])
839 {
840 MemoryDeviceInfoList *info_list = qmp_memory_device_list();
841 MemoryDeviceInfoList *info;
842 PCDIMMDeviceInfo *pcdimm_info;
843 VirtioPMEMDeviceInfo *vpi;
844
845 for (info = info_list; info; info = info->next) {
846 MemoryDeviceInfo *value = info->value;
847
848 if (value) {
849 switch (value->type) {
850 case MEMORY_DEVICE_INFO_KIND_DIMM:
851 case MEMORY_DEVICE_INFO_KIND_NVDIMM:
852 pcdimm_info = value->type == MEMORY_DEVICE_INFO_KIND_DIMM ?
853 value->u.dimm.data : value->u.nvdimm.data;
854 node_mem[pcdimm_info->node].node_mem += pcdimm_info->size;
855 node_mem[pcdimm_info->node].node_plugged_mem +=
856 pcdimm_info->size;
857 break;
858 case MEMORY_DEVICE_INFO_KIND_VIRTIO_PMEM:
859 vpi = value->u.virtio_pmem.data;
860 /* TODO: once we support numa, assign to right node */
861 node_mem[0].node_mem += vpi->size;
862 node_mem[0].node_plugged_mem += vpi->size;
863 break;
864 default:
865 g_assert_not_reached();
866 }
867 }
868 }
869 qapi_free_MemoryDeviceInfoList(info_list);
870 }
871
872 void query_numa_node_mem(NumaNodeMem node_mem[], MachineState *ms)
873 {
874 int i;
875
876 if (ms->numa_state == NULL || ms->numa_state->num_nodes <= 0) {
877 return;
878 }
879
880 numa_stat_memory_devices(node_mem);
881 for (i = 0; i < ms->numa_state->num_nodes; i++) {
882 node_mem[i].node_mem += ms->numa_state->nodes[i].node_mem;
883 }
884 }
885
886 void ram_block_notifier_add(RAMBlockNotifier *n)
887 {
888 QLIST_INSERT_HEAD(&ram_list.ramblock_notifiers, n, next);
889 }
890
891 void ram_block_notifier_remove(RAMBlockNotifier *n)
892 {
893 QLIST_REMOVE(n, next);
894 }
895
896 void ram_block_notify_add(void *host, size_t size)
897 {
898 RAMBlockNotifier *notifier;
899
900 QLIST_FOREACH(notifier, &ram_list.ramblock_notifiers, next) {
901 notifier->ram_block_added(notifier, host, size);
902 }
903 }
904
905 void ram_block_notify_remove(void *host, size_t size)
906 {
907 RAMBlockNotifier *notifier;
908
909 QLIST_FOREACH(notifier, &ram_list.ramblock_notifiers, next) {
910 notifier->ram_block_removed(notifier, host, size);
911 }
912 }