PPC: e500: msync is 440 only, e500 has real sync
[qemu.git] / hw / debugcon.c
1 /*
2 * QEMU Bochs-style debug console ("port E9") emulation
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2008 Citrix Systems, Inc.
6 * Copyright (c) Intel Corporation; author: H. Peter Anvin
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 */
26
27 #include "hw.h"
28 #include "qemu-char.h"
29 #include "isa.h"
30 #include "pc.h"
31
32 //#define DEBUG_DEBUGCON
33
34 typedef struct DebugconState {
35 CharDriverState *chr;
36 uint32_t readback;
37 } DebugconState;
38
39 typedef struct ISADebugconState {
40 ISADevice dev;
41 uint32_t iobase;
42 DebugconState state;
43 } ISADebugconState;
44
45 static void debugcon_ioport_write(void *opaque, uint32_t addr, uint32_t val)
46 {
47 DebugconState *s = opaque;
48 unsigned char ch = val;
49
50 #ifdef DEBUG_DEBUGCON
51 printf("debugcon: write addr=0x%04x val=0x%02x\n", addr, val);
52 #endif
53
54 qemu_chr_fe_write(s->chr, &ch, 1);
55 }
56
57
58 static uint32_t debugcon_ioport_read(void *opaque, uint32_t addr)
59 {
60 DebugconState *s = opaque;
61
62 #ifdef DEBUG_DEBUGCON
63 printf("debugcon: read addr=0x%04x\n", addr);
64 #endif
65
66 return s->readback;
67 }
68
69 static void debugcon_init_core(DebugconState *s)
70 {
71 if (!s->chr) {
72 fprintf(stderr, "Can't create debugcon device, empty char device\n");
73 exit(1);
74 }
75
76 qemu_chr_add_handlers(s->chr, NULL, NULL, NULL, s);
77 }
78
79 static int debugcon_isa_initfn(ISADevice *dev)
80 {
81 ISADebugconState *isa = DO_UPCAST(ISADebugconState, dev, dev);
82 DebugconState *s = &isa->state;
83
84 debugcon_init_core(s);
85 register_ioport_write(isa->iobase, 1, 1, debugcon_ioport_write, s);
86 register_ioport_read(isa->iobase, 1, 1, debugcon_ioport_read, s);
87 return 0;
88 }
89
90 static void debugcon_isa_class_initfn(ObjectClass *klass, void *data)
91 {
92 ISADeviceClass *ic = ISA_DEVICE_CLASS(klass);
93 ic->init = debugcon_isa_initfn;
94 }
95
96 static DeviceInfo debugcon_isa_info = {
97 .name = "isa-debugcon",
98 .size = sizeof(ISADebugconState),
99 .class_init = debugcon_isa_class_initfn,
100 .props = (Property[]) {
101 DEFINE_PROP_HEX32("iobase", ISADebugconState, iobase, 0xe9),
102 DEFINE_PROP_CHR("chardev", ISADebugconState, state.chr),
103 DEFINE_PROP_HEX32("readback", ISADebugconState, state.readback, 0xe9),
104 DEFINE_PROP_END_OF_LIST(),
105 },
106 };
107
108 static void debugcon_register_devices(void)
109 {
110 isa_qdev_register(&debugcon_isa_info);
111 }
112
113 device_init(debugcon_register_devices)