sm501: Add missing arbitration control register
[qemu.git] / hw / display / ssd0323.c
1 /*
2 * SSD0323 OLED controller with OSRAM Pictiva 128x64 display.
3 *
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
6 *
7 * This code is licensed under the GPL.
8 */
9
10 /* The controller can support a variety of different displays, but we only
11 implement one. Most of the commends relating to brightness and geometry
12 setup are ignored. */
13 #include "qemu/osdep.h"
14 #include "hw/ssi/ssi.h"
15 #include "ui/console.h"
16
17 //#define DEBUG_SSD0323 1
18
19 #ifdef DEBUG_SSD0323
20 #define DPRINTF(fmt, ...) \
21 do { printf("ssd0323: " fmt , ## __VA_ARGS__); } while (0)
22 #define BADF(fmt, ...) \
23 do { \
24 fprintf(stderr, "ssd0323: error: " fmt , ## __VA_ARGS__); abort(); \
25 } while (0)
26 #else
27 #define DPRINTF(fmt, ...) do {} while(0)
28 #define BADF(fmt, ...) \
29 do { fprintf(stderr, "ssd0323: error: " fmt , ## __VA_ARGS__);} while (0)
30 #endif
31
32 /* Scaling factor for pixels. */
33 #define MAGNIFY 4
34
35 #define REMAP_SWAP_COLUMN 0x01
36 #define REMAP_SWAP_NYBBLE 0x02
37 #define REMAP_VERTICAL 0x04
38 #define REMAP_SWAP_COM 0x10
39 #define REMAP_SPLIT_COM 0x40
40
41 enum ssd0323_mode
42 {
43 SSD0323_CMD,
44 SSD0323_DATA
45 };
46
47 typedef struct {
48 SSISlave ssidev;
49 QemuConsole *con;
50
51 uint32_t cmd_len;
52 int32_t cmd;
53 int32_t cmd_data[8];
54 int32_t row;
55 int32_t row_start;
56 int32_t row_end;
57 int32_t col;
58 int32_t col_start;
59 int32_t col_end;
60 int32_t redraw;
61 int32_t remap;
62 uint32_t mode;
63 uint8_t framebuffer[128 * 80 / 2];
64 } ssd0323_state;
65
66 static uint32_t ssd0323_transfer(SSISlave *dev, uint32_t data)
67 {
68 ssd0323_state *s = FROM_SSI_SLAVE(ssd0323_state, dev);
69
70 switch (s->mode) {
71 case SSD0323_DATA:
72 DPRINTF("data 0x%02x\n", data);
73 s->framebuffer[s->col + s->row * 64] = data;
74 if (s->remap & REMAP_VERTICAL) {
75 s->row++;
76 if (s->row > s->row_end) {
77 s->row = s->row_start;
78 s->col++;
79 }
80 if (s->col > s->col_end) {
81 s->col = s->col_start;
82 }
83 } else {
84 s->col++;
85 if (s->col > s->col_end) {
86 s->row++;
87 s->col = s->col_start;
88 }
89 if (s->row > s->row_end) {
90 s->row = s->row_start;
91 }
92 }
93 s->redraw = 1;
94 break;
95 case SSD0323_CMD:
96 DPRINTF("cmd 0x%02x\n", data);
97 if (s->cmd_len == 0) {
98 s->cmd = data;
99 } else {
100 s->cmd_data[s->cmd_len - 1] = data;
101 }
102 s->cmd_len++;
103 switch (s->cmd) {
104 #define DATA(x) if (s->cmd_len <= (x)) return 0
105 case 0x15: /* Set column. */
106 DATA(2);
107 s->col = s->col_start = s->cmd_data[0] % 64;
108 s->col_end = s->cmd_data[1] % 64;
109 break;
110 case 0x75: /* Set row. */
111 DATA(2);
112 s->row = s->row_start = s->cmd_data[0] % 80;
113 s->row_end = s->cmd_data[1] % 80;
114 break;
115 case 0x81: /* Set contrast */
116 DATA(1);
117 break;
118 case 0x84: case 0x85: case 0x86: /* Max current. */
119 DATA(0);
120 break;
121 case 0xa0: /* Set remapping. */
122 /* FIXME: Implement this. */
123 DATA(1);
124 s->remap = s->cmd_data[0];
125 break;
126 case 0xa1: /* Set display start line. */
127 case 0xa2: /* Set display offset. */
128 /* FIXME: Implement these. */
129 DATA(1);
130 break;
131 case 0xa4: /* Normal mode. */
132 case 0xa5: /* All on. */
133 case 0xa6: /* All off. */
134 case 0xa7: /* Inverse. */
135 /* FIXME: Implement these. */
136 DATA(0);
137 break;
138 case 0xa8: /* Set multiplex ratio. */
139 case 0xad: /* Set DC-DC converter. */
140 DATA(1);
141 /* Ignored. Don't care. */
142 break;
143 case 0xae: /* Display off. */
144 case 0xaf: /* Display on. */
145 DATA(0);
146 /* TODO: Implement power control. */
147 break;
148 case 0xb1: /* Set phase length. */
149 case 0xb2: /* Set row period. */
150 case 0xb3: /* Set clock rate. */
151 case 0xbc: /* Set precharge. */
152 case 0xbe: /* Set VCOMH. */
153 case 0xbf: /* Set segment low. */
154 DATA(1);
155 /* Ignored. Don't care. */
156 break;
157 case 0xb8: /* Set grey scale table. */
158 /* FIXME: Implement this. */
159 DATA(8);
160 break;
161 case 0xe3: /* NOP. */
162 DATA(0);
163 break;
164 case 0xff: /* Nasty hack because we don't handle chip selects
165 properly. */
166 break;
167 default:
168 BADF("Unknown command: 0x%x\n", data);
169 }
170 s->cmd_len = 0;
171 return 0;
172 }
173 return 0;
174 }
175
176 static void ssd0323_update_display(void *opaque)
177 {
178 ssd0323_state *s = (ssd0323_state *)opaque;
179 DisplaySurface *surface = qemu_console_surface(s->con);
180 uint8_t *dest;
181 uint8_t *src;
182 int x;
183 int y;
184 int i;
185 int line;
186 char *colors[16];
187 char colortab[MAGNIFY * 64];
188 char *p;
189 int dest_width;
190
191 if (!s->redraw)
192 return;
193
194 switch (surface_bits_per_pixel(surface)) {
195 case 0:
196 return;
197 case 15:
198 dest_width = 2;
199 break;
200 case 16:
201 dest_width = 2;
202 break;
203 case 24:
204 dest_width = 3;
205 break;
206 case 32:
207 dest_width = 4;
208 break;
209 default:
210 BADF("Bad color depth\n");
211 return;
212 }
213 p = colortab;
214 for (i = 0; i < 16; i++) {
215 int n;
216 colors[i] = p;
217 switch (surface_bits_per_pixel(surface)) {
218 case 15:
219 n = i * 2 + (i >> 3);
220 p[0] = n | (n << 5);
221 p[1] = (n << 2) | (n >> 3);
222 break;
223 case 16:
224 n = i * 2 + (i >> 3);
225 p[0] = n | (n << 6) | ((n << 1) & 0x20);
226 p[1] = (n << 3) | (n >> 2);
227 break;
228 case 24:
229 case 32:
230 n = (i << 4) | i;
231 p[0] = p[1] = p[2] = n;
232 break;
233 default:
234 BADF("Bad color depth\n");
235 return;
236 }
237 p += dest_width;
238 }
239 /* TODO: Implement row/column remapping. */
240 dest = surface_data(surface);
241 for (y = 0; y < 64; y++) {
242 line = y;
243 src = s->framebuffer + 64 * line;
244 for (x = 0; x < 64; x++) {
245 int val;
246 val = *src >> 4;
247 for (i = 0; i < MAGNIFY; i++) {
248 memcpy(dest, colors[val], dest_width);
249 dest += dest_width;
250 }
251 val = *src & 0xf;
252 for (i = 0; i < MAGNIFY; i++) {
253 memcpy(dest, colors[val], dest_width);
254 dest += dest_width;
255 }
256 src++;
257 }
258 for (i = 1; i < MAGNIFY; i++) {
259 memcpy(dest, dest - dest_width * MAGNIFY * 128,
260 dest_width * 128 * MAGNIFY);
261 dest += dest_width * 128 * MAGNIFY;
262 }
263 }
264 s->redraw = 0;
265 dpy_gfx_update(s->con, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY);
266 }
267
268 static void ssd0323_invalidate_display(void * opaque)
269 {
270 ssd0323_state *s = (ssd0323_state *)opaque;
271 s->redraw = 1;
272 }
273
274 /* Command/data input. */
275 static void ssd0323_cd(void *opaque, int n, int level)
276 {
277 ssd0323_state *s = (ssd0323_state *)opaque;
278 DPRINTF("%s mode\n", level ? "Data" : "Command");
279 s->mode = level ? SSD0323_DATA : SSD0323_CMD;
280 }
281
282 static int ssd0323_post_load(void *opaque, int version_id)
283 {
284 ssd0323_state *s = (ssd0323_state *)opaque;
285
286 if (s->cmd_len > ARRAY_SIZE(s->cmd_data)) {
287 return -EINVAL;
288 }
289 if (s->row < 0 || s->row >= 80) {
290 return -EINVAL;
291 }
292 if (s->row_start < 0 || s->row_start >= 80) {
293 return -EINVAL;
294 }
295 if (s->row_end < 0 || s->row_end >= 80) {
296 return -EINVAL;
297 }
298 if (s->col < 0 || s->col >= 64) {
299 return -EINVAL;
300 }
301 if (s->col_start < 0 || s->col_start >= 64) {
302 return -EINVAL;
303 }
304 if (s->col_end < 0 || s->col_end >= 64) {
305 return -EINVAL;
306 }
307 if (s->mode != SSD0323_CMD && s->mode != SSD0323_DATA) {
308 return -EINVAL;
309 }
310
311 return 0;
312 }
313
314 static const VMStateDescription vmstate_ssd0323 = {
315 .name = "ssd0323_oled",
316 .version_id = 2,
317 .minimum_version_id = 2,
318 .post_load = ssd0323_post_load,
319 .fields = (VMStateField []) {
320 VMSTATE_UINT32(cmd_len, ssd0323_state),
321 VMSTATE_INT32(cmd, ssd0323_state),
322 VMSTATE_INT32_ARRAY(cmd_data, ssd0323_state, 8),
323 VMSTATE_INT32(row, ssd0323_state),
324 VMSTATE_INT32(row_start, ssd0323_state),
325 VMSTATE_INT32(row_end, ssd0323_state),
326 VMSTATE_INT32(col, ssd0323_state),
327 VMSTATE_INT32(col_start, ssd0323_state),
328 VMSTATE_INT32(col_end, ssd0323_state),
329 VMSTATE_INT32(redraw, ssd0323_state),
330 VMSTATE_INT32(remap, ssd0323_state),
331 VMSTATE_UINT32(mode, ssd0323_state),
332 VMSTATE_BUFFER(framebuffer, ssd0323_state),
333 VMSTATE_SSI_SLAVE(ssidev, ssd0323_state),
334 VMSTATE_END_OF_LIST()
335 }
336 };
337
338 static const GraphicHwOps ssd0323_ops = {
339 .invalidate = ssd0323_invalidate_display,
340 .gfx_update = ssd0323_update_display,
341 };
342
343 static void ssd0323_realize(SSISlave *d, Error **errp)
344 {
345 DeviceState *dev = DEVICE(d);
346 ssd0323_state *s = FROM_SSI_SLAVE(ssd0323_state, d);
347
348 s->col_end = 63;
349 s->row_end = 79;
350 s->con = graphic_console_init(dev, 0, &ssd0323_ops, s);
351 qemu_console_resize(s->con, 128 * MAGNIFY, 64 * MAGNIFY);
352
353 qdev_init_gpio_in(dev, ssd0323_cd, 1);
354 }
355
356 static void ssd0323_class_init(ObjectClass *klass, void *data)
357 {
358 DeviceClass *dc = DEVICE_CLASS(klass);
359 SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
360
361 k->realize = ssd0323_realize;
362 k->transfer = ssd0323_transfer;
363 k->cs_polarity = SSI_CS_HIGH;
364 dc->vmsd = &vmstate_ssd0323;
365 }
366
367 static const TypeInfo ssd0323_info = {
368 .name = "ssd0323",
369 .parent = TYPE_SSI_SLAVE,
370 .instance_size = sizeof(ssd0323_state),
371 .class_init = ssd0323_class_init,
372 };
373
374 static void ssd03232_register_types(void)
375 {
376 type_register_static(&ssd0323_info);
377 }
378
379 type_init(ssd03232_register_types)