pcie_aer: support configurable AER capa version
[qemu.git] / hw / dma / i82374.c
1 /*
2 * QEMU Intel 82374 emulation (Enhanced DMA controller)
3 *
4 * Copyright (c) 2010 Hervé Poussineau
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include "qemu/osdep.h"
26 #include "hw/isa/isa.h"
27
28 #define TYPE_I82374 "i82374"
29 #define I82374(obj) OBJECT_CHECK(I82374State, (obj), TYPE_I82374)
30
31 //#define DEBUG_I82374
32
33 #ifdef DEBUG_I82374
34 #define DPRINTF(fmt, ...) \
35 do { fprintf(stderr, "i82374: " fmt , ## __VA_ARGS__); } while (0)
36 #else
37 #define DPRINTF(fmt, ...) \
38 do {} while (0)
39 #endif
40 #define BADF(fmt, ...) \
41 do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0)
42
43 typedef struct I82374State {
44 ISADevice parent_obj;
45
46 uint32_t iobase;
47 uint8_t commands[8];
48 PortioList port_list;
49 } I82374State;
50
51 static const VMStateDescription vmstate_i82374 = {
52 .name = "i82374",
53 .version_id = 0,
54 .minimum_version_id = 0,
55 .fields = (VMStateField[]) {
56 VMSTATE_UINT8_ARRAY(commands, I82374State, 8),
57 VMSTATE_END_OF_LIST()
58 },
59 };
60
61 static uint32_t i82374_read_isr(void *opaque, uint32_t nport)
62 {
63 uint32_t val = 0;
64
65 BADF("%s: %08x\n", __func__, nport);
66
67 DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
68 return val;
69 }
70
71 static void i82374_write_command(void *opaque, uint32_t nport, uint32_t data)
72 {
73 DPRINTF("%s: %08x=%08x\n", __func__, nport, data);
74
75 if (data != 0x42) {
76 /* Not Stop S/G command */
77 BADF("%s: %08x=%08x\n", __func__, nport, data);
78 }
79 }
80
81 static uint32_t i82374_read_status(void *opaque, uint32_t nport)
82 {
83 uint32_t val = 0;
84
85 BADF("%s: %08x\n", __func__, nport);
86
87 DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
88 return val;
89 }
90
91 static void i82374_write_descriptor(void *opaque, uint32_t nport, uint32_t data)
92 {
93 DPRINTF("%s: %08x=%08x\n", __func__, nport, data);
94
95 BADF("%s: %08x=%08x\n", __func__, nport, data);
96 }
97
98 static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport)
99 {
100 uint32_t val = 0;
101
102 BADF("%s: %08x\n", __func__, nport);
103
104 DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
105 return val;
106 }
107
108 static const MemoryRegionPortio i82374_portio_list[] = {
109 { 0x0A, 1, 1, .read = i82374_read_isr, },
110 { 0x10, 8, 1, .write = i82374_write_command, },
111 { 0x18, 8, 1, .read = i82374_read_status, },
112 { 0x20, 0x20, 1,
113 .write = i82374_write_descriptor, .read = i82374_read_descriptor, },
114 PORTIO_END_OF_LIST(),
115 };
116
117 static void i82374_realize(DeviceState *dev, Error **errp)
118 {
119 I82374State *s = I82374(dev);
120
121 portio_list_init(&s->port_list, OBJECT(s), i82374_portio_list, s,
122 "i82374");
123 portio_list_add(&s->port_list, isa_address_space_io(&s->parent_obj),
124 s->iobase);
125
126 DMA_init(isa_bus_from_device(ISA_DEVICE(dev)), 1);
127 memset(s->commands, 0, sizeof(s->commands));
128 }
129
130 static Property i82374_properties[] = {
131 DEFINE_PROP_UINT32("iobase", I82374State, iobase, 0x400),
132 DEFINE_PROP_END_OF_LIST()
133 };
134
135 static void i82374_class_init(ObjectClass *klass, void *data)
136 {
137 DeviceClass *dc = DEVICE_CLASS(klass);
138
139 dc->realize = i82374_realize;
140 dc->vmsd = &vmstate_i82374;
141 dc->props = i82374_properties;
142 }
143
144 static const TypeInfo i82374_info = {
145 .name = TYPE_I82374,
146 .parent = TYPE_ISA_DEVICE,
147 .instance_size = sizeof(I82374State),
148 .class_init = i82374_class_init,
149 };
150
151 static void i82374_register_types(void)
152 {
153 type_register_static(&i82374_info);
154 }
155
156 type_init(i82374_register_types)