Merge remote-tracking branch 'remotes/philmd-gitlab/tags/renesas-20201027' into staging
[qemu.git] / hw / hppa / machine.c
1 /*
2 * QEMU HPPA hardware system emulator.
3 * Copyright 2018 Helge Deller <deller@gmx.de>
4 */
5
6 #include "qemu/osdep.h"
7 #include "qemu-common.h"
8 #include "cpu.h"
9 #include "elf.h"
10 #include "hw/loader.h"
11 #include "hw/boards.h"
12 #include "qemu/error-report.h"
13 #include "sysemu/reset.h"
14 #include "sysemu/sysemu.h"
15 #include "sysemu/runstate.h"
16 #include "hw/rtc/mc146818rtc.h"
17 #include "hw/timer/i8254.h"
18 #include "hw/char/serial.h"
19 #include "hw/net/lasi_82596.h"
20 #include "hppa_sys.h"
21 #include "qemu/units.h"
22 #include "qapi/error.h"
23 #include "net/net.h"
24 #include "qemu/log.h"
25 #include "net/net.h"
26
27 #define MAX_IDE_BUS 2
28
29 #define MIN_SEABIOS_HPPA_VERSION 1 /* require at least this fw version */
30
31 #define HPA_POWER_BUTTON (FIRMWARE_END - 0x10)
32
33 static void hppa_powerdown_req(Notifier *n, void *opaque)
34 {
35 hwaddr soft_power_reg = HPA_POWER_BUTTON;
36 uint32_t val;
37
38 val = ldl_be_phys(&address_space_memory, soft_power_reg);
39 if ((val >> 8) == 0) {
40 /* immediately shut down when under hardware control */
41 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
42 return;
43 }
44
45 /* clear bit 31 to indicate that the power switch was pressed. */
46 val &= ~1;
47 stl_be_phys(&address_space_memory, soft_power_reg, val);
48 }
49
50 static Notifier hppa_system_powerdown_notifier = {
51 .notify = hppa_powerdown_req
52 };
53
54
55 static ISABus *hppa_isa_bus(void)
56 {
57 ISABus *isa_bus;
58 qemu_irq *isa_irqs;
59 MemoryRegion *isa_region;
60
61 isa_region = g_new(MemoryRegion, 1);
62 memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops,
63 NULL, "isa-io", 0x800);
64 memory_region_add_subregion(get_system_memory(), IDE_HPA,
65 isa_region);
66
67 isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region,
68 &error_abort);
69 isa_irqs = i8259_init(isa_bus,
70 /* qemu_allocate_irq(dino_set_isa_irq, s, 0)); */
71 NULL);
72 isa_bus_irqs(isa_bus, isa_irqs);
73
74 return isa_bus;
75 }
76
77 static uint64_t cpu_hppa_to_phys(void *opaque, uint64_t addr)
78 {
79 addr &= (0x10000000 - 1);
80 return addr;
81 }
82
83 static HPPACPU *cpu[HPPA_MAX_CPUS];
84 static uint64_t firmware_entry;
85
86 static void fw_cfg_boot_set(void *opaque, const char *boot_device,
87 Error **errp)
88 {
89 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
90 }
91
92 static FWCfgState *create_fw_cfg(MachineState *ms)
93 {
94 FWCfgState *fw_cfg;
95 uint64_t val;
96
97 fw_cfg = fw_cfg_init_mem(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4);
98 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus);
99 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS);
100 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ram_size);
101
102 val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION);
103 fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version",
104 g_memdup(&val, sizeof(val)), sizeof(val));
105
106 val = cpu_to_le64(HPPA_TLB_ENTRIES);
107 fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries",
108 g_memdup(&val, sizeof(val)), sizeof(val));
109
110 val = cpu_to_le64(HPPA_BTLB_ENTRIES);
111 fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries",
112 g_memdup(&val, sizeof(val)), sizeof(val));
113
114 val = cpu_to_le64(HPA_POWER_BUTTON);
115 fw_cfg_add_file(fw_cfg, "/etc/power-button-addr",
116 g_memdup(&val, sizeof(val)), sizeof(val));
117
118 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_order[0]);
119 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
120
121 return fw_cfg;
122 }
123
124 static void machine_hppa_init(MachineState *machine)
125 {
126 const char *kernel_filename = machine->kernel_filename;
127 const char *kernel_cmdline = machine->kernel_cmdline;
128 const char *initrd_filename = machine->initrd_filename;
129 DeviceState *dev;
130 PCIBus *pci_bus;
131 ISABus *isa_bus;
132 qemu_irq rtc_irq, serial_irq;
133 char *firmware_filename;
134 uint64_t firmware_low, firmware_high;
135 long size;
136 uint64_t kernel_entry = 0, kernel_low, kernel_high;
137 MemoryRegion *addr_space = get_system_memory();
138 MemoryRegion *rom_region;
139 MemoryRegion *cpu_region;
140 long i;
141 unsigned int smp_cpus = machine->smp.cpus;
142 SysBusDevice *s;
143
144 /* Create CPUs. */
145 for (i = 0; i < smp_cpus; i++) {
146 char *name = g_strdup_printf("cpu%ld-io-eir", i);
147 cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type));
148
149 cpu_region = g_new(MemoryRegion, 1);
150 memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops,
151 cpu[i], name, 4);
152 memory_region_add_subregion(addr_space, CPU_HPA + i * 0x1000,
153 cpu_region);
154 g_free(name);
155 }
156
157 /* Main memory region. */
158 if (machine->ram_size > 3 * GiB) {
159 error_report("RAM size is currently restricted to 3GB");
160 exit(EXIT_FAILURE);
161 }
162 memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1);
163
164
165 /* Init Lasi chip */
166 lasi_init(addr_space);
167
168 /* Init Dino (PCI host bus chip). */
169 pci_bus = dino_init(addr_space, &rtc_irq, &serial_irq);
170 assert(pci_bus);
171
172 /* Create ISA bus. */
173 isa_bus = hppa_isa_bus();
174 assert(isa_bus);
175
176 /* Realtime clock, used by firmware for PDC_TOD call. */
177 mc146818_rtc_init(isa_bus, 2000, rtc_irq);
178
179 /* Serial code setup. */
180 if (serial_hd(0)) {
181 uint32_t addr = DINO_UART_HPA + 0x800;
182 serial_mm_init(addr_space, addr, 0, serial_irq,
183 115200, serial_hd(0), DEVICE_BIG_ENDIAN);
184 }
185
186 /* fw_cfg configuration interface */
187 create_fw_cfg(machine);
188
189 /* SCSI disk setup. */
190 dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a"));
191 lsi53c8xx_handle_legacy_cmdline(dev);
192
193 /* Graphics setup. */
194 if (machine->enable_graphics && vga_interface_type != VGA_NONE) {
195 dev = qdev_new("artist");
196 s = SYS_BUS_DEVICE(dev);
197 sysbus_realize_and_unref(s, &error_fatal);
198 sysbus_mmio_map(s, 0, LASI_GFX_HPA);
199 sysbus_mmio_map(s, 1, ARTIST_FB_ADDR);
200 }
201
202 /* Network setup. */
203 for (i = 0; i < nb_nics; i++) {
204 if (!enable_lasi_lan()) {
205 pci_nic_init_nofail(&nd_table[i], pci_bus, "tulip", NULL);
206 }
207 }
208
209 /* register power switch emulation */
210 qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier);
211
212 /* Load firmware. Given that this is not "real" firmware,
213 but one explicitly written for the emulation, we might as
214 well load it directly from an ELF image. */
215 firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
216 bios_name ? bios_name :
217 "hppa-firmware.img");
218 if (firmware_filename == NULL) {
219 error_report("no firmware provided");
220 exit(1);
221 }
222
223 size = load_elf(firmware_filename, NULL, NULL, NULL,
224 &firmware_entry, &firmware_low, &firmware_high, NULL,
225 true, EM_PARISC, 0, 0);
226
227 /* Unfortunately, load_elf sign-extends reading elf32. */
228 firmware_entry = (target_ureg)firmware_entry;
229 firmware_low = (target_ureg)firmware_low;
230 firmware_high = (target_ureg)firmware_high;
231
232 if (size < 0) {
233 error_report("could not load firmware '%s'", firmware_filename);
234 exit(1);
235 }
236 qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64
237 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n",
238 firmware_low, firmware_high, firmware_entry);
239 if (firmware_low < FIRMWARE_START || firmware_high >= FIRMWARE_END) {
240 error_report("Firmware overlaps with memory or IO space");
241 exit(1);
242 }
243 g_free(firmware_filename);
244
245 rom_region = g_new(MemoryRegion, 1);
246 memory_region_init_ram(rom_region, NULL, "firmware",
247 (FIRMWARE_END - FIRMWARE_START), &error_fatal);
248 memory_region_add_subregion(addr_space, FIRMWARE_START, rom_region);
249
250 /* Load kernel */
251 if (kernel_filename) {
252 size = load_elf(kernel_filename, NULL, &cpu_hppa_to_phys,
253 NULL, &kernel_entry, &kernel_low, &kernel_high, NULL,
254 true, EM_PARISC, 0, 0);
255
256 /* Unfortunately, load_elf sign-extends reading elf32. */
257 kernel_entry = (target_ureg) cpu_hppa_to_phys(NULL, kernel_entry);
258 kernel_low = (target_ureg)kernel_low;
259 kernel_high = (target_ureg)kernel_high;
260
261 if (size < 0) {
262 error_report("could not load kernel '%s'", kernel_filename);
263 exit(1);
264 }
265 qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64
266 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64
267 ", size %" PRIu64 " kB\n",
268 kernel_low, kernel_high, kernel_entry, size / KiB);
269
270 if (kernel_cmdline) {
271 cpu[0]->env.gr[24] = 0x4000;
272 pstrcpy_targphys("cmdline", cpu[0]->env.gr[24],
273 TARGET_PAGE_SIZE, kernel_cmdline);
274 }
275
276 if (initrd_filename) {
277 ram_addr_t initrd_base;
278 int64_t initrd_size;
279
280 initrd_size = get_image_size(initrd_filename);
281 if (initrd_size < 0) {
282 error_report("could not load initial ram disk '%s'",
283 initrd_filename);
284 exit(1);
285 }
286
287 /* Load the initrd image high in memory.
288 Mirror the algorithm used by palo:
289 (1) Due to sign-extension problems and PDC,
290 put the initrd no higher than 1G.
291 (2) Reserve 64k for stack. */
292 initrd_base = MIN(ram_size, 1 * GiB);
293 initrd_base = initrd_base - 64 * KiB;
294 initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK;
295
296 if (initrd_base < kernel_high) {
297 error_report("kernel and initial ram disk too large!");
298 exit(1);
299 }
300
301 load_image_targphys(initrd_filename, initrd_base, initrd_size);
302 cpu[0]->env.gr[23] = initrd_base;
303 cpu[0]->env.gr[22] = initrd_base + initrd_size;
304 }
305 }
306
307 if (!kernel_entry) {
308 /* When booting via firmware, tell firmware if we want interactive
309 * mode (kernel_entry=1), and to boot from CD (gr[24]='d')
310 * or hard disc * (gr[24]='c').
311 */
312 kernel_entry = boot_menu ? 1 : 0;
313 cpu[0]->env.gr[24] = machine->boot_order[0];
314 }
315
316 /* We jump to the firmware entry routine and pass the
317 * various parameters in registers. After firmware initialization,
318 * firmware will start the Linux kernel with ramdisk and cmdline.
319 */
320 cpu[0]->env.gr[26] = ram_size;
321 cpu[0]->env.gr[25] = kernel_entry;
322
323 /* tell firmware how many SMP CPUs to present in inventory table */
324 cpu[0]->env.gr[21] = smp_cpus;
325
326 /* tell firmware fw_cfg port */
327 cpu[0]->env.gr[19] = FW_CFG_IO_BASE;
328 }
329
330 static void hppa_machine_reset(MachineState *ms)
331 {
332 unsigned int smp_cpus = ms->smp.cpus;
333 int i;
334
335 qemu_devices_reset();
336
337 /* Start all CPUs at the firmware entry point.
338 * Monarch CPU will initialize firmware, secondary CPUs
339 * will enter a small idle look and wait for rendevouz. */
340 for (i = 0; i < smp_cpus; i++) {
341 cpu_set_pc(CPU(cpu[i]), firmware_entry);
342 cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000;
343 }
344
345 /* already initialized by machine_hppa_init()? */
346 if (cpu[0]->env.gr[26] == ram_size) {
347 return;
348 }
349
350 cpu[0]->env.gr[26] = ram_size;
351 cpu[0]->env.gr[25] = 0; /* no firmware boot menu */
352 cpu[0]->env.gr[24] = 'c';
353 /* gr22/gr23 unused, no initrd while reboot. */
354 cpu[0]->env.gr[21] = smp_cpus;
355 /* tell firmware fw_cfg port */
356 cpu[0]->env.gr[19] = FW_CFG_IO_BASE;
357 }
358
359
360 static void machine_hppa_machine_init(MachineClass *mc)
361 {
362 mc->desc = "HPPA generic machine";
363 mc->default_cpu_type = TYPE_HPPA_CPU;
364 mc->init = machine_hppa_init;
365 mc->reset = hppa_machine_reset;
366 mc->block_default_type = IF_SCSI;
367 mc->max_cpus = HPPA_MAX_CPUS;
368 mc->default_cpus = 1;
369 mc->is_default = true;
370 mc->default_ram_size = 512 * MiB;
371 mc->default_boot_order = "cd";
372 mc->default_ram_id = "ram";
373 }
374
375 DEFINE_MACHINE("hppa", machine_hppa_machine_init)