microvm/acpi: use seabios with acpi=on
[qemu.git] / hw / i386 / microvm.c
1 /*
2 * Copyright (c) 2018 Intel Corporation
3 * Copyright (c) 2019 Red Hat, Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2 or later, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18 #include "qemu/osdep.h"
19 #include "qemu/error-report.h"
20 #include "qemu/cutils.h"
21 #include "qemu/units.h"
22 #include "qapi/error.h"
23 #include "qapi/visitor.h"
24 #include "qapi/qapi-visit-common.h"
25 #include "sysemu/sysemu.h"
26 #include "sysemu/cpus.h"
27 #include "sysemu/numa.h"
28 #include "sysemu/reset.h"
29 #include "sysemu/runstate.h"
30 #include "acpi-microvm.h"
31
32 #include "hw/loader.h"
33 #include "hw/irq.h"
34 #include "hw/kvm/clock.h"
35 #include "hw/i386/microvm.h"
36 #include "hw/i386/x86.h"
37 #include "target/i386/cpu.h"
38 #include "hw/intc/i8259.h"
39 #include "hw/timer/i8254.h"
40 #include "hw/rtc/mc146818rtc.h"
41 #include "hw/char/serial.h"
42 #include "hw/i386/topology.h"
43 #include "hw/i386/e820_memory_layout.h"
44 #include "hw/i386/fw_cfg.h"
45 #include "hw/virtio/virtio-mmio.h"
46 #include "hw/acpi/acpi.h"
47 #include "hw/acpi/generic_event_device.h"
48
49 #include "cpu.h"
50 #include "elf.h"
51 #include "kvm_i386.h"
52 #include "hw/xen/start_info.h"
53
54 #define MICROVM_QBOOT_FILENAME "qboot.rom"
55 #define MICROVM_BIOS_FILENAME "bios-microvm.bin"
56
57 static void microvm_set_rtc(MicrovmMachineState *mms, ISADevice *s)
58 {
59 X86MachineState *x86ms = X86_MACHINE(mms);
60 int val;
61
62 val = MIN(x86ms->below_4g_mem_size / KiB, 640);
63 rtc_set_memory(s, 0x15, val);
64 rtc_set_memory(s, 0x16, val >> 8);
65 /* extended memory (next 64MiB) */
66 if (x86ms->below_4g_mem_size > 1 * MiB) {
67 val = (x86ms->below_4g_mem_size - 1 * MiB) / KiB;
68 } else {
69 val = 0;
70 }
71 if (val > 65535) {
72 val = 65535;
73 }
74 rtc_set_memory(s, 0x17, val);
75 rtc_set_memory(s, 0x18, val >> 8);
76 rtc_set_memory(s, 0x30, val);
77 rtc_set_memory(s, 0x31, val >> 8);
78 /* memory between 16MiB and 4GiB */
79 if (x86ms->below_4g_mem_size > 16 * MiB) {
80 val = (x86ms->below_4g_mem_size - 16 * MiB) / (64 * KiB);
81 } else {
82 val = 0;
83 }
84 if (val > 65535) {
85 val = 65535;
86 }
87 rtc_set_memory(s, 0x34, val);
88 rtc_set_memory(s, 0x35, val >> 8);
89 /* memory above 4GiB */
90 val = x86ms->above_4g_mem_size / 65536;
91 rtc_set_memory(s, 0x5b, val);
92 rtc_set_memory(s, 0x5c, val >> 8);
93 rtc_set_memory(s, 0x5d, val >> 16);
94 }
95
96 static void microvm_gsi_handler(void *opaque, int n, int level)
97 {
98 GSIState *s = opaque;
99
100 qemu_set_irq(s->ioapic_irq[n], level);
101 }
102
103 static void microvm_devices_init(MicrovmMachineState *mms)
104 {
105 X86MachineState *x86ms = X86_MACHINE(mms);
106 ISABus *isa_bus;
107 ISADevice *rtc_state;
108 GSIState *gsi_state;
109 int i;
110
111 /* Core components */
112
113 gsi_state = g_malloc0(sizeof(*gsi_state));
114 if (mms->pic == ON_OFF_AUTO_ON || mms->pic == ON_OFF_AUTO_AUTO) {
115 x86ms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
116 } else {
117 x86ms->gsi = qemu_allocate_irqs(microvm_gsi_handler,
118 gsi_state, GSI_NUM_PINS);
119 }
120
121 isa_bus = isa_bus_new(NULL, get_system_memory(), get_system_io(),
122 &error_abort);
123 isa_bus_irqs(isa_bus, x86ms->gsi);
124
125 ioapic_init_gsi(gsi_state, "machine");
126
127 kvmclock_create();
128
129 mms->virtio_irq_base = x86_machine_is_acpi_enabled(x86ms) ? 16 : 5;
130 for (i = 0; i < VIRTIO_NUM_TRANSPORTS; i++) {
131 sysbus_create_simple("virtio-mmio",
132 VIRTIO_MMIO_BASE + i * 512,
133 x86ms->gsi[mms->virtio_irq_base + i]);
134 }
135
136 /* Optional and legacy devices */
137 if (x86_machine_is_acpi_enabled(x86ms)) {
138 DeviceState *dev = qdev_new(TYPE_ACPI_GED_X86);
139 qdev_prop_set_uint32(dev, "ged-event", ACPI_GED_PWR_DOWN_EVT);
140 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, GED_MMIO_BASE);
141 /* sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, GED_MMIO_BASE_MEMHP); */
142 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, GED_MMIO_BASE_REGS);
143 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
144 x86ms->gsi[GED_MMIO_IRQ]);
145 sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
146 mms->acpi_dev = ACPI_DEVICE_IF(dev);
147 }
148
149 if (mms->pic == ON_OFF_AUTO_ON || mms->pic == ON_OFF_AUTO_AUTO) {
150 qemu_irq *i8259;
151
152 i8259 = i8259_init(isa_bus, x86_allocate_cpu_irq());
153 for (i = 0; i < ISA_NUM_IRQS; i++) {
154 gsi_state->i8259_irq[i] = i8259[i];
155 }
156 g_free(i8259);
157 }
158
159 if (mms->pit == ON_OFF_AUTO_ON || mms->pit == ON_OFF_AUTO_AUTO) {
160 if (kvm_pit_in_kernel()) {
161 kvm_pit_init(isa_bus, 0x40);
162 } else {
163 i8254_pit_init(isa_bus, 0x40, 0, NULL);
164 }
165 }
166
167 if (mms->rtc == ON_OFF_AUTO_ON ||
168 (mms->rtc == ON_OFF_AUTO_AUTO && !kvm_enabled())) {
169 rtc_state = mc146818_rtc_init(isa_bus, 2000, NULL);
170 microvm_set_rtc(mms, rtc_state);
171 }
172
173 if (mms->isa_serial) {
174 serial_hds_isa_init(isa_bus, 0, 1);
175 }
176
177 if (bios_name == NULL) {
178 bios_name = x86_machine_is_acpi_enabled(x86ms)
179 ? MICROVM_BIOS_FILENAME
180 : MICROVM_QBOOT_FILENAME;
181 }
182 x86_bios_rom_init(get_system_memory(), true);
183 }
184
185 static void microvm_memory_init(MicrovmMachineState *mms)
186 {
187 MachineState *machine = MACHINE(mms);
188 X86MachineState *x86ms = X86_MACHINE(mms);
189 MemoryRegion *ram_below_4g, *ram_above_4g;
190 MemoryRegion *system_memory = get_system_memory();
191 FWCfgState *fw_cfg;
192 ram_addr_t lowmem = 0xc0000000; /* 3G */
193 int i;
194
195 if (machine->ram_size > lowmem) {
196 x86ms->above_4g_mem_size = machine->ram_size - lowmem;
197 x86ms->below_4g_mem_size = lowmem;
198 } else {
199 x86ms->above_4g_mem_size = 0;
200 x86ms->below_4g_mem_size = machine->ram_size;
201 }
202
203 ram_below_4g = g_malloc(sizeof(*ram_below_4g));
204 memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", machine->ram,
205 0, x86ms->below_4g_mem_size);
206 memory_region_add_subregion(system_memory, 0, ram_below_4g);
207
208 e820_add_entry(0, x86ms->below_4g_mem_size, E820_RAM);
209
210 if (x86ms->above_4g_mem_size > 0) {
211 ram_above_4g = g_malloc(sizeof(*ram_above_4g));
212 memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g",
213 machine->ram,
214 x86ms->below_4g_mem_size,
215 x86ms->above_4g_mem_size);
216 memory_region_add_subregion(system_memory, 0x100000000ULL,
217 ram_above_4g);
218 e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM);
219 }
220
221 fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4,
222 &address_space_memory);
223
224 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, machine->smp.cpus);
225 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, machine->smp.max_cpus);
226 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size);
227 fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override());
228 fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
229 &e820_reserve, sizeof(e820_reserve));
230 fw_cfg_add_file(fw_cfg, "etc/e820", e820_table,
231 sizeof(struct e820_entry) * e820_get_num_entries());
232
233 rom_set_fw(fw_cfg);
234
235 if (machine->kernel_filename != NULL) {
236 x86_load_linux(x86ms, fw_cfg, 0, true, true);
237 }
238
239 if (mms->option_roms) {
240 for (i = 0; i < nb_option_roms; i++) {
241 rom_add_option(option_rom[i].name, option_rom[i].bootindex);
242 }
243 }
244
245 x86ms->fw_cfg = fw_cfg;
246 x86ms->ioapic_as = &address_space_memory;
247 }
248
249 static gchar *microvm_get_mmio_cmdline(gchar *name, uint32_t virtio_irq_base)
250 {
251 gchar *cmdline;
252 gchar *separator;
253 long int index;
254 int ret;
255
256 separator = g_strrstr(name, ".");
257 if (!separator) {
258 return NULL;
259 }
260
261 if (qemu_strtol(separator + 1, NULL, 10, &index) != 0) {
262 return NULL;
263 }
264
265 cmdline = g_malloc0(VIRTIO_CMDLINE_MAXLEN);
266 ret = g_snprintf(cmdline, VIRTIO_CMDLINE_MAXLEN,
267 " virtio_mmio.device=512@0x%lx:%ld",
268 VIRTIO_MMIO_BASE + index * 512,
269 virtio_irq_base + index);
270 if (ret < 0 || ret >= VIRTIO_CMDLINE_MAXLEN) {
271 g_free(cmdline);
272 return NULL;
273 }
274
275 return cmdline;
276 }
277
278 static void microvm_fix_kernel_cmdline(MachineState *machine)
279 {
280 X86MachineState *x86ms = X86_MACHINE(machine);
281 MicrovmMachineState *mms = MICROVM_MACHINE(machine);
282 BusState *bus;
283 BusChild *kid;
284 char *cmdline;
285
286 /*
287 * Find MMIO transports with attached devices, and add them to the kernel
288 * command line.
289 *
290 * Yes, this is a hack, but one that heavily improves the UX without
291 * introducing any significant issues.
292 */
293 cmdline = g_strdup(machine->kernel_cmdline);
294 bus = sysbus_get_default();
295 QTAILQ_FOREACH(kid, &bus->children, sibling) {
296 DeviceState *dev = kid->child;
297 ObjectClass *class = object_get_class(OBJECT(dev));
298
299 if (class == object_class_by_name(TYPE_VIRTIO_MMIO)) {
300 VirtIOMMIOProxy *mmio = VIRTIO_MMIO(OBJECT(dev));
301 VirtioBusState *mmio_virtio_bus = &mmio->bus;
302 BusState *mmio_bus = &mmio_virtio_bus->parent_obj;
303
304 if (!QTAILQ_EMPTY(&mmio_bus->children)) {
305 gchar *mmio_cmdline = microvm_get_mmio_cmdline
306 (mmio_bus->name, mms->virtio_irq_base);
307 if (mmio_cmdline) {
308 char *newcmd = g_strjoin(NULL, cmdline, mmio_cmdline, NULL);
309 g_free(mmio_cmdline);
310 g_free(cmdline);
311 cmdline = newcmd;
312 }
313 }
314 }
315 }
316
317 fw_cfg_modify_i32(x86ms->fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(cmdline) + 1);
318 fw_cfg_modify_string(x86ms->fw_cfg, FW_CFG_CMDLINE_DATA, cmdline);
319
320 g_free(cmdline);
321 }
322
323 static void microvm_machine_state_init(MachineState *machine)
324 {
325 MicrovmMachineState *mms = MICROVM_MACHINE(machine);
326 X86MachineState *x86ms = X86_MACHINE(machine);
327 Error *local_err = NULL;
328
329 microvm_memory_init(mms);
330
331 x86_cpus_init(x86ms, CPU_VERSION_LATEST);
332 if (local_err) {
333 error_report_err(local_err);
334 exit(1);
335 }
336
337 microvm_devices_init(mms);
338 }
339
340 static void microvm_machine_reset(MachineState *machine)
341 {
342 MicrovmMachineState *mms = MICROVM_MACHINE(machine);
343 CPUState *cs;
344 X86CPU *cpu;
345
346 if (machine->kernel_filename != NULL &&
347 mms->auto_kernel_cmdline && !mms->kernel_cmdline_fixed) {
348 microvm_fix_kernel_cmdline(machine);
349 mms->kernel_cmdline_fixed = true;
350 }
351
352 qemu_devices_reset();
353
354 CPU_FOREACH(cs) {
355 cpu = X86_CPU(cs);
356
357 if (cpu->apic_state) {
358 device_legacy_reset(cpu->apic_state);
359 }
360 }
361 }
362
363 static void microvm_machine_get_pic(Object *obj, Visitor *v, const char *name,
364 void *opaque, Error **errp)
365 {
366 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
367 OnOffAuto pic = mms->pic;
368
369 visit_type_OnOffAuto(v, name, &pic, errp);
370 }
371
372 static void microvm_machine_set_pic(Object *obj, Visitor *v, const char *name,
373 void *opaque, Error **errp)
374 {
375 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
376
377 visit_type_OnOffAuto(v, name, &mms->pic, errp);
378 }
379
380 static void microvm_machine_get_pit(Object *obj, Visitor *v, const char *name,
381 void *opaque, Error **errp)
382 {
383 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
384 OnOffAuto pit = mms->pit;
385
386 visit_type_OnOffAuto(v, name, &pit, errp);
387 }
388
389 static void microvm_machine_set_pit(Object *obj, Visitor *v, const char *name,
390 void *opaque, Error **errp)
391 {
392 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
393
394 visit_type_OnOffAuto(v, name, &mms->pit, errp);
395 }
396
397 static void microvm_machine_get_rtc(Object *obj, Visitor *v, const char *name,
398 void *opaque, Error **errp)
399 {
400 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
401 OnOffAuto rtc = mms->rtc;
402
403 visit_type_OnOffAuto(v, name, &rtc, errp);
404 }
405
406 static void microvm_machine_set_rtc(Object *obj, Visitor *v, const char *name,
407 void *opaque, Error **errp)
408 {
409 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
410
411 visit_type_OnOffAuto(v, name, &mms->rtc, errp);
412 }
413
414 static bool microvm_machine_get_isa_serial(Object *obj, Error **errp)
415 {
416 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
417
418 return mms->isa_serial;
419 }
420
421 static void microvm_machine_set_isa_serial(Object *obj, bool value,
422 Error **errp)
423 {
424 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
425
426 mms->isa_serial = value;
427 }
428
429 static bool microvm_machine_get_option_roms(Object *obj, Error **errp)
430 {
431 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
432
433 return mms->option_roms;
434 }
435
436 static void microvm_machine_set_option_roms(Object *obj, bool value,
437 Error **errp)
438 {
439 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
440
441 mms->option_roms = value;
442 }
443
444 static bool microvm_machine_get_auto_kernel_cmdline(Object *obj, Error **errp)
445 {
446 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
447
448 return mms->auto_kernel_cmdline;
449 }
450
451 static void microvm_machine_set_auto_kernel_cmdline(Object *obj, bool value,
452 Error **errp)
453 {
454 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
455
456 mms->auto_kernel_cmdline = value;
457 }
458
459 static void microvm_machine_done(Notifier *notifier, void *data)
460 {
461 MicrovmMachineState *mms = container_of(notifier, MicrovmMachineState,
462 machine_done);
463
464 acpi_setup_microvm(mms);
465 }
466
467 static void microvm_powerdown_req(Notifier *notifier, void *data)
468 {
469 MicrovmMachineState *mms = container_of(notifier, MicrovmMachineState,
470 powerdown_req);
471
472 if (mms->acpi_dev) {
473 Object *obj = OBJECT(mms->acpi_dev);
474 AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj);
475 adevc->send_event(mms->acpi_dev, ACPI_POWER_DOWN_STATUS);
476 }
477 }
478
479 static void microvm_machine_initfn(Object *obj)
480 {
481 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
482
483 /* Configuration */
484 mms->pic = ON_OFF_AUTO_AUTO;
485 mms->pit = ON_OFF_AUTO_AUTO;
486 mms->rtc = ON_OFF_AUTO_AUTO;
487 mms->isa_serial = true;
488 mms->option_roms = true;
489 mms->auto_kernel_cmdline = true;
490
491 /* State */
492 mms->kernel_cmdline_fixed = false;
493
494 mms->machine_done.notify = microvm_machine_done;
495 qemu_add_machine_init_done_notifier(&mms->machine_done);
496 mms->powerdown_req.notify = microvm_powerdown_req;
497 qemu_register_powerdown_notifier(&mms->powerdown_req);
498 }
499
500 static void microvm_class_init(ObjectClass *oc, void *data)
501 {
502 MachineClass *mc = MACHINE_CLASS(oc);
503
504 mc->init = microvm_machine_state_init;
505
506 mc->family = "microvm_i386";
507 mc->desc = "microvm (i386)";
508 mc->units_per_default_bus = 1;
509 mc->no_floppy = 1;
510 mc->max_cpus = 288;
511 mc->has_hotpluggable_cpus = false;
512 mc->auto_enable_numa_with_memhp = false;
513 mc->auto_enable_numa_with_memdev = false;
514 mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE;
515 mc->nvdimm_supported = false;
516 mc->default_ram_id = "microvm.ram";
517
518 /* Avoid relying too much on kernel components */
519 mc->default_kernel_irqchip_split = true;
520
521 /* Machine class handlers */
522 mc->reset = microvm_machine_reset;
523
524 object_class_property_add(oc, MICROVM_MACHINE_PIC, "OnOffAuto",
525 microvm_machine_get_pic,
526 microvm_machine_set_pic,
527 NULL, NULL);
528 object_class_property_set_description(oc, MICROVM_MACHINE_PIC,
529 "Enable i8259 PIC");
530
531 object_class_property_add(oc, MICROVM_MACHINE_PIT, "OnOffAuto",
532 microvm_machine_get_pit,
533 microvm_machine_set_pit,
534 NULL, NULL);
535 object_class_property_set_description(oc, MICROVM_MACHINE_PIT,
536 "Enable i8254 PIT");
537
538 object_class_property_add(oc, MICROVM_MACHINE_RTC, "OnOffAuto",
539 microvm_machine_get_rtc,
540 microvm_machine_set_rtc,
541 NULL, NULL);
542 object_class_property_set_description(oc, MICROVM_MACHINE_RTC,
543 "Enable MC146818 RTC");
544
545 object_class_property_add_bool(oc, MICROVM_MACHINE_ISA_SERIAL,
546 microvm_machine_get_isa_serial,
547 microvm_machine_set_isa_serial);
548 object_class_property_set_description(oc, MICROVM_MACHINE_ISA_SERIAL,
549 "Set off to disable the instantiation an ISA serial port");
550
551 object_class_property_add_bool(oc, MICROVM_MACHINE_OPTION_ROMS,
552 microvm_machine_get_option_roms,
553 microvm_machine_set_option_roms);
554 object_class_property_set_description(oc, MICROVM_MACHINE_OPTION_ROMS,
555 "Set off to disable loading option ROMs");
556
557 object_class_property_add_bool(oc, MICROVM_MACHINE_AUTO_KERNEL_CMDLINE,
558 microvm_machine_get_auto_kernel_cmdline,
559 microvm_machine_set_auto_kernel_cmdline);
560 object_class_property_set_description(oc,
561 MICROVM_MACHINE_AUTO_KERNEL_CMDLINE,
562 "Set off to disable adding virtio-mmio devices to the kernel cmdline");
563 }
564
565 static const TypeInfo microvm_machine_info = {
566 .name = TYPE_MICROVM_MACHINE,
567 .parent = TYPE_X86_MACHINE,
568 .instance_size = sizeof(MicrovmMachineState),
569 .instance_init = microvm_machine_initfn,
570 .class_size = sizeof(MicrovmMachineClass),
571 .class_init = microvm_class_init,
572 .interfaces = (InterfaceInfo[]) {
573 { }
574 },
575 };
576
577 static void microvm_machine_init(void)
578 {
579 type_register_static(&microvm_machine_info);
580 }
581 type_init(microvm_machine_init);