qdev: don't access name through info
[qemu.git] / hw / i8259_common.c
1 /*
2 * QEMU 8259 - common bits of emulated and KVM kernel model
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2011 Jan Kiszka, Siemens AG
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25 #include "pc.h"
26 #include "i8259_internal.h"
27
28 void pic_reset_common(PICCommonState *s)
29 {
30 s->last_irr = 0;
31 s->irr = 0;
32 s->imr = 0;
33 s->isr = 0;
34 s->priority_add = 0;
35 s->irq_base = 0;
36 s->read_reg_select = 0;
37 s->poll = 0;
38 s->special_mask = 0;
39 s->init_state = 0;
40 s->auto_eoi = 0;
41 s->rotate_on_auto_eoi = 0;
42 s->special_fully_nested_mode = 0;
43 s->init4 = 0;
44 s->single_mode = 0;
45 /* Note: ELCR is not reset */
46 }
47
48 static void pic_dispatch_pre_save(void *opaque)
49 {
50 PICCommonState *s = opaque;
51 PICCommonInfo *info =
52 DO_UPCAST(PICCommonInfo, isadev.qdev, qdev_get_info(&s->dev.qdev));
53
54 if (info->pre_save) {
55 info->pre_save(s);
56 }
57 }
58
59 static int pic_dispatch_post_load(void *opaque, int version_id)
60 {
61 PICCommonState *s = opaque;
62 PICCommonInfo *info =
63 DO_UPCAST(PICCommonInfo, isadev.qdev, qdev_get_info(&s->dev.qdev));
64
65 if (info->post_load) {
66 info->post_load(s);
67 }
68 return 0;
69 }
70
71 static int pic_init_common(ISADevice *dev)
72 {
73 PICCommonState *s = DO_UPCAST(PICCommonState, dev, dev);
74 PICCommonInfo *info =
75 DO_UPCAST(PICCommonInfo, isadev.qdev, qdev_get_info(&dev->qdev));
76
77 info->init(s);
78
79 isa_register_ioport(NULL, &s->base_io, s->iobase);
80 if (s->elcr_addr != -1) {
81 isa_register_ioport(NULL, &s->elcr_io, s->elcr_addr);
82 }
83
84 qdev_set_legacy_instance_id(&s->dev.qdev, s->iobase, 1);
85
86 return 0;
87 }
88
89 ISADevice *i8259_init_chip(const char *name, ISABus *bus, bool master)
90 {
91 ISADevice *dev;
92
93 dev = isa_create(bus, name);
94 qdev_prop_set_uint32(&dev->qdev, "iobase", master ? 0x20 : 0xa0);
95 qdev_prop_set_uint32(&dev->qdev, "elcr_addr", master ? 0x4d0 : 0x4d1);
96 qdev_prop_set_uint8(&dev->qdev, "elcr_mask", master ? 0xf8 : 0xde);
97 qdev_prop_set_bit(&dev->qdev, "master", master);
98 qdev_init_nofail(&dev->qdev);
99
100 return dev;
101 }
102
103 static const VMStateDescription vmstate_pic_common = {
104 .name = "i8259",
105 .version_id = 1,
106 .minimum_version_id = 1,
107 .minimum_version_id_old = 1,
108 .pre_save = pic_dispatch_pre_save,
109 .post_load = pic_dispatch_post_load,
110 .fields = (VMStateField[]) {
111 VMSTATE_UINT8(last_irr, PICCommonState),
112 VMSTATE_UINT8(irr, PICCommonState),
113 VMSTATE_UINT8(imr, PICCommonState),
114 VMSTATE_UINT8(isr, PICCommonState),
115 VMSTATE_UINT8(priority_add, PICCommonState),
116 VMSTATE_UINT8(irq_base, PICCommonState),
117 VMSTATE_UINT8(read_reg_select, PICCommonState),
118 VMSTATE_UINT8(poll, PICCommonState),
119 VMSTATE_UINT8(special_mask, PICCommonState),
120 VMSTATE_UINT8(init_state, PICCommonState),
121 VMSTATE_UINT8(auto_eoi, PICCommonState),
122 VMSTATE_UINT8(rotate_on_auto_eoi, PICCommonState),
123 VMSTATE_UINT8(special_fully_nested_mode, PICCommonState),
124 VMSTATE_UINT8(init4, PICCommonState),
125 VMSTATE_UINT8(single_mode, PICCommonState),
126 VMSTATE_UINT8(elcr, PICCommonState),
127 VMSTATE_END_OF_LIST()
128 }
129 };
130
131 static Property pic_properties_common[] = {
132 DEFINE_PROP_HEX32("iobase", PICCommonState, iobase, -1),
133 DEFINE_PROP_HEX32("elcr_addr", PICCommonState, elcr_addr, -1),
134 DEFINE_PROP_HEX8("elcr_mask", PICCommonState, elcr_mask, -1),
135 DEFINE_PROP_BIT("master", PICCommonState, master, 0, false),
136 DEFINE_PROP_END_OF_LIST(),
137 };
138
139 void pic_qdev_register(PICCommonInfo *info)
140 {
141 info->isadev.init = pic_init_common;
142 info->isadev.qdev.size = sizeof(PICCommonState);
143 info->isadev.qdev.vmsd = &vmstate_pic_common;
144 info->isadev.qdev.no_user = 1;
145 info->isadev.qdev.props = pic_properties_common;
146 isa_qdev_register(&info->isadev);
147 }