vmxnet3: Use common MAC address tracing macros
[qemu.git] / hw / ide / internal.h
1 #ifndef HW_IDE_INTERNAL_H
2 #define HW_IDE_INTERNAL_H
3
4 /*
5 * QEMU IDE Emulation -- internal header file
6 * only files in hw/ide/ are supposed to include this file.
7 * non-internal declarations are in hw/ide.h
8 */
9 #include <hw/ide.h>
10 #include <hw/isa/isa.h>
11 #include "sysemu/dma.h"
12 #include "sysemu/sysemu.h"
13 #include "hw/block/block.h"
14 #include "block/scsi.h"
15
16 /* debug IDE devices */
17 //#define DEBUG_IDE
18 //#define DEBUG_IDE_ATAPI
19 //#define DEBUG_AIO
20 #define USE_DMA_CDROM
21
22 typedef struct IDEBus IDEBus;
23 typedef struct IDEDevice IDEDevice;
24 typedef struct IDEState IDEState;
25 typedef struct IDEDMA IDEDMA;
26 typedef struct IDEDMAOps IDEDMAOps;
27
28 #define TYPE_IDE_BUS "IDE"
29 #define IDE_BUS(obj) OBJECT_CHECK(IDEBus, (obj), TYPE_IDE_BUS)
30
31 /* Bits of HD_STATUS */
32 #define ERR_STAT 0x01
33 #define INDEX_STAT 0x02
34 #define ECC_STAT 0x04 /* Corrected error */
35 #define DRQ_STAT 0x08
36 #define SEEK_STAT 0x10
37 #define SRV_STAT 0x10
38 #define WRERR_STAT 0x20
39 #define READY_STAT 0x40
40 #define BUSY_STAT 0x80
41
42 /* Bits for HD_ERROR */
43 #define MARK_ERR 0x01 /* Bad address mark */
44 #define TRK0_ERR 0x02 /* couldn't find track 0 */
45 #define ABRT_ERR 0x04 /* Command aborted */
46 #define MCR_ERR 0x08 /* media change request */
47 #define ID_ERR 0x10 /* ID field not found */
48 #define MC_ERR 0x20 /* media changed */
49 #define ECC_ERR 0x40 /* Uncorrectable ECC error */
50 #define BBD_ERR 0x80 /* pre-EIDE meaning: block marked bad */
51 #define ICRC_ERR 0x80 /* new meaning: CRC error during transfer */
52
53 /* Bits of HD_NSECTOR */
54 #define CD 0x01
55 #define IO 0x02
56 #define REL 0x04
57 #define TAG_MASK 0xf8
58
59 #define IDE_CMD_RESET 0x04
60 #define IDE_CMD_DISABLE_IRQ 0x02
61
62 /* ACS-2 T13/2015-D Table B.2 Command codes */
63 #define WIN_NOP 0x00
64 /* reserved 0x01..0x02 */
65 #define CFA_REQ_EXT_ERROR_CODE 0x03 /* CFA Request Extended Error Code */
66 /* reserved 0x04..0x05 */
67 #define WIN_DSM 0x06
68 /* reserved 0x07 */
69 #define WIN_DEVICE_RESET 0x08
70 /* reserved 0x09..0x0a */
71 /* REQUEST SENSE DATA EXT 0x0B */
72 /* reserved 0x0C..0x0F */
73 #define WIN_RECAL 0x10 /* obsolete since ATA4 */
74 /* obsolete since ATA3, retired in ATA4 0x11..0x1F */
75 #define WIN_READ 0x20 /* 28-Bit */
76 #define WIN_READ_ONCE 0x21 /* 28-Bit w/o retries, obsolete since ATA5 */
77 /* obsolete since ATA4 0x22..0x23 */
78 #define WIN_READ_EXT 0x24 /* 48-Bit */
79 #define WIN_READDMA_EXT 0x25 /* 48-Bit */
80 #define WIN_READDMA_QUEUED_EXT 0x26 /* 48-Bit, obsolete since ACS2 */
81 #define WIN_READ_NATIVE_MAX_EXT 0x27 /* 48-Bit */
82 /* reserved 0x28 */
83 #define WIN_MULTREAD_EXT 0x29 /* 48-Bit */
84 /* READ STREAM DMA EXT 0x2A */
85 /* READ STREAM EXT 0x2B */
86 /* reserved 0x2C..0x2E */
87 /* READ LOG EXT 0x2F */
88 #define WIN_WRITE 0x30 /* 28-Bit */
89 #define WIN_WRITE_ONCE 0x31 /* 28-Bit w/o retries, obsolete since ATA5 */
90 /* obsolete since ATA4 0x32..0x33 */
91 #define WIN_WRITE_EXT 0x34 /* 48-Bit */
92 #define WIN_WRITEDMA_EXT 0x35 /* 48-Bit */
93 #define WIN_WRITEDMA_QUEUED_EXT 0x36 /* 48-Bit */
94 #define WIN_SET_MAX_EXT 0x37 /* 48-Bit, obsolete since ACS2 */
95 #define WIN_SET_MAX_EXT 0x37 /* 48-Bit */
96 #define CFA_WRITE_SECT_WO_ERASE 0x38 /* CFA Write Sectors without erase */
97 #define WIN_MULTWRITE_EXT 0x39 /* 48-Bit */
98 /* WRITE STREAM DMA EXT 0x3A */
99 /* WRITE STREAM EXT 0x3B */
100 #define WIN_WRITE_VERIFY 0x3C /* 28-Bit, obsolete since ATA4 */
101 /* WRITE DMA FUA EXT 0x3D */
102 /* obsolete since ACS2 0x3E */
103 /* WRITE LOG EXT 0x3F */
104 #define WIN_VERIFY 0x40 /* 28-Bit - Read Verify Sectors */
105 #define WIN_VERIFY_ONCE 0x41 /* 28-Bit - w/o retries, obsolete since ATA5 */
106 #define WIN_VERIFY_EXT 0x42 /* 48-Bit */
107 /* reserved 0x43..0x44 */
108 /* WRITE UNCORRECTABLE EXT 0x45 */
109 /* reserved 0x46 */
110 /* READ LOG DMA EXT 0x47 */
111 /* reserved 0x48..0x4F */
112 /* obsolete since ATA4 0x50 */
113 /* CONFIGURE STREAM 0x51 */
114 /* reserved 0x52..0x56 */
115 /* WRITE LOG DMA EXT 0x57 */
116 /* reserved 0x58..0x5A */
117 /* TRUSTED NON DATA 0x5B */
118 /* TRUSTED RECEIVE 0x5C */
119 /* TRUSTED RECEIVE DMA 0x5D */
120 /* TRUSTED SEND 0x5E */
121 /* TRUSTED SEND DMA 0x5F */
122 /* READ FPDMA QUEUED 0x60 */
123 /* WRITE FPDMA QUEUED 0x61 */
124 /* reserved 0x62->0x6F */
125 #define WIN_SEEK 0x70 /* obsolete since ATA7 */
126 /* reserved 0x71-0x7F */
127 /* vendor specific 0x80-0x86 */
128 #define CFA_TRANSLATE_SECTOR 0x87 /* CFA Translate Sector */
129 /* vendor specific 0x88-0x8F */
130 #define WIN_DIAGNOSE 0x90
131 #define WIN_SPECIFY 0x91 /* set drive geometry translation, obsolete since ATA6 */
132 #define WIN_DOWNLOAD_MICROCODE 0x92
133 /* DOWNLOAD MICROCODE DMA 0x93 */
134 #define WIN_STANDBYNOW2 0x94 /* retired in ATA4 */
135 #define WIN_IDLEIMMEDIATE2 0x95 /* force drive to become "ready", retired in ATA4 */
136 #define WIN_STANDBY2 0x96 /* retired in ATA4 */
137 #define WIN_SETIDLE2 0x97 /* retired in ATA4 */
138 #define WIN_CHECKPOWERMODE2 0x98 /* retired in ATA4 */
139 #define WIN_SLEEPNOW2 0x99 /* retired in ATA4 */
140 /* vendor specific 0x9A */
141 /* reserved 0x9B..0x9F */
142 #define WIN_PACKETCMD 0xA0 /* Send a packet command. */
143 #define WIN_PIDENTIFY 0xA1 /* identify ATAPI device */
144 #define WIN_QUEUED_SERVICE 0xA2 /* obsolete since ACS2 */
145 /* reserved 0xA3..0xAF */
146 #define WIN_SMART 0xB0 /* self-monitoring and reporting */
147 /* Device Configuration Overlay 0xB1 */
148 /* reserved 0xB2..0xB3 */
149 /* Sanitize Device 0xB4 */
150 /* reserved 0xB5 */
151 /* NV Cache 0xB6 */
152 /* reserved for CFA 0xB7..0xBB */
153 #define CFA_ACCESS_METADATA_STORAGE 0xB8
154 /* reserved 0xBC..0xBF */
155 #define CFA_ERASE_SECTORS 0xC0 /* microdrives implement as NOP */
156 /* vendor specific 0xC1..0xC3 */
157 #define WIN_MULTREAD 0xC4 /* read sectors using multiple mode*/
158 #define WIN_MULTWRITE 0xC5 /* write sectors using multiple mode */
159 #define WIN_SETMULT 0xC6 /* enable/disable multiple mode */
160 #define WIN_READDMA_QUEUED 0xC7 /* read sectors using Queued DMA transfers, obsolete since ACS2 */
161 #define WIN_READDMA 0xC8 /* read sectors using DMA transfers */
162 #define WIN_READDMA_ONCE 0xC9 /* 28-Bit - w/o retries, obsolete since ATA5 */
163 #define WIN_WRITEDMA 0xCA /* write sectors using DMA transfers */
164 #define WIN_WRITEDMA_ONCE 0xCB /* 28-Bit - w/o retries, obsolete since ATA5 */
165 #define WIN_WRITEDMA_QUEUED 0xCC /* write sectors using Queued DMA transfers, obsolete since ACS2 */
166 #define CFA_WRITE_MULTI_WO_ERASE 0xCD /* CFA Write multiple without erase */
167 /* WRITE MULTIPLE FUA EXT 0xCE */
168 /* reserved 0xCF..0xDO */
169 /* CHECK MEDIA CARD TYPE 0xD1 */
170 /* reserved for media card pass through 0xD2..0xD4 */
171 /* reserved 0xD5..0xD9 */
172 #define WIN_GETMEDIASTATUS 0xDA /* obsolete since ATA8 */
173 /* obsolete since ATA3, retired in ATA4 0xDB..0xDD */
174 #define WIN_DOORLOCK 0xDE /* lock door on removable drives, obsolete since ATA8 */
175 #define WIN_DOORUNLOCK 0xDF /* unlock door on removable drives, obsolete since ATA8 */
176 #define WIN_STANDBYNOW1 0xE0
177 #define WIN_IDLEIMMEDIATE 0xE1 /* force drive to become "ready" */
178 #define WIN_STANDBY 0xE2 /* Set device in Standby Mode */
179 #define WIN_SETIDLE1 0xE3
180 #define WIN_READ_BUFFER 0xE4 /* force read only 1 sector */
181 #define WIN_CHECKPOWERMODE1 0xE5
182 #define WIN_SLEEPNOW1 0xE6
183 #define WIN_FLUSH_CACHE 0xE7
184 #define WIN_WRITE_BUFFER 0xE8 /* force write only 1 sector */
185 /* READ BUFFER DMA 0xE9 */
186 #define WIN_FLUSH_CACHE_EXT 0xEA /* 48-Bit */
187 /* WRITE BUFFER DMA 0xEB */
188 #define WIN_IDENTIFY 0xEC /* ask drive to identify itself */
189 #define WIN_MEDIAEJECT 0xED /* obsolete since ATA8 */
190 /* obsolete since ATA4 0xEE */
191 #define WIN_SETFEATURES 0xEF /* set special drive features */
192 #define IBM_SENSE_CONDITION 0xF0 /* measure disk temperature, vendor specific */
193 #define WIN_SECURITY_SET_PASS 0xF1
194 #define WIN_SECURITY_UNLOCK 0xF2
195 #define WIN_SECURITY_ERASE_PREPARE 0xF3
196 #define WIN_SECURITY_ERASE_UNIT 0xF4
197 #define WIN_SECURITY_FREEZE_LOCK 0xF5
198 #define CFA_WEAR_LEVEL 0xF5 /* microdrives implement as NOP; not specified in T13! */
199 #define WIN_SECURITY_DISABLE 0xF6
200 /* vendor specific 0xF7 */
201 #define WIN_READ_NATIVE_MAX 0xF8 /* return the native maximum address */
202 #define WIN_SET_MAX 0xF9
203 /* vendor specific 0xFA..0xFF */
204
205 /* set to 1 set disable mult support */
206 #define MAX_MULT_SECTORS 16
207
208 #define IDE_DMA_BUF_SECTORS 256
209
210 /* feature values for Data Set Management */
211 #define DSM_TRIM 0x01
212
213 #if (IDE_DMA_BUF_SECTORS < MAX_MULT_SECTORS)
214 #error "IDE_DMA_BUF_SECTORS must be bigger or equal to MAX_MULT_SECTORS"
215 #endif
216
217 /* ATAPI defines */
218
219 #define ATAPI_PACKET_SIZE 12
220
221 /* The generic packet command opcodes for CD/DVD Logical Units,
222 * From Table 57 of the SFF8090 Ver. 3 (Mt. Fuji) draft standard. */
223 #define GPCMD_BLANK 0xa1
224 #define GPCMD_CLOSE_TRACK 0x5b
225 #define GPCMD_FLUSH_CACHE 0x35
226 #define GPCMD_FORMAT_UNIT 0x04
227 #define GPCMD_GET_CONFIGURATION 0x46
228 #define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a
229 #define GPCMD_GET_PERFORMANCE 0xac
230 #define GPCMD_INQUIRY 0x12
231 #define GPCMD_LOAD_UNLOAD 0xa6
232 #define GPCMD_MECHANISM_STATUS 0xbd
233 #define GPCMD_MODE_SELECT_10 0x55
234 #define GPCMD_MODE_SENSE_10 0x5a
235 #define GPCMD_PAUSE_RESUME 0x4b
236 #define GPCMD_PLAY_AUDIO_10 0x45
237 #define GPCMD_PLAY_AUDIO_MSF 0x47
238 #define GPCMD_PLAY_AUDIO_TI 0x48
239 #define GPCMD_PLAY_CD 0xbc
240 #define GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1e
241 #define GPCMD_READ_10 0x28
242 #define GPCMD_READ_12 0xa8
243 #define GPCMD_READ_CDVD_CAPACITY 0x25
244 #define GPCMD_READ_CD 0xbe
245 #define GPCMD_READ_CD_MSF 0xb9
246 #define GPCMD_READ_DISC_INFO 0x51
247 #define GPCMD_READ_DVD_STRUCTURE 0xad
248 #define GPCMD_READ_FORMAT_CAPACITIES 0x23
249 #define GPCMD_READ_HEADER 0x44
250 #define GPCMD_READ_TRACK_RZONE_INFO 0x52
251 #define GPCMD_READ_SUBCHANNEL 0x42
252 #define GPCMD_READ_TOC_PMA_ATIP 0x43
253 #define GPCMD_REPAIR_RZONE_TRACK 0x58
254 #define GPCMD_REPORT_KEY 0xa4
255 #define GPCMD_REQUEST_SENSE 0x03
256 #define GPCMD_RESERVE_RZONE_TRACK 0x53
257 #define GPCMD_SCAN 0xba
258 #define GPCMD_SEEK 0x2b
259 #define GPCMD_SEND_DVD_STRUCTURE 0xad
260 #define GPCMD_SEND_EVENT 0xa2
261 #define GPCMD_SEND_KEY 0xa3
262 #define GPCMD_SEND_OPC 0x54
263 #define GPCMD_SET_READ_AHEAD 0xa7
264 #define GPCMD_SET_STREAMING 0xb6
265 #define GPCMD_START_STOP_UNIT 0x1b
266 #define GPCMD_STOP_PLAY_SCAN 0x4e
267 #define GPCMD_TEST_UNIT_READY 0x00
268 #define GPCMD_VERIFY_10 0x2f
269 #define GPCMD_WRITE_10 0x2a
270 #define GPCMD_WRITE_AND_VERIFY_10 0x2e
271 /* This is listed as optional in ATAPI 2.6, but is (curiously)
272 * missing from Mt. Fuji, Table 57. It _is_ mentioned in Mt. Fuji
273 * Table 377 as an MMC command for SCSi devices though... Most ATAPI
274 * drives support it. */
275 #define GPCMD_SET_SPEED 0xbb
276 /* This seems to be a SCSI specific CD-ROM opcode
277 * to play data at track/index */
278 #define GPCMD_PLAYAUDIO_TI 0x48
279 /*
280 * From MS Media Status Notification Support Specification. For
281 * older drives only.
282 */
283 #define GPCMD_GET_MEDIA_STATUS 0xda
284 #define GPCMD_MODE_SENSE_6 0x1a
285
286 #define ATAPI_INT_REASON_CD 0x01 /* 0 = data transfer */
287 #define ATAPI_INT_REASON_IO 0x02 /* 1 = transfer to the host */
288 #define ATAPI_INT_REASON_REL 0x04
289 #define ATAPI_INT_REASON_TAG 0xf8
290
291 /* same constants as bochs */
292 #define ASC_NO_SEEK_COMPLETE 0x02
293 #define ASC_ILLEGAL_OPCODE 0x20
294 #define ASC_LOGICAL_BLOCK_OOR 0x21
295 #define ASC_INV_FIELD_IN_CMD_PACKET 0x24
296 #define ASC_MEDIUM_MAY_HAVE_CHANGED 0x28
297 #define ASC_INCOMPATIBLE_FORMAT 0x30
298 #define ASC_MEDIUM_NOT_PRESENT 0x3a
299 #define ASC_SAVING_PARAMETERS_NOT_SUPPORTED 0x39
300 #define ASC_DATA_PHASE_ERROR 0x4b
301 #define ASC_MEDIA_REMOVAL_PREVENTED 0x53
302
303 #define CFA_NO_ERROR 0x00
304 #define CFA_MISC_ERROR 0x09
305 #define CFA_INVALID_COMMAND 0x20
306 #define CFA_INVALID_ADDRESS 0x21
307 #define CFA_ADDRESS_OVERFLOW 0x2f
308
309 #define SMART_READ_DATA 0xd0
310 #define SMART_READ_THRESH 0xd1
311 #define SMART_ATTR_AUTOSAVE 0xd2
312 #define SMART_SAVE_ATTR 0xd3
313 #define SMART_EXECUTE_OFFLINE 0xd4
314 #define SMART_READ_LOG 0xd5
315 #define SMART_WRITE_LOG 0xd6
316 #define SMART_ENABLE 0xd8
317 #define SMART_DISABLE 0xd9
318 #define SMART_STATUS 0xda
319
320 typedef enum { IDE_HD, IDE_CD, IDE_CFATA } IDEDriveKind;
321
322 typedef void EndTransferFunc(IDEState *);
323
324 typedef void DMAStartFunc(IDEDMA *, IDEState *, BlockCompletionFunc *);
325 typedef void DMAVoidFunc(IDEDMA *);
326 typedef int DMAIntFunc(IDEDMA *, int);
327 typedef int32_t DMAInt32Func(IDEDMA *, int32_t len);
328 typedef void DMAu32Func(IDEDMA *, uint32_t);
329 typedef void DMAStopFunc(IDEDMA *, bool);
330 typedef void DMARestartFunc(void *, int, RunState);
331
332 struct unreported_events {
333 bool eject_request;
334 bool new_media;
335 };
336
337 enum ide_dma_cmd {
338 IDE_DMA_READ,
339 IDE_DMA_WRITE,
340 IDE_DMA_TRIM,
341 IDE_DMA_ATAPI,
342 };
343
344 #define ide_cmd_is_read(s) \
345 ((s)->dma_cmd == IDE_DMA_READ)
346
347 typedef struct IDEBufferedRequest {
348 QLIST_ENTRY(IDEBufferedRequest) list;
349 struct iovec iov;
350 QEMUIOVector qiov;
351 QEMUIOVector *original_qiov;
352 BlockCompletionFunc *original_cb;
353 void *original_opaque;
354 bool orphaned;
355 } IDEBufferedRequest;
356
357 /* NOTE: IDEState represents in fact one drive */
358 struct IDEState {
359 IDEBus *bus;
360 uint8_t unit;
361 /* ide config */
362 IDEDriveKind drive_kind;
363 int cylinders, heads, sectors, chs_trans;
364 int64_t nb_sectors;
365 int mult_sectors;
366 int identify_set;
367 uint8_t identify_data[512];
368 int drive_serial;
369 char drive_serial_str[21];
370 char drive_model_str[41];
371 uint64_t wwn;
372 /* ide regs */
373 uint8_t feature;
374 uint8_t error;
375 uint32_t nsector;
376 uint8_t sector;
377 uint8_t lcyl;
378 uint8_t hcyl;
379 /* other part of tf for lba48 support */
380 uint8_t hob_feature;
381 uint8_t hob_nsector;
382 uint8_t hob_sector;
383 uint8_t hob_lcyl;
384 uint8_t hob_hcyl;
385
386 uint8_t select;
387 uint8_t status;
388
389 /* set for lba48 access */
390 uint8_t lba48;
391 BlockBackend *blk;
392 char version[9];
393 /* ATAPI specific */
394 struct unreported_events events;
395 uint8_t sense_key;
396 uint8_t asc;
397 bool tray_open;
398 bool tray_locked;
399 uint8_t cdrom_changed;
400 int packet_transfer_size;
401 int elementary_transfer_size;
402 int32_t io_buffer_index;
403 int lba;
404 int cd_sector_size;
405 int atapi_dma; /* true if dma is requested for the packet cmd */
406 BlockAcctCookie acct;
407 BlockAIOCB *pio_aiocb;
408 struct iovec iov;
409 QEMUIOVector qiov;
410 QLIST_HEAD(, IDEBufferedRequest) buffered_requests;
411 /* ATA DMA state */
412 uint64_t io_buffer_offset;
413 int32_t io_buffer_size;
414 QEMUSGList sg;
415 /* PIO transfer handling */
416 int req_nb_sectors; /* number of sectors per interrupt */
417 EndTransferFunc *end_transfer_func;
418 uint8_t *data_ptr;
419 uint8_t *data_end;
420 uint8_t *io_buffer;
421 /* PIO save/restore */
422 int32_t io_buffer_total_len;
423 int32_t cur_io_buffer_offset;
424 int32_t cur_io_buffer_len;
425 uint8_t end_transfer_fn_idx;
426 QEMUTimer *sector_write_timer; /* only used for win2k install hack */
427 uint32_t irq_count; /* counts IRQs when using win2k install hack */
428 /* CF-ATA extended error */
429 uint8_t ext_error;
430 /* CF-ATA metadata storage */
431 uint32_t mdata_size;
432 uint8_t *mdata_storage;
433 int media_changed;
434 enum ide_dma_cmd dma_cmd;
435 /* SMART */
436 uint8_t smart_enabled;
437 uint8_t smart_autosave;
438 int smart_errors;
439 uint8_t smart_selftest_count;
440 uint8_t *smart_selftest_data;
441 /* AHCI */
442 int ncq_queues;
443 };
444
445 struct IDEDMAOps {
446 DMAStartFunc *start_dma;
447 DMAVoidFunc *start_transfer;
448 DMAInt32Func *prepare_buf;
449 DMAu32Func *commit_buf;
450 DMAIntFunc *rw_buf;
451 DMAVoidFunc *restart;
452 DMAVoidFunc *restart_dma;
453 DMAStopFunc *set_inactive;
454 DMAVoidFunc *cmd_done;
455 DMAVoidFunc *reset;
456 };
457
458 struct IDEDMA {
459 const struct IDEDMAOps *ops;
460 struct iovec iov;
461 QEMUIOVector qiov;
462 BlockAIOCB *aiocb;
463 };
464
465 struct IDEBus {
466 BusState qbus;
467 IDEDevice *master;
468 IDEDevice *slave;
469 IDEState ifs[2];
470 QEMUBH *bh;
471
472 int bus_id;
473 int max_units;
474 IDEDMA *dma;
475 uint8_t unit;
476 uint8_t cmd;
477 qemu_irq irq;
478
479 int error_status;
480 uint8_t retry_unit;
481 int64_t retry_sector_num;
482 uint32_t retry_nsector;
483 };
484
485 #define TYPE_IDE_DEVICE "ide-device"
486 #define IDE_DEVICE(obj) \
487 OBJECT_CHECK(IDEDevice, (obj), TYPE_IDE_DEVICE)
488 #define IDE_DEVICE_CLASS(klass) \
489 OBJECT_CLASS_CHECK(IDEDeviceClass, (klass), TYPE_IDE_DEVICE)
490 #define IDE_DEVICE_GET_CLASS(obj) \
491 OBJECT_GET_CLASS(IDEDeviceClass, (obj), TYPE_IDE_DEVICE)
492
493 typedef struct IDEDeviceClass {
494 DeviceClass parent_class;
495 int (*init)(IDEDevice *dev);
496 } IDEDeviceClass;
497
498 struct IDEDevice {
499 DeviceState qdev;
500 uint32_t unit;
501 BlockConf conf;
502 int chs_trans;
503 char *version;
504 char *serial;
505 char *model;
506 uint64_t wwn;
507 };
508
509 /* These are used for the error_status field of IDEBus */
510 #define IDE_RETRY_MASK 0xf8
511 #define IDE_RETRY_DMA 0x08
512 #define IDE_RETRY_PIO 0x10
513 #define IDE_RETRY_ATAPI 0x20 /* reused IDE_RETRY_READ bit */
514 #define IDE_RETRY_READ 0x20
515 #define IDE_RETRY_FLUSH 0x40
516 #define IDE_RETRY_TRIM 0x80
517 #define IDE_RETRY_HBA 0x100
518
519 #define IS_IDE_RETRY_DMA(_status) \
520 ((_status) & IDE_RETRY_DMA)
521
522 #define IS_IDE_RETRY_PIO(_status) \
523 ((_status) & IDE_RETRY_PIO)
524
525 /*
526 * The method of the IDE_RETRY_ATAPI determination is to use a previously
527 * impossible bit combination as a new status value.
528 */
529 #define IS_IDE_RETRY_ATAPI(_status) \
530 (((_status) & IDE_RETRY_MASK) == IDE_RETRY_ATAPI)
531
532 static inline uint8_t ide_dma_cmd_to_retry(uint8_t dma_cmd)
533 {
534 switch (dma_cmd) {
535 case IDE_DMA_READ:
536 return IDE_RETRY_DMA | IDE_RETRY_READ;
537 case IDE_DMA_WRITE:
538 return IDE_RETRY_DMA;
539 case IDE_DMA_TRIM:
540 return IDE_RETRY_DMA | IDE_RETRY_TRIM;
541 case IDE_DMA_ATAPI:
542 return IDE_RETRY_ATAPI;
543 default:
544 break;
545 }
546 return 0;
547 }
548
549 static inline IDEState *idebus_active_if(IDEBus *bus)
550 {
551 return bus->ifs + bus->unit;
552 }
553
554 static inline void ide_set_irq(IDEBus *bus)
555 {
556 if (!(bus->cmd & IDE_CMD_DISABLE_IRQ)) {
557 qemu_irq_raise(bus->irq);
558 }
559 }
560
561 /* hw/ide/core.c */
562 extern const VMStateDescription vmstate_ide_bus;
563
564 #define VMSTATE_IDE_BUS(_field, _state) \
565 VMSTATE_STRUCT(_field, _state, 1, vmstate_ide_bus, IDEBus)
566
567 #define VMSTATE_IDE_BUS_ARRAY(_field, _state, _num) \
568 VMSTATE_STRUCT_ARRAY(_field, _state, _num, 1, vmstate_ide_bus, IDEBus)
569
570 extern const VMStateDescription vmstate_ide_drive;
571
572 #define VMSTATE_IDE_DRIVES(_field, _state) \
573 VMSTATE_STRUCT_ARRAY(_field, _state, 2, 3, vmstate_ide_drive, IDEState)
574
575 #define VMSTATE_IDE_DRIVE(_field, _state) \
576 VMSTATE_STRUCT(_field, _state, 1, vmstate_ide_drive, IDEState)
577
578 void ide_bus_reset(IDEBus *bus);
579 int64_t ide_get_sector(IDEState *s);
580 void ide_set_sector(IDEState *s, int64_t sector_num);
581
582 void ide_start_dma(IDEState *s, BlockCompletionFunc *cb);
583 void dma_buf_commit(IDEState *s, uint32_t tx_bytes);
584 void ide_dma_error(IDEState *s);
585 void ide_abort_command(IDEState *s);
586
587 void ide_atapi_cmd_ok(IDEState *s);
588 void ide_atapi_cmd_error(IDEState *s, int sense_key, int asc);
589 void ide_atapi_dma_restart(IDEState *s);
590 void ide_atapi_io_error(IDEState *s, int ret);
591
592 void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val);
593 uint32_t ide_ioport_read(void *opaque, uint32_t addr1);
594 uint32_t ide_status_read(void *opaque, uint32_t addr);
595 void ide_cmd_write(void *opaque, uint32_t addr, uint32_t val);
596 void ide_data_writew(void *opaque, uint32_t addr, uint32_t val);
597 uint32_t ide_data_readw(void *opaque, uint32_t addr);
598 void ide_data_writel(void *opaque, uint32_t addr, uint32_t val);
599 uint32_t ide_data_readl(void *opaque, uint32_t addr);
600
601 int ide_init_drive(IDEState *s, BlockBackend *blk, IDEDriveKind kind,
602 const char *version, const char *serial, const char *model,
603 uint64_t wwn,
604 uint32_t cylinders, uint32_t heads, uint32_t secs,
605 int chs_trans);
606 void ide_init2(IDEBus *bus, qemu_irq irq);
607 void ide_init_ioport(IDEBus *bus, ISADevice *isa, int iobase, int iobase2);
608 void ide_register_restart_cb(IDEBus *bus);
609
610 void ide_exec_cmd(IDEBus *bus, uint32_t val);
611
612 void ide_transfer_start(IDEState *s, uint8_t *buf, int size,
613 EndTransferFunc *end_transfer_func);
614 void ide_transfer_stop(IDEState *s);
615 void ide_set_inactive(IDEState *s, bool more);
616 BlockAIOCB *ide_issue_trim(BlockBackend *blk,
617 int64_t offset, QEMUIOVector *qiov, BdrvRequestFlags flags,
618 BlockCompletionFunc *cb, void *opaque);
619 BlockAIOCB *ide_buffered_readv(IDEState *s, int64_t sector_num,
620 QEMUIOVector *iov, int nb_sectors,
621 BlockCompletionFunc *cb, void *opaque);
622 void ide_cancel_dma_sync(IDEState *s);
623
624 /* hw/ide/atapi.c */
625 void ide_atapi_cmd(IDEState *s);
626 void ide_atapi_cmd_reply_end(IDEState *s);
627
628 /* hw/ide/qdev.c */
629 void ide_bus_new(IDEBus *idebus, size_t idebus_size, DeviceState *dev,
630 int bus_id, int max_units);
631 IDEDevice *ide_create_drive(IDEBus *bus, int unit, DriveInfo *drive);
632
633 int ide_handle_rw_error(IDEState *s, int error, int op);
634
635 #endif /* HW_IDE_INTERNAL_H */