ppx/xics: introduce a parent_reset in ICSStateClass
[qemu.git] / hw / intc / xics_kvm.c
1 /*
2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
3 *
4 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation
5 *
6 * Copyright (c) 2013 David Gibson, IBM Corporation.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 *
26 */
27
28 #include "qemu/osdep.h"
29 #include "qapi/error.h"
30 #include "qemu-common.h"
31 #include "cpu.h"
32 #include "hw/hw.h"
33 #include "trace.h"
34 #include "sysemu/kvm.h"
35 #include "hw/ppc/spapr.h"
36 #include "hw/ppc/xics.h"
37 #include "kvm_ppc.h"
38 #include "qemu/config-file.h"
39 #include "qemu/error-report.h"
40
41 #include <sys/ioctl.h>
42
43 static int kernel_xics_fd = -1;
44
45 typedef struct KVMEnabledICP {
46 unsigned long vcpu_id;
47 QLIST_ENTRY(KVMEnabledICP) node;
48 } KVMEnabledICP;
49
50 static QLIST_HEAD(, KVMEnabledICP)
51 kvm_enabled_icps = QLIST_HEAD_INITIALIZER(&kvm_enabled_icps);
52
53 /*
54 * ICP-KVM
55 */
56 static void icp_get_kvm_state(ICPState *icp)
57 {
58 uint64_t state;
59 int ret;
60
61 /* ICP for this CPU thread is not in use, exiting */
62 if (!icp->cs) {
63 return;
64 }
65
66 ret = kvm_get_one_reg(icp->cs, KVM_REG_PPC_ICP_STATE, &state);
67 if (ret != 0) {
68 error_report("Unable to retrieve KVM interrupt controller state"
69 " for CPU %ld: %s", kvm_arch_vcpu_id(icp->cs), strerror(errno));
70 exit(1);
71 }
72
73 icp->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT;
74 icp->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT)
75 & KVM_REG_PPC_ICP_MFRR_MASK;
76 icp->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT)
77 & KVM_REG_PPC_ICP_PPRI_MASK;
78 }
79
80 static void do_icp_synchronize_state(CPUState *cpu, run_on_cpu_data arg)
81 {
82 icp_get_kvm_state(arg.host_ptr);
83 }
84
85 static void icp_synchronize_state(ICPState *icp)
86 {
87 if (icp->cs) {
88 run_on_cpu(icp->cs, do_icp_synchronize_state, RUN_ON_CPU_HOST_PTR(icp));
89 }
90 }
91
92 static int icp_set_kvm_state(ICPState *icp, int version_id)
93 {
94 uint64_t state;
95 int ret;
96
97 /* ICP for this CPU thread is not in use, exiting */
98 if (!icp->cs) {
99 return 0;
100 }
101
102 state = ((uint64_t)icp->xirr << KVM_REG_PPC_ICP_XISR_SHIFT)
103 | ((uint64_t)icp->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT)
104 | ((uint64_t)icp->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT);
105
106 ret = kvm_set_one_reg(icp->cs, KVM_REG_PPC_ICP_STATE, &state);
107 if (ret != 0) {
108 error_report("Unable to restore KVM interrupt controller state (0x%"
109 PRIx64 ") for CPU %ld: %s", state, kvm_arch_vcpu_id(icp->cs),
110 strerror(errno));
111 return ret;
112 }
113
114 return 0;
115 }
116
117 static void icp_kvm_reset(DeviceState *dev)
118 {
119 ICPStateClass *icpc = ICP_GET_CLASS(dev);
120
121 icpc->parent_reset(dev);
122
123 icp_set_kvm_state(ICP(dev), 1);
124 }
125
126 static void icp_kvm_realize(DeviceState *dev, Error **errp)
127 {
128 ICPState *icp = ICP(dev);
129 ICPStateClass *icpc = ICP_GET_CLASS(icp);
130 Error *local_err = NULL;
131 CPUState *cs;
132 KVMEnabledICP *enabled_icp;
133 unsigned long vcpu_id;
134 int ret;
135
136 if (kernel_xics_fd == -1) {
137 abort();
138 }
139
140 icpc->parent_realize(dev, &local_err);
141 if (local_err) {
142 error_propagate(errp, local_err);
143 return;
144 }
145
146 cs = icp->cs;
147 vcpu_id = kvm_arch_vcpu_id(cs);
148
149 /*
150 * If we are reusing a parked vCPU fd corresponding to the CPU
151 * which was hot-removed earlier we don't have to renable
152 * KVM_CAP_IRQ_XICS capability again.
153 */
154 QLIST_FOREACH(enabled_icp, &kvm_enabled_icps, node) {
155 if (enabled_icp->vcpu_id == vcpu_id) {
156 return;
157 }
158 }
159
160 ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0, kernel_xics_fd, vcpu_id);
161 if (ret < 0) {
162 error_setg(errp, "Unable to connect CPU%ld to kernel XICS: %s", vcpu_id,
163 strerror(errno));
164 return;
165 }
166 enabled_icp = g_malloc(sizeof(*enabled_icp));
167 enabled_icp->vcpu_id = vcpu_id;
168 QLIST_INSERT_HEAD(&kvm_enabled_icps, enabled_icp, node);
169 }
170
171 static void icp_kvm_class_init(ObjectClass *klass, void *data)
172 {
173 DeviceClass *dc = DEVICE_CLASS(klass);
174 ICPStateClass *icpc = ICP_CLASS(klass);
175
176 device_class_set_parent_realize(dc, icp_kvm_realize,
177 &icpc->parent_realize);
178 device_class_set_parent_reset(dc, icp_kvm_reset,
179 &icpc->parent_reset);
180
181 icpc->pre_save = icp_get_kvm_state;
182 icpc->post_load = icp_set_kvm_state;
183 icpc->synchronize_state = icp_synchronize_state;
184 }
185
186 static const TypeInfo icp_kvm_info = {
187 .name = TYPE_KVM_ICP,
188 .parent = TYPE_ICP,
189 .instance_size = sizeof(ICPState),
190 .class_init = icp_kvm_class_init,
191 .class_size = sizeof(ICPStateClass),
192 };
193
194 /*
195 * ICS-KVM
196 */
197 static void ics_get_kvm_state(ICSState *ics)
198 {
199 uint64_t state;
200 int i;
201 Error *local_err = NULL;
202
203 for (i = 0; i < ics->nr_irqs; i++) {
204 ICSIRQState *irq = &ics->irqs[i];
205
206 kvm_device_access(kernel_xics_fd, KVM_DEV_XICS_GRP_SOURCES,
207 i + ics->offset, &state, false, &local_err);
208 if (local_err) {
209 error_report_err(local_err);
210 exit(1);
211 }
212
213 irq->server = state & KVM_XICS_DESTINATION_MASK;
214 irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT)
215 & KVM_XICS_PRIORITY_MASK;
216 /*
217 * To be consistent with the software emulation in xics.c, we
218 * split out the masked state + priority that we get from the
219 * kernel into 'current priority' (0xff if masked) and
220 * 'saved priority' (if masked, this is the priority the
221 * interrupt had before it was masked). Masking and unmasking
222 * are done with the ibm,int-off and ibm,int-on RTAS calls.
223 */
224 if (state & KVM_XICS_MASKED) {
225 irq->priority = 0xff;
226 } else {
227 irq->priority = irq->saved_priority;
228 }
229
230 irq->status = 0;
231 if (state & KVM_XICS_PENDING) {
232 if (state & KVM_XICS_LEVEL_SENSITIVE) {
233 irq->status |= XICS_STATUS_ASSERTED;
234 } else {
235 /*
236 * A pending edge-triggered interrupt (or MSI)
237 * must have been rejected previously when we
238 * first detected it and tried to deliver it,
239 * so mark it as pending and previously rejected
240 * for consistency with how xics.c works.
241 */
242 irq->status |= XICS_STATUS_MASKED_PENDING
243 | XICS_STATUS_REJECTED;
244 }
245 }
246 if (state & KVM_XICS_PRESENTED) {
247 irq->status |= XICS_STATUS_PRESENTED;
248 }
249 if (state & KVM_XICS_QUEUED) {
250 irq->status |= XICS_STATUS_QUEUED;
251 }
252 }
253 }
254
255 static void ics_synchronize_state(ICSState *ics)
256 {
257 ics_get_kvm_state(ics);
258 }
259
260 static int ics_set_kvm_state(ICSState *ics, int version_id)
261 {
262 uint64_t state;
263 int i;
264 Error *local_err = NULL;
265
266 for (i = 0; i < ics->nr_irqs; i++) {
267 ICSIRQState *irq = &ics->irqs[i];
268 int ret;
269
270 state = irq->server;
271 state |= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK)
272 << KVM_XICS_PRIORITY_SHIFT;
273 if (irq->priority != irq->saved_priority) {
274 assert(irq->priority == 0xff);
275 state |= KVM_XICS_MASKED;
276 }
277
278 if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) {
279 state |= KVM_XICS_LEVEL_SENSITIVE;
280 if (irq->status & XICS_STATUS_ASSERTED) {
281 state |= KVM_XICS_PENDING;
282 }
283 } else {
284 if (irq->status & XICS_STATUS_MASKED_PENDING) {
285 state |= KVM_XICS_PENDING;
286 }
287 }
288 if (irq->status & XICS_STATUS_PRESENTED) {
289 state |= KVM_XICS_PRESENTED;
290 }
291 if (irq->status & XICS_STATUS_QUEUED) {
292 state |= KVM_XICS_QUEUED;
293 }
294
295 ret = kvm_device_access(kernel_xics_fd, KVM_DEV_XICS_GRP_SOURCES,
296 i + ics->offset, &state, true, &local_err);
297 if (local_err) {
298 error_report_err(local_err);
299 return ret;
300 }
301 }
302
303 return 0;
304 }
305
306 static void ics_kvm_set_irq(void *opaque, int srcno, int val)
307 {
308 ICSState *ics = opaque;
309 struct kvm_irq_level args;
310 int rc;
311
312 args.irq = srcno + ics->offset;
313 if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MSI) {
314 if (!val) {
315 return;
316 }
317 args.level = KVM_INTERRUPT_SET;
318 } else {
319 args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
320 }
321 rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args);
322 if (rc < 0) {
323 perror("kvm_irq_line");
324 }
325 }
326
327 static void ics_kvm_reset(DeviceState *dev)
328 {
329 ICSStateClass *icsc = ICS_BASE_GET_CLASS(dev);
330
331 icsc->parent_reset(dev);
332
333 ics_set_kvm_state(ICS_KVM(dev), 1);
334 }
335
336 static void ics_kvm_reset_handler(void *dev)
337 {
338 ics_kvm_reset(dev);
339 }
340
341 static void ics_kvm_realize(DeviceState *dev, Error **errp)
342 {
343 ICSState *ics = ICS_KVM(dev);
344 ICSStateClass *icsc = ICS_BASE_GET_CLASS(ics);
345 Error *local_err = NULL;
346
347 icsc->parent_realize(dev, &local_err);
348 if (local_err) {
349 error_propagate(errp, local_err);
350 return;
351 }
352 ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);
353
354 qemu_register_reset(ics_kvm_reset_handler, ics);
355 }
356
357 static void ics_kvm_class_init(ObjectClass *klass, void *data)
358 {
359 ICSStateClass *icsc = ICS_BASE_CLASS(klass);
360 DeviceClass *dc = DEVICE_CLASS(klass);
361
362 /*
363 * Use device_class_set_parent_realize() when ics-kvm inherits
364 * directly from ics-base and not from ics-simple anymore.
365 */
366 dc->realize = ics_kvm_realize;
367 dc->reset = ics_kvm_reset;
368
369 icsc->pre_save = ics_get_kvm_state;
370 icsc->post_load = ics_set_kvm_state;
371 icsc->synchronize_state = ics_synchronize_state;
372 }
373
374 static const TypeInfo ics_kvm_info = {
375 .name = TYPE_ICS_KVM,
376 .parent = TYPE_ICS_SIMPLE,
377 .instance_size = sizeof(ICSState),
378 .class_init = ics_kvm_class_init,
379 };
380
381 /*
382 * XICS-KVM
383 */
384
385 static void rtas_dummy(PowerPCCPU *cpu, sPAPRMachineState *spapr,
386 uint32_t token,
387 uint32_t nargs, target_ulong args,
388 uint32_t nret, target_ulong rets)
389 {
390 error_report("pseries: %s must never be called for in-kernel XICS",
391 __func__);
392 }
393
394 int xics_kvm_init(sPAPRMachineState *spapr, Error **errp)
395 {
396 int rc;
397
398 if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) {
399 error_setg(errp,
400 "KVM and IRQ_XICS capability must be present for in-kernel XICS");
401 goto fail;
402 }
403
404 spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_dummy);
405 spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_dummy);
406 spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_dummy);
407 spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_dummy);
408
409 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_SET_XIVE, "ibm,set-xive");
410 if (rc < 0) {
411 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive");
412 goto fail;
413 }
414
415 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_GET_XIVE, "ibm,get-xive");
416 if (rc < 0) {
417 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive");
418 goto fail;
419 }
420
421 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_ON, "ibm,int-on");
422 if (rc < 0) {
423 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on");
424 goto fail;
425 }
426
427 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_OFF, "ibm,int-off");
428 if (rc < 0) {
429 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off");
430 goto fail;
431 }
432
433 /* Create the KVM XICS device */
434 rc = kvm_create_device(kvm_state, KVM_DEV_TYPE_XICS, false);
435 if (rc < 0) {
436 error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS");
437 goto fail;
438 }
439
440 kernel_xics_fd = rc;
441 kvm_kernel_irqchip = true;
442 kvm_msi_via_irqfd_allowed = true;
443 kvm_gsi_direct_mapping = true;
444
445 return 0;
446
447 fail:
448 kvmppc_define_rtas_kernel_token(0, "ibm,set-xive");
449 kvmppc_define_rtas_kernel_token(0, "ibm,get-xive");
450 kvmppc_define_rtas_kernel_token(0, "ibm,int-on");
451 kvmppc_define_rtas_kernel_token(0, "ibm,int-off");
452 return -1;
453 }
454
455 static void xics_kvm_register_types(void)
456 {
457 type_register_static(&ics_kvm_info);
458 type_register_static(&icp_kvm_info);
459 }
460
461 type_init(xics_kvm_register_types)