PPC: e500: msync is 440 only, e500 has real sync
[qemu.git] / hw / irq.c
1 /*
2 * QEMU IRQ/GPIO common code.
3 *
4 * Copyright (c) 2007 CodeSourcery.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 #include "qemu-common.h"
25 #include "irq.h"
26
27 struct IRQState {
28 qemu_irq_handler handler;
29 void *opaque;
30 int n;
31 };
32
33 void qemu_set_irq(qemu_irq irq, int level)
34 {
35 if (!irq)
36 return;
37
38 irq->handler(irq->opaque, irq->n, level);
39 }
40
41 qemu_irq *qemu_allocate_irqs(qemu_irq_handler handler, void *opaque, int n)
42 {
43 qemu_irq *s;
44 struct IRQState *p;
45 int i;
46
47 s = (qemu_irq *)g_malloc0(sizeof(qemu_irq) * n);
48 p = (struct IRQState *)g_malloc0(sizeof(struct IRQState) * n);
49 for (i = 0; i < n; i++) {
50 p->handler = handler;
51 p->opaque = opaque;
52 p->n = i;
53 s[i] = p;
54 p++;
55 }
56 return s;
57 }
58
59 void qemu_free_irqs(qemu_irq *s)
60 {
61 g_free(s[0]);
62 g_free(s);
63 }
64
65 static void qemu_notirq(void *opaque, int line, int level)
66 {
67 struct IRQState *irq = opaque;
68
69 irq->handler(irq->opaque, irq->n, !level);
70 }
71
72 qemu_irq qemu_irq_invert(qemu_irq irq)
73 {
74 /* The default state for IRQs is low, so raise the output now. */
75 qemu_irq_raise(irq);
76 return qemu_allocate_irqs(qemu_notirq, irq, 1)[0];
77 }
78
79 static void qemu_splitirq(void *opaque, int line, int level)
80 {
81 struct IRQState **irq = opaque;
82 irq[0]->handler(irq[0]->opaque, irq[0]->n, level);
83 irq[1]->handler(irq[1]->opaque, irq[1]->n, level);
84 }
85
86 qemu_irq qemu_irq_split(qemu_irq irq1, qemu_irq irq2)
87 {
88 qemu_irq *s = g_malloc0(2 * sizeof(qemu_irq));
89 s[0] = irq1;
90 s[1] = irq2;
91 return qemu_allocate_irqs(qemu_splitirq, s, 1)[0];
92 }
93
94 static void proxy_irq_handler(void *opaque, int n, int level)
95 {
96 qemu_irq **target = opaque;
97
98 if (*target) {
99 qemu_set_irq((*target)[n], level);
100 }
101 }
102
103 qemu_irq *qemu_irq_proxy(qemu_irq **target, int n)
104 {
105 return qemu_allocate_irqs(proxy_irq_handler, target, n);
106 }