Add access control support to qemu bridge helper
[qemu.git] / hw / milkymist-hw.h
1 #ifndef QEMU_HW_MILKYMIST_H
2 #define QEMU_HW_MILKYMIST_H
3
4 #include "qdev.h"
5 #include "qdev-addr.h"
6
7 static inline DeviceState *milkymist_uart_create(target_phys_addr_t base,
8 qemu_irq irq)
9 {
10 DeviceState *dev;
11
12 dev = qdev_create(NULL, "milkymist-uart");
13 qdev_init_nofail(dev);
14 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
15 sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
16
17 return dev;
18 }
19
20 static inline DeviceState *milkymist_hpdmc_create(target_phys_addr_t base)
21 {
22 DeviceState *dev;
23
24 dev = qdev_create(NULL, "milkymist-hpdmc");
25 qdev_init_nofail(dev);
26 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
27
28 return dev;
29 }
30
31 static inline DeviceState *milkymist_memcard_create(target_phys_addr_t base)
32 {
33 DeviceState *dev;
34
35 dev = qdev_create(NULL, "milkymist-memcard");
36 qdev_init_nofail(dev);
37 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
38
39 return dev;
40 }
41
42 static inline DeviceState *milkymist_vgafb_create(target_phys_addr_t base,
43 uint32_t fb_offset, uint32_t fb_mask)
44 {
45 DeviceState *dev;
46
47 dev = qdev_create(NULL, "milkymist-vgafb");
48 qdev_prop_set_uint32(dev, "fb_offset", fb_offset);
49 qdev_prop_set_uint32(dev, "fb_mask", fb_mask);
50 qdev_init_nofail(dev);
51 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
52
53 return dev;
54 }
55
56 static inline DeviceState *milkymist_sysctl_create(target_phys_addr_t base,
57 qemu_irq gpio_irq, qemu_irq timer0_irq, qemu_irq timer1_irq,
58 uint32_t freq_hz, uint32_t system_id, uint32_t capabilities,
59 uint32_t gpio_strappings)
60 {
61 DeviceState *dev;
62
63 dev = qdev_create(NULL, "milkymist-sysctl");
64 qdev_prop_set_uint32(dev, "frequency", freq_hz);
65 qdev_prop_set_uint32(dev, "systemid", system_id);
66 qdev_prop_set_uint32(dev, "capabilities", capabilities);
67 qdev_prop_set_uint32(dev, "gpio_strappings", gpio_strappings);
68 qdev_init_nofail(dev);
69 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
70 sysbus_connect_irq(sysbus_from_qdev(dev), 0, gpio_irq);
71 sysbus_connect_irq(sysbus_from_qdev(dev), 1, timer0_irq);
72 sysbus_connect_irq(sysbus_from_qdev(dev), 2, timer1_irq);
73
74 return dev;
75 }
76
77 static inline DeviceState *milkymist_pfpu_create(target_phys_addr_t base,
78 qemu_irq irq)
79 {
80 DeviceState *dev;
81
82 dev = qdev_create(NULL, "milkymist-pfpu");
83 qdev_init_nofail(dev);
84 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
85 sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
86 return dev;
87 }
88
89 #ifdef CONFIG_OPENGL
90 #include <X11/Xlib.h>
91 #include <GL/glx.h>
92 static const int glx_fbconfig_attr[] = {
93 GLX_GREEN_SIZE, 5,
94 GLX_GREEN_SIZE, 6,
95 GLX_BLUE_SIZE, 5,
96 None
97 };
98 #endif
99
100 static inline DeviceState *milkymist_tmu2_create(target_phys_addr_t base,
101 qemu_irq irq)
102 {
103 #ifdef CONFIG_OPENGL
104 DeviceState *dev;
105 Display *d;
106 GLXFBConfig *configs;
107 int nelements;
108 int ver_major, ver_minor;
109
110 if (display_type == DT_NOGRAPHIC) {
111 return NULL;
112 }
113
114 /* check that GLX will work */
115 d = XOpenDisplay(NULL);
116 if (d == NULL) {
117 return NULL;
118 }
119
120 if (!glXQueryVersion(d, &ver_major, &ver_minor)) {
121 /* Yeah, sometimes getting the GLX version can fail.
122 * Isn't X beautiful? */
123 XCloseDisplay(d);
124 return NULL;
125 }
126
127 if ((ver_major < 1) || ((ver_major == 1) && (ver_minor < 3))) {
128 printf("Your GLX version is %d.%d,"
129 "but TMU emulation needs at least 1.3. TMU disabled.\n",
130 ver_major, ver_minor);
131 XCloseDisplay(d);
132 return NULL;
133 }
134
135 configs = glXChooseFBConfig(d, 0, glx_fbconfig_attr, &nelements);
136 if (configs == NULL) {
137 XCloseDisplay(d);
138 return NULL;
139 }
140
141 XFree(configs);
142 XCloseDisplay(d);
143
144 dev = qdev_create(NULL, "milkymist-tmu2");
145 qdev_init_nofail(dev);
146 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
147 sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
148
149 return dev;
150 #else
151 return NULL;
152 #endif
153 }
154
155 static inline DeviceState *milkymist_ac97_create(target_phys_addr_t base,
156 qemu_irq crrequest_irq, qemu_irq crreply_irq, qemu_irq dmar_irq,
157 qemu_irq dmaw_irq)
158 {
159 DeviceState *dev;
160
161 dev = qdev_create(NULL, "milkymist-ac97");
162 qdev_init_nofail(dev);
163 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
164 sysbus_connect_irq(sysbus_from_qdev(dev), 0, crrequest_irq);
165 sysbus_connect_irq(sysbus_from_qdev(dev), 1, crreply_irq);
166 sysbus_connect_irq(sysbus_from_qdev(dev), 2, dmar_irq);
167 sysbus_connect_irq(sysbus_from_qdev(dev), 3, dmaw_irq);
168
169 return dev;
170 }
171
172 static inline DeviceState *milkymist_minimac_create(target_phys_addr_t base,
173 qemu_irq rx_irq, qemu_irq tx_irq)
174 {
175 DeviceState *dev;
176
177 qemu_check_nic_model(&nd_table[0], "minimac");
178 dev = qdev_create(NULL, "milkymist-minimac");
179 qdev_set_nic_properties(dev, &nd_table[0]);
180 qdev_init_nofail(dev);
181 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
182 sysbus_connect_irq(sysbus_from_qdev(dev), 0, rx_irq);
183 sysbus_connect_irq(sysbus_from_qdev(dev), 1, tx_irq);
184
185 return dev;
186 }
187
188 static inline DeviceState *milkymist_minimac2_create(target_phys_addr_t base,
189 target_phys_addr_t buffers_base, qemu_irq rx_irq, qemu_irq tx_irq)
190 {
191 DeviceState *dev;
192
193 qemu_check_nic_model(&nd_table[0], "minimac2");
194 dev = qdev_create(NULL, "milkymist-minimac2");
195 qdev_prop_set_taddr(dev, "buffers_base", buffers_base);
196 qdev_set_nic_properties(dev, &nd_table[0]);
197 qdev_init_nofail(dev);
198 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
199 sysbus_connect_irq(sysbus_from_qdev(dev), 0, rx_irq);
200 sysbus_connect_irq(sysbus_from_qdev(dev), 1, tx_irq);
201
202 return dev;
203 }
204
205 static inline DeviceState *milkymist_softusb_create(target_phys_addr_t base,
206 qemu_irq irq, uint32_t pmem_base, uint32_t pmem_size,
207 uint32_t dmem_base, uint32_t dmem_size)
208 {
209 DeviceState *dev;
210
211 dev = qdev_create(NULL, "milkymist-softusb");
212 qdev_prop_set_uint32(dev, "pmem_base", pmem_base);
213 qdev_prop_set_uint32(dev, "pmem_size", pmem_size);
214 qdev_prop_set_uint32(dev, "dmem_base", dmem_base);
215 qdev_prop_set_uint32(dev, "dmem_size", dmem_size);
216 qdev_init_nofail(dev);
217 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
218 sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
219
220 return dev;
221 }
222
223 #endif /* QEMU_HW_MILKYMIST_H */