pcie_aer: support configurable AER capa version
[qemu.git] / hw / mips / mips_r4k.c
1 /*
2 * QEMU/MIPS pseudo-board
3 *
4 * emulates a simple machine with ISA-like bus.
5 * ISA IO space mapped to the 0x14000000 (PHYS) and
6 * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
7 * All peripherial devices are attached to this "bus" with
8 * the standard PC ISA addresses.
9 */
10 #include "qemu/osdep.h"
11 #include "qapi/error.h"
12 #include "qemu-common.h"
13 #include "cpu.h"
14 #include "hw/hw.h"
15 #include "hw/mips/mips.h"
16 #include "hw/mips/cpudevs.h"
17 #include "hw/i386/pc.h"
18 #include "hw/char/serial.h"
19 #include "hw/isa/isa.h"
20 #include "net/net.h"
21 #include "sysemu/sysemu.h"
22 #include "hw/boards.h"
23 #include "hw/block/flash.h"
24 #include "qemu/log.h"
25 #include "hw/mips/bios.h"
26 #include "hw/ide.h"
27 #include "hw/loader.h"
28 #include "elf.h"
29 #include "hw/timer/mc146818rtc.h"
30 #include "hw/timer/i8254.h"
31 #include "sysemu/block-backend.h"
32 #include "exec/address-spaces.h"
33 #include "sysemu/qtest.h"
34
35 #define MAX_IDE_BUS 2
36
37 static const int ide_iobase[2] = { 0x1f0, 0x170 };
38 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
39 static const int ide_irq[2] = { 14, 15 };
40
41 static ISADevice *pit; /* PIT i8254 */
42
43 /* i8254 PIT is attached to the IRQ0 at PIC i8259 */
44
45 static struct _loaderparams {
46 int ram_size;
47 const char *kernel_filename;
48 const char *kernel_cmdline;
49 const char *initrd_filename;
50 } loaderparams;
51
52 static void mips_qemu_write (void *opaque, hwaddr addr,
53 uint64_t val, unsigned size)
54 {
55 if ((addr & 0xffff) == 0 && val == 42)
56 qemu_system_reset_request ();
57 else if ((addr & 0xffff) == 4 && val == 42)
58 qemu_system_shutdown_request ();
59 }
60
61 static uint64_t mips_qemu_read (void *opaque, hwaddr addr,
62 unsigned size)
63 {
64 return 0;
65 }
66
67 static const MemoryRegionOps mips_qemu_ops = {
68 .read = mips_qemu_read,
69 .write = mips_qemu_write,
70 .endianness = DEVICE_NATIVE_ENDIAN,
71 };
72
73 typedef struct ResetData {
74 MIPSCPU *cpu;
75 uint64_t vector;
76 } ResetData;
77
78 static int64_t load_kernel(void)
79 {
80 int64_t entry, kernel_high;
81 long kernel_size, initrd_size, params_size;
82 ram_addr_t initrd_offset;
83 uint32_t *params_buf;
84 int big_endian;
85
86 #ifdef TARGET_WORDS_BIGENDIAN
87 big_endian = 1;
88 #else
89 big_endian = 0;
90 #endif
91 kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys,
92 NULL, (uint64_t *)&entry, NULL,
93 (uint64_t *)&kernel_high, big_endian,
94 EM_MIPS, 1, 0);
95 if (kernel_size >= 0) {
96 if ((entry & ~0x7fffffffULL) == 0x80000000)
97 entry = (int32_t)entry;
98 } else {
99 fprintf(stderr, "qemu: could not load kernel '%s'\n",
100 loaderparams.kernel_filename);
101 exit(1);
102 }
103
104 /* load initrd */
105 initrd_size = 0;
106 initrd_offset = 0;
107 if (loaderparams.initrd_filename) {
108 initrd_size = get_image_size (loaderparams.initrd_filename);
109 if (initrd_size > 0) {
110 initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
111 if (initrd_offset + initrd_size > ram_size) {
112 fprintf(stderr,
113 "qemu: memory too small for initial ram disk '%s'\n",
114 loaderparams.initrd_filename);
115 exit(1);
116 }
117 initrd_size = load_image_targphys(loaderparams.initrd_filename,
118 initrd_offset,
119 ram_size - initrd_offset);
120 }
121 if (initrd_size == (target_ulong) -1) {
122 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
123 loaderparams.initrd_filename);
124 exit(1);
125 }
126 }
127
128 /* Store command line. */
129 params_size = 264;
130 params_buf = g_malloc(params_size);
131
132 params_buf[0] = tswap32(ram_size);
133 params_buf[1] = tswap32(0x12345678);
134
135 if (initrd_size > 0) {
136 snprintf((char *)params_buf + 8, 256, "rd_start=0x%" PRIx64 " rd_size=%li %s",
137 cpu_mips_phys_to_kseg0(NULL, initrd_offset),
138 initrd_size, loaderparams.kernel_cmdline);
139 } else {
140 snprintf((char *)params_buf + 8, 256, "%s", loaderparams.kernel_cmdline);
141 }
142
143 rom_add_blob_fixed("params", params_buf, params_size,
144 (16 << 20) - 264);
145
146 g_free(params_buf);
147 return entry;
148 }
149
150 static void main_cpu_reset(void *opaque)
151 {
152 ResetData *s = (ResetData *)opaque;
153 CPUMIPSState *env = &s->cpu->env;
154
155 cpu_reset(CPU(s->cpu));
156 env->active_tc.PC = s->vector;
157 }
158
159 static const int sector_len = 32 * 1024;
160 static
161 void mips_r4k_init(MachineState *machine)
162 {
163 ram_addr_t ram_size = machine->ram_size;
164 const char *cpu_model = machine->cpu_model;
165 const char *kernel_filename = machine->kernel_filename;
166 const char *kernel_cmdline = machine->kernel_cmdline;
167 const char *initrd_filename = machine->initrd_filename;
168 char *filename;
169 MemoryRegion *address_space_mem = get_system_memory();
170 MemoryRegion *ram = g_new(MemoryRegion, 1);
171 MemoryRegion *bios;
172 MemoryRegion *iomem = g_new(MemoryRegion, 1);
173 MemoryRegion *isa_io = g_new(MemoryRegion, 1);
174 MemoryRegion *isa_mem = g_new(MemoryRegion, 1);
175 int bios_size;
176 MIPSCPU *cpu;
177 CPUMIPSState *env;
178 ResetData *reset_info;
179 int i;
180 qemu_irq *i8259;
181 ISABus *isa_bus;
182 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
183 DriveInfo *dinfo;
184 int be;
185
186 /* init CPUs */
187 if (cpu_model == NULL) {
188 #ifdef TARGET_MIPS64
189 cpu_model = "R4000";
190 #else
191 cpu_model = "24Kf";
192 #endif
193 }
194 cpu = cpu_mips_init(cpu_model);
195 if (cpu == NULL) {
196 fprintf(stderr, "Unable to find CPU definition\n");
197 exit(1);
198 }
199 env = &cpu->env;
200
201 reset_info = g_malloc0(sizeof(ResetData));
202 reset_info->cpu = cpu;
203 reset_info->vector = env->active_tc.PC;
204 qemu_register_reset(main_cpu_reset, reset_info);
205
206 /* allocate RAM */
207 if (ram_size > (256 << 20)) {
208 fprintf(stderr,
209 "qemu: Too much memory for this machine: %d MB, maximum 256 MB\n",
210 ((unsigned int)ram_size / (1 << 20)));
211 exit(1);
212 }
213 memory_region_allocate_system_memory(ram, NULL, "mips_r4k.ram", ram_size);
214
215 memory_region_add_subregion(address_space_mem, 0, ram);
216
217 memory_region_init_io(iomem, NULL, &mips_qemu_ops, NULL, "mips-qemu", 0x10000);
218 memory_region_add_subregion(address_space_mem, 0x1fbf0000, iomem);
219
220 /* Try to load a BIOS image. If this fails, we continue regardless,
221 but initialize the hardware ourselves. When a kernel gets
222 preloaded we also initialize the hardware, since the BIOS wasn't
223 run. */
224 if (bios_name == NULL)
225 bios_name = BIOS_FILENAME;
226 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
227 if (filename) {
228 bios_size = get_image_size(filename);
229 } else {
230 bios_size = -1;
231 }
232 #ifdef TARGET_WORDS_BIGENDIAN
233 be = 1;
234 #else
235 be = 0;
236 #endif
237 if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
238 bios = g_new(MemoryRegion, 1);
239 memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE,
240 &error_fatal);
241 vmstate_register_ram_global(bios);
242 memory_region_set_readonly(bios, true);
243 memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios);
244
245 load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
246 } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) {
247 uint32_t mips_rom = 0x00400000;
248 if (!pflash_cfi01_register(0x1fc00000, NULL, "mips_r4k.bios", mips_rom,
249 blk_by_legacy_dinfo(dinfo),
250 sector_len, mips_rom / sector_len,
251 4, 0, 0, 0, 0, be)) {
252 fprintf(stderr, "qemu: Error registering flash memory.\n");
253 }
254 } else if (!qtest_enabled()) {
255 /* not fatal */
256 fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
257 bios_name);
258 }
259 g_free(filename);
260
261 if (kernel_filename) {
262 loaderparams.ram_size = ram_size;
263 loaderparams.kernel_filename = kernel_filename;
264 loaderparams.kernel_cmdline = kernel_cmdline;
265 loaderparams.initrd_filename = initrd_filename;
266 reset_info->vector = load_kernel();
267 }
268
269 /* Init CPU internal devices */
270 cpu_mips_irq_init_cpu(cpu);
271 cpu_mips_clock_init(cpu);
272
273 /* ISA bus: IO space at 0x14000000, mem space at 0x10000000 */
274 memory_region_init_alias(isa_io, NULL, "isa-io",
275 get_system_io(), 0, 0x00010000);
276 memory_region_init(isa_mem, NULL, "isa-mem", 0x01000000);
277 memory_region_add_subregion(get_system_memory(), 0x14000000, isa_io);
278 memory_region_add_subregion(get_system_memory(), 0x10000000, isa_mem);
279 isa_bus = isa_bus_new(NULL, isa_mem, get_system_io(), &error_abort);
280
281 /* The PIC is attached to the MIPS CPU INT0 pin */
282 i8259 = i8259_init(isa_bus, env->irq[2]);
283 isa_bus_irqs(isa_bus, i8259);
284
285 rtc_init(isa_bus, 2000, NULL);
286
287 pit = pit_init(isa_bus, 0x40, 0, NULL);
288
289 serial_hds_isa_init(isa_bus, 0, MAX_SERIAL_PORTS);
290
291 isa_vga_init(isa_bus);
292
293 if (nd_table[0].used)
294 isa_ne2000_init(isa_bus, 0x300, 9, &nd_table[0]);
295
296 ide_drive_get(hd, ARRAY_SIZE(hd));
297 for(i = 0; i < MAX_IDE_BUS; i++)
298 isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i],
299 hd[MAX_IDE_DEVS * i],
300 hd[MAX_IDE_DEVS * i + 1]);
301
302 isa_create_simple(isa_bus, "i8042");
303 }
304
305 static void mips_machine_init(MachineClass *mc)
306 {
307 mc->desc = "mips r4k platform";
308 mc->init = mips_r4k_init;
309 }
310
311 DEFINE_MACHINE("mips", mips_machine_init)