Merge remote-tracking branch 'remotes/philmd-gitlab/tags/renesas-20201027' into staging
[qemu.git] / hw / mips / mipssim.c
1 /*
2 * QEMU/mipssim emulation
3 *
4 * Emulates a very simple machine model similar to the one used by the
5 * proprietary MIPS emulator.
6 *
7 * Copyright (c) 2007 Thiemo Seufer
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to deal
11 * in the Software without restriction, including without limitation the rights
12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13 * copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * THE SOFTWARE.
26 */
27
28 #include "qemu/osdep.h"
29 #include "qapi/error.h"
30 #include "qemu-common.h"
31 #include "cpu.h"
32 #include "hw/clock.h"
33 #include "hw/mips/mips.h"
34 #include "hw/mips/cpudevs.h"
35 #include "hw/char/serial.h"
36 #include "hw/isa/isa.h"
37 #include "net/net.h"
38 #include "sysemu/sysemu.h"
39 #include "hw/boards.h"
40 #include "hw/mips/bios.h"
41 #include "hw/loader.h"
42 #include "elf.h"
43 #include "hw/sysbus.h"
44 #include "hw/qdev-properties.h"
45 #include "exec/address-spaces.h"
46 #include "qemu/error-report.h"
47 #include "sysemu/qtest.h"
48 #include "sysemu/reset.h"
49
50 static struct _loaderparams {
51 int ram_size;
52 const char *kernel_filename;
53 const char *kernel_cmdline;
54 const char *initrd_filename;
55 } loaderparams;
56
57 typedef struct ResetData {
58 MIPSCPU *cpu;
59 uint64_t vector;
60 } ResetData;
61
62 static int64_t load_kernel(void)
63 {
64 int64_t entry, kernel_high, initrd_size;
65 long kernel_size;
66 ram_addr_t initrd_offset;
67 int big_endian;
68
69 #ifdef TARGET_WORDS_BIGENDIAN
70 big_endian = 1;
71 #else
72 big_endian = 0;
73 #endif
74
75 kernel_size = load_elf(loaderparams.kernel_filename, NULL,
76 cpu_mips_kseg0_to_phys, NULL,
77 (uint64_t *)&entry, NULL,
78 (uint64_t *)&kernel_high, NULL, big_endian,
79 EM_MIPS, 1, 0);
80 if (kernel_size < 0) {
81 error_report("could not load kernel '%s': %s",
82 loaderparams.kernel_filename,
83 load_elf_strerror(kernel_size));
84 exit(1);
85 }
86
87 /* load initrd */
88 initrd_size = 0;
89 initrd_offset = 0;
90 if (loaderparams.initrd_filename) {
91 initrd_size = get_image_size(loaderparams.initrd_filename);
92 if (initrd_size > 0) {
93 initrd_offset = ROUND_UP(kernel_high, INITRD_PAGE_SIZE);
94 if (initrd_offset + initrd_size > loaderparams.ram_size) {
95 error_report("memory too small for initial ram disk '%s'",
96 loaderparams.initrd_filename);
97 exit(1);
98 }
99 initrd_size = load_image_targphys(loaderparams.initrd_filename,
100 initrd_offset, loaderparams.ram_size - initrd_offset);
101 }
102 if (initrd_size == (target_ulong) -1) {
103 error_report("could not load initial ram disk '%s'",
104 loaderparams.initrd_filename);
105 exit(1);
106 }
107 }
108 return entry;
109 }
110
111 static void main_cpu_reset(void *opaque)
112 {
113 ResetData *s = (ResetData *)opaque;
114 CPUMIPSState *env = &s->cpu->env;
115
116 cpu_reset(CPU(s->cpu));
117 env->active_tc.PC = s->vector & ~(target_ulong)1;
118 if (s->vector & 1) {
119 env->hflags |= MIPS_HFLAG_M16;
120 }
121 }
122
123 static void mipsnet_init(int base, qemu_irq irq, NICInfo *nd)
124 {
125 DeviceState *dev;
126 SysBusDevice *s;
127
128 dev = qdev_new("mipsnet");
129 qdev_set_nic_properties(dev, nd);
130
131 s = SYS_BUS_DEVICE(dev);
132 sysbus_realize_and_unref(s, &error_fatal);
133 sysbus_connect_irq(s, 0, irq);
134 memory_region_add_subregion(get_system_io(),
135 base,
136 sysbus_mmio_get_region(s, 0));
137 }
138
139 static void
140 mips_mipssim_init(MachineState *machine)
141 {
142 const char *kernel_filename = machine->kernel_filename;
143 const char *kernel_cmdline = machine->kernel_cmdline;
144 const char *initrd_filename = machine->initrd_filename;
145 char *filename;
146 MemoryRegion *address_space_mem = get_system_memory();
147 MemoryRegion *isa = g_new(MemoryRegion, 1);
148 MemoryRegion *bios = g_new(MemoryRegion, 1);
149 Clock *cpuclk;
150 MIPSCPU *cpu;
151 CPUMIPSState *env;
152 ResetData *reset_info;
153 int bios_size;
154
155 cpuclk = clock_new(OBJECT(machine), "cpu-refclk");
156 #ifdef TARGET_MIPS64
157 clock_set_hz(cpuclk, 6000000); /* 6 MHz */
158 #else
159 clock_set_hz(cpuclk, 12000000); /* 12 MHz */
160 #endif
161
162 /* Init CPUs. */
163 cpu = mips_cpu_create_with_clock(machine->cpu_type, cpuclk);
164 env = &cpu->env;
165
166 reset_info = g_malloc0(sizeof(ResetData));
167 reset_info->cpu = cpu;
168 reset_info->vector = env->active_tc.PC;
169 qemu_register_reset(main_cpu_reset, reset_info);
170
171 /* Allocate RAM. */
172 memory_region_init_rom(bios, NULL, "mips_mipssim.bios", BIOS_SIZE,
173 &error_fatal);
174
175 memory_region_add_subregion(address_space_mem, 0, machine->ram);
176
177 /* Map the BIOS / boot exception handler. */
178 memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
179 /* Load a BIOS / boot exception handler image. */
180 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name ?: BIOS_FILENAME);
181 if (filename) {
182 bios_size = load_image_targphys(filename, 0x1fc00000LL, BIOS_SIZE);
183 g_free(filename);
184 } else {
185 bios_size = -1;
186 }
187 if ((bios_size < 0 || bios_size > BIOS_SIZE) &&
188 bios_name && !qtest_enabled()) {
189 /* Bail out if we have neither a kernel image nor boot vector code. */
190 error_report("Could not load MIPS bios '%s'", bios_name);
191 exit(1);
192 } else {
193 /* We have a boot vector start address. */
194 env->active_tc.PC = (target_long)(int32_t)0xbfc00000;
195 }
196
197 if (kernel_filename) {
198 loaderparams.ram_size = machine->ram_size;
199 loaderparams.kernel_filename = kernel_filename;
200 loaderparams.kernel_cmdline = kernel_cmdline;
201 loaderparams.initrd_filename = initrd_filename;
202 reset_info->vector = load_kernel();
203 }
204
205 /* Init CPU internal devices. */
206 cpu_mips_irq_init_cpu(cpu);
207 cpu_mips_clock_init(cpu);
208
209 /* Register 64 KB of ISA IO space at 0x1fd00000. */
210 memory_region_init_alias(isa, NULL, "isa_mmio",
211 get_system_io(), 0, 0x00010000);
212 memory_region_add_subregion(get_system_memory(), 0x1fd00000, isa);
213
214 /*
215 * A single 16450 sits at offset 0x3f8. It is attached to
216 * MIPS CPU INT2, which is interrupt 4.
217 */
218 if (serial_hd(0)) {
219 DeviceState *dev = qdev_new(TYPE_SERIAL_MM);
220
221 qdev_prop_set_chr(dev, "chardev", serial_hd(0));
222 qdev_prop_set_uint8(dev, "regshift", 0);
223 qdev_prop_set_uint8(dev, "endianness", DEVICE_LITTLE_ENDIAN);
224 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
225 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]);
226 sysbus_add_io(SYS_BUS_DEVICE(dev), 0x3f8,
227 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0));
228 }
229
230 if (nd_table[0].used)
231 /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */
232 mipsnet_init(0x4200, env->irq[2], &nd_table[0]);
233 }
234
235 static void mips_mipssim_machine_init(MachineClass *mc)
236 {
237 mc->desc = "MIPS MIPSsim platform";
238 mc->init = mips_mipssim_init;
239 #ifdef TARGET_MIPS64
240 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("5Kf");
241 #else
242 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf");
243 #endif
244 mc->default_ram_id = "mips_mipssim.ram";
245 }
246
247 DEFINE_MACHINE("mipssim", mips_mipssim_machine_init)