e1000e: Fix Lesser GPL version number
[qemu.git] / hw / net / e1000e_core.h
1 /*
2 * Core code for QEMU e1000e emulation
3 *
4 * Software developer's manuals:
5 * http://www.intel.com/content/dam/doc/datasheet/82574l-gbe-controller-datasheet.pdf
6 *
7 * Copyright (c) 2015 Ravello Systems LTD (http://ravellosystems.com)
8 * Developed by Daynix Computing LTD (http://www.daynix.com)
9 *
10 * Authors:
11 * Dmitry Fleytman <dmitry@daynix.com>
12 * Leonid Bloch <leonid@daynix.com>
13 * Yan Vugenfirer <yan@daynix.com>
14 *
15 * Based on work done by:
16 * Nir Peleg, Tutis Systems Ltd. for Qumranet Inc.
17 * Copyright (c) 2008 Qumranet
18 * Based on work done by:
19 * Copyright (c) 2007 Dan Aloni
20 * Copyright (c) 2004 Antony T Curtis
21 *
22 * This library is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU Lesser General Public
24 * License as published by the Free Software Foundation; either
25 * version 2.1 of the License, or (at your option) any later version.
26 *
27 * This library is distributed in the hope that it will be useful,
28 * but WITHOUT ANY WARRANTY; without even the implied warranty of
29 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
30 * Lesser General Public License for more details.
31 *
32 * You should have received a copy of the GNU Lesser General Public
33 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
34 */
35
36 #ifndef HW_NET_E1000E_CORE_H
37 #define HW_NET_E1000E_CORE_H
38
39 #define E1000E_PHY_PAGE_SIZE (0x20)
40 #define E1000E_PHY_PAGES (0x07)
41 #define E1000E_MAC_SIZE (0x8000)
42 #define E1000E_EEPROM_SIZE (64)
43 #define E1000E_MSIX_VEC_NUM (5)
44 #define E1000E_NUM_QUEUES (2)
45
46 typedef struct E1000Core E1000ECore;
47
48 enum { PHY_R = BIT(0),
49 PHY_W = BIT(1),
50 PHY_RW = PHY_R | PHY_W,
51 PHY_ANYPAGE = BIT(2) };
52
53 typedef struct E1000IntrDelayTimer_st {
54 QEMUTimer *timer;
55 bool running;
56 uint32_t delay_reg;
57 uint32_t delay_resolution_ns;
58 E1000ECore *core;
59 } E1000IntrDelayTimer;
60
61 struct E1000Core {
62 uint32_t mac[E1000E_MAC_SIZE];
63 uint16_t phy[E1000E_PHY_PAGES][E1000E_PHY_PAGE_SIZE];
64 uint16_t eeprom[E1000E_EEPROM_SIZE];
65
66 uint32_t rxbuf_sizes[E1000_PSRCTL_BUFFS_PER_DESC];
67 uint32_t rx_desc_buf_size;
68 uint32_t rxbuf_min_shift;
69 uint8_t rx_desc_len;
70
71 QEMUTimer *autoneg_timer;
72
73 struct e1000e_tx {
74 e1000x_txd_props props;
75
76 bool skip_cp;
77 unsigned char sum_needed;
78 bool cptse;
79 struct NetTxPkt *tx_pkt;
80 } tx[E1000E_NUM_QUEUES];
81
82 struct NetRxPkt *rx_pkt;
83
84 bool has_vnet;
85 int max_queue_num;
86
87 /* Interrupt moderation management */
88 uint32_t delayed_causes;
89
90 E1000IntrDelayTimer radv;
91 E1000IntrDelayTimer rdtr;
92 E1000IntrDelayTimer raid;
93
94 E1000IntrDelayTimer tadv;
95 E1000IntrDelayTimer tidv;
96
97 E1000IntrDelayTimer itr;
98 bool itr_intr_pending;
99
100 E1000IntrDelayTimer eitr[E1000E_MSIX_VEC_NUM];
101 bool eitr_intr_pending[E1000E_MSIX_VEC_NUM];
102
103 VMChangeStateEntry *vmstate;
104
105 uint32_t itr_guest_value;
106 uint32_t eitr_guest_value[E1000E_MSIX_VEC_NUM];
107
108 uint16_t vet;
109
110 uint8_t permanent_mac[ETH_ALEN];
111
112 NICState *owner_nic;
113 PCIDevice *owner;
114 void (*owner_start_recv)(PCIDevice *d);
115
116 uint32_t msi_causes_pending;
117 };
118
119 void
120 e1000e_core_write(E1000ECore *core, hwaddr addr, uint64_t val, unsigned size);
121
122 uint64_t
123 e1000e_core_read(E1000ECore *core, hwaddr addr, unsigned size);
124
125 void
126 e1000e_core_pci_realize(E1000ECore *regs,
127 const uint16_t *eeprom_templ,
128 uint32_t eeprom_size,
129 const uint8_t *macaddr);
130
131 void
132 e1000e_core_reset(E1000ECore *core);
133
134 void
135 e1000e_core_pre_save(E1000ECore *core);
136
137 int
138 e1000e_core_post_load(E1000ECore *core);
139
140 void
141 e1000e_core_set_link_status(E1000ECore *core);
142
143 void
144 e1000e_core_pci_uninit(E1000ECore *core);
145
146 bool
147 e1000e_can_receive(E1000ECore *core);
148
149 ssize_t
150 e1000e_receive(E1000ECore *core, const uint8_t *buf, size_t size);
151
152 ssize_t
153 e1000e_receive_iov(E1000ECore *core, const struct iovec *iov, int iovcnt);
154
155 void
156 e1000e_start_recv(E1000ECore *core);
157
158 #endif