meson: convert hw/9pfs, cleanup
[qemu.git] / hw / openrisc / pic_cpu.c
1 /*
2 * OpenRISC Programmable Interrupt Controller support.
3 *
4 * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
5 * Feng Gao <gf91597@gmail.com>
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 */
20
21 #include "qemu/osdep.h"
22 #include "hw/irq.h"
23 #include "cpu.h"
24
25 /* OpenRISC pic handler */
26 static void openrisc_pic_cpu_handler(void *opaque, int irq, int level)
27 {
28 OpenRISCCPU *cpu = (OpenRISCCPU *)opaque;
29 CPUState *cs = CPU(cpu);
30 uint32_t irq_bit;
31
32 if (irq > 31 || irq < 0) {
33 return;
34 }
35
36 irq_bit = 1U << irq;
37
38 if (level) {
39 cpu->env.picsr |= irq_bit;
40 } else {
41 cpu->env.picsr &= ~irq_bit;
42 }
43
44 if (cpu->env.picsr & cpu->env.picmr) {
45 cpu_interrupt(cs, CPU_INTERRUPT_HARD);
46 } else {
47 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
48 cpu->env.picsr = 0;
49 }
50 }
51
52 void cpu_openrisc_pic_init(OpenRISCCPU *cpu)
53 {
54 int i;
55 qemu_irq *qi;
56 qi = qemu_allocate_irqs(openrisc_pic_cpu_handler, cpu, NR_IRQS);
57
58 for (i = 0; i < NR_IRQS; i++) {
59 cpu->env.irq[i] = qi[i];
60 }
61 }