pc, Disable vmport initialisation with Xen.
[qemu.git] / hw / pc.h
1 #ifndef HW_PC_H
2 #define HW_PC_H
3
4 #include "qemu-common.h"
5 #include "ioport.h"
6 #include "isa.h"
7 #include "fdc.h"
8 #include "net.h"
9
10 /* PC-style peripherals (also used by other machines). */
11
12 /* serial.c */
13
14 SerialState *serial_init(int base, qemu_irq irq, int baudbase,
15 CharDriverState *chr);
16 SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
17 qemu_irq irq, int baudbase,
18 CharDriverState *chr, int ioregister,
19 int be);
20 static inline bool serial_isa_init(int index, CharDriverState *chr)
21 {
22 ISADevice *dev;
23
24 dev = isa_try_create("isa-serial");
25 if (!dev) {
26 return false;
27 }
28 qdev_prop_set_uint32(&dev->qdev, "index", index);
29 qdev_prop_set_chr(&dev->qdev, "chardev", chr);
30 if (qdev_init(&dev->qdev) < 0) {
31 return false;
32 }
33 return true;
34 }
35
36 void serial_set_frequency(SerialState *s, uint32_t frequency);
37
38 /* parallel.c */
39 static inline bool parallel_init(int index, CharDriverState *chr)
40 {
41 ISADevice *dev;
42
43 dev = isa_try_create("isa-parallel");
44 if (!dev) {
45 return false;
46 }
47 qdev_prop_set_uint32(&dev->qdev, "index", index);
48 qdev_prop_set_chr(&dev->qdev, "chardev", chr);
49 if (qdev_init(&dev->qdev) < 0) {
50 return false;
51 }
52 return true;
53 }
54
55 bool parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
56 CharDriverState *chr);
57
58 /* i8259.c */
59
60 typedef struct PicState2 PicState2;
61 extern PicState2 *isa_pic;
62 void pic_set_irq(int irq, int level);
63 void pic_set_irq_new(void *opaque, int irq, int level);
64 qemu_irq *i8259_init(qemu_irq parent_irq);
65 int pic_read_irq(PicState2 *s);
66 void pic_update_irq(PicState2 *s);
67 uint32_t pic_intack_read(PicState2 *s);
68 void pic_info(Monitor *mon);
69 void irq_info(Monitor *mon);
70
71 /* ISA */
72 #define IOAPIC_NUM_PINS 0x18
73
74 typedef struct isa_irq_state {
75 qemu_irq *i8259;
76 qemu_irq ioapic[IOAPIC_NUM_PINS];
77 } IsaIrqState;
78
79 void isa_irq_handler(void *opaque, int n, int level);
80
81 /* i8254.c */
82
83 #define PIT_FREQ 1193182
84
85 static inline ISADevice *pit_init(int base, int irq)
86 {
87 ISADevice *dev;
88
89 dev = isa_create("isa-pit");
90 qdev_prop_set_uint32(&dev->qdev, "iobase", base);
91 qdev_prop_set_uint32(&dev->qdev, "irq", irq);
92 qdev_init_nofail(&dev->qdev);
93
94 return dev;
95 }
96
97 void pit_set_gate(ISADevice *dev, int channel, int val);
98 int pit_get_gate(ISADevice *dev, int channel);
99 int pit_get_initial_count(ISADevice *dev, int channel);
100 int pit_get_mode(ISADevice *dev, int channel);
101 int pit_get_out(ISADevice *dev, int channel, int64_t current_time);
102
103 void hpet_pit_disable(void);
104 void hpet_pit_enable(void);
105
106 /* vmport.c */
107 static inline void vmport_init(void)
108 {
109 isa_create_simple("vmport");
110 }
111 void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
112 void vmmouse_get_data(uint32_t *data);
113 void vmmouse_set_data(const uint32_t *data);
114
115 /* pckbd.c */
116
117 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
118 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
119 target_phys_addr_t base, ram_addr_t size,
120 target_phys_addr_t mask);
121 void i8042_isa_mouse_fake_event(void *opaque);
122 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
123
124 /* pc.c */
125 extern int fd_bootchk;
126
127 void pc_register_ferr_irq(qemu_irq irq);
128 void pc_cmos_set_s3_resume(void *opaque, int irq, int level);
129 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
130
131 void pc_cpus_init(const char *cpu_model);
132 void pc_memory_init(const char *kernel_filename,
133 const char *kernel_cmdline,
134 const char *initrd_filename,
135 ram_addr_t below_4g_mem_size,
136 ram_addr_t above_4g_mem_size);
137 qemu_irq *pc_allocate_cpu_irq(void);
138 void pc_vga_init(PCIBus *pci_bus);
139 void pc_basic_device_init(qemu_irq *isa_irq,
140 ISADevice **rtc_state,
141 bool no_vmport);
142 void pc_init_ne2k_isa(NICInfo *nd);
143 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
144 const char *boot_device,
145 BusState *ide0, BusState *ide1,
146 ISADevice *s);
147 void pc_pci_device_init(PCIBus *pci_bus);
148
149 typedef void (*cpu_set_smm_t)(int smm, void *arg);
150 void cpu_smm_register(cpu_set_smm_t callback, void *arg);
151
152 /* acpi.c */
153 extern int acpi_enabled;
154 extern char *acpi_tables;
155 extern size_t acpi_tables_len;
156
157 void acpi_bios_init(void);
158 int acpi_table_add(const char *table_desc);
159
160 /* acpi_piix.c */
161
162 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
163 qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq,
164 int kvm_enabled);
165 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
166
167 /* hpet.c */
168 extern int no_hpet;
169
170 /* pcspk.c */
171 void pcspk_init(ISADevice *pit);
172 int pcspk_audio_init(qemu_irq *pic);
173
174 /* piix_pci.c */
175 struct PCII440FXState;
176 typedef struct PCII440FXState PCII440FXState;
177
178 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, qemu_irq *pic, ram_addr_t ram_size);
179 void i440fx_init_memory_mappings(PCII440FXState *d);
180
181 /* piix4.c */
182 extern PCIDevice *piix4_dev;
183 int piix4_init(PCIBus *bus, int devfn);
184
185 /* vga.c */
186 enum vga_retrace_method {
187 VGA_RETRACE_DUMB,
188 VGA_RETRACE_PRECISE
189 };
190
191 extern enum vga_retrace_method vga_retrace_method;
192
193 static inline int isa_vga_init(void)
194 {
195 ISADevice *dev;
196
197 dev = isa_try_create("isa-vga");
198 if (!dev) {
199 fprintf(stderr, "Warning: isa-vga not available\n");
200 return 0;
201 }
202 qdev_init_nofail(&dev->qdev);
203 return 1;
204 }
205
206 int pci_vga_init(PCIBus *bus);
207 int isa_vga_mm_init(target_phys_addr_t vram_base,
208 target_phys_addr_t ctrl_base, int it_shift);
209
210 /* cirrus_vga.c */
211 void pci_cirrus_vga_init(PCIBus *bus);
212 void isa_cirrus_vga_init(void);
213
214 /* ne2000.c */
215 static inline bool isa_ne2000_init(int base, int irq, NICInfo *nd)
216 {
217 ISADevice *dev;
218
219 qemu_check_nic_model(nd, "ne2k_isa");
220
221 dev = isa_try_create("ne2k_isa");
222 if (!dev) {
223 return false;
224 }
225 qdev_prop_set_uint32(&dev->qdev, "iobase", base);
226 qdev_prop_set_uint32(&dev->qdev, "irq", irq);
227 qdev_set_nic_properties(&dev->qdev, nd);
228 qdev_init_nofail(&dev->qdev);
229 return true;
230 }
231
232 /* e820 types */
233 #define E820_RAM 1
234 #define E820_RESERVED 2
235 #define E820_ACPI 3
236 #define E820_NVS 4
237 #define E820_UNUSABLE 5
238
239 int e820_add_entry(uint64_t, uint64_t, uint32_t);
240
241 #endif