hw/arm/raspi: fix CPRMAN base address
[qemu.git] / hw / pci-bridge / dec.c
1 /*
2 * QEMU DEC 21154 PCI bridge
3 *
4 * Copyright (c) 2006-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
26 #include "qemu/osdep.h"
27 #include "dec.h"
28 #include "hw/sysbus.h"
29 #include "qapi/error.h"
30 #include "qemu/module.h"
31 #include "hw/pci/pci.h"
32 #include "hw/pci/pci_host.h"
33 #include "hw/pci/pci_bridge.h"
34 #include "hw/pci/pci_bus.h"
35 #include "qom/object.h"
36
37 OBJECT_DECLARE_SIMPLE_TYPE(DECState, DEC_21154)
38
39 struct DECState {
40 PCIHostState parent_obj;
41 };
42
43 static int dec_map_irq(PCIDevice *pci_dev, int irq_num)
44 {
45 return irq_num;
46 }
47
48 static void dec_pci_bridge_realize(PCIDevice *pci_dev, Error **errp)
49 {
50 pci_bridge_initfn(pci_dev, TYPE_PCI_BUS);
51 }
52
53 static void dec_21154_pci_bridge_class_init(ObjectClass *klass, void *data)
54 {
55 DeviceClass *dc = DEVICE_CLASS(klass);
56 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
57
58 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
59 k->realize = dec_pci_bridge_realize;
60 k->exit = pci_bridge_exitfn;
61 k->vendor_id = PCI_VENDOR_ID_DEC;
62 k->device_id = PCI_DEVICE_ID_DEC_21154;
63 k->config_write = pci_bridge_write_config;
64 k->is_bridge = true;
65 dc->desc = "DEC 21154 PCI-PCI bridge";
66 dc->reset = pci_bridge_reset;
67 dc->vmsd = &vmstate_pci_device;
68 }
69
70 static const TypeInfo dec_21154_pci_bridge_info = {
71 .name = "dec-21154-p2p-bridge",
72 .parent = TYPE_PCI_BRIDGE,
73 .instance_size = sizeof(PCIBridge),
74 .class_init = dec_21154_pci_bridge_class_init,
75 .interfaces = (InterfaceInfo[]) {
76 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
77 { },
78 },
79 };
80
81 PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn)
82 {
83 PCIDevice *dev;
84 PCIBridge *br;
85
86 dev = pci_new_multifunction(devfn, false, "dec-21154-p2p-bridge");
87 br = PCI_BRIDGE(dev);
88 pci_bridge_map_irq(br, "DEC 21154 PCI-PCI bridge", dec_map_irq);
89 pci_realize_and_unref(dev, parent_bus, &error_fatal);
90 return pci_bridge_get_sec_bus(br);
91 }
92
93 static void pci_dec_21154_device_realize(DeviceState *dev, Error **errp)
94 {
95 PCIHostState *phb;
96 SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
97
98 phb = PCI_HOST_BRIDGE(dev);
99
100 memory_region_init_io(&phb->conf_mem, OBJECT(dev), &pci_host_conf_le_ops,
101 dev, "pci-conf-idx", 0x1000);
102 memory_region_init_io(&phb->data_mem, OBJECT(dev), &pci_host_data_le_ops,
103 dev, "pci-data-idx", 0x1000);
104 sysbus_init_mmio(sbd, &phb->conf_mem);
105 sysbus_init_mmio(sbd, &phb->data_mem);
106 }
107
108 static void dec_21154_pci_host_realize(PCIDevice *d, Error **errp)
109 {
110 /* PCI2PCI bridge same values as PearPC - check this */
111 }
112
113 static void dec_21154_pci_host_class_init(ObjectClass *klass, void *data)
114 {
115 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
116 DeviceClass *dc = DEVICE_CLASS(klass);
117
118 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
119 k->realize = dec_21154_pci_host_realize;
120 k->vendor_id = PCI_VENDOR_ID_DEC;
121 k->device_id = PCI_DEVICE_ID_DEC_21154;
122 k->revision = 0x02;
123 k->class_id = PCI_CLASS_BRIDGE_PCI;
124 k->is_bridge = true;
125 /*
126 * PCI-facing part of the host bridge, not usable without the
127 * host-facing part, which can't be device_add'ed, yet.
128 */
129 dc->user_creatable = false;
130 }
131
132 static const TypeInfo dec_21154_pci_host_info = {
133 .name = "dec-21154",
134 .parent = TYPE_PCI_DEVICE,
135 .instance_size = sizeof(PCIDevice),
136 .class_init = dec_21154_pci_host_class_init,
137 .interfaces = (InterfaceInfo[]) {
138 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
139 { },
140 },
141 };
142
143 static void pci_dec_21154_device_class_init(ObjectClass *klass, void *data)
144 {
145 DeviceClass *dc = DEVICE_CLASS(klass);
146
147 dc->realize = pci_dec_21154_device_realize;
148 }
149
150 static const TypeInfo pci_dec_21154_device_info = {
151 .name = TYPE_DEC_21154,
152 .parent = TYPE_PCI_HOST_BRIDGE,
153 .instance_size = sizeof(DECState),
154 .class_init = pci_dec_21154_device_class_init,
155 };
156
157 static void dec_register_types(void)
158 {
159 type_register_static(&pci_dec_21154_device_info);
160 type_register_static(&dec_21154_pci_host_info);
161 type_register_static(&dec_21154_pci_bridge_info);
162 }
163
164 type_init(dec_register_types)