hw/arm/raspi: fix CPRMAN base address
[qemu.git] / hw / pci-bridge / pci_expander_bridge.c
1 /*
2 * PCI Expander Bridge Device Emulation
3 *
4 * Copyright (C) 2015 Red Hat Inc
5 *
6 * Authors:
7 * Marcel Apfelbaum <marcel@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
11 */
12
13 #include "qemu/osdep.h"
14 #include "qapi/error.h"
15 #include "hw/pci/pci.h"
16 #include "hw/pci/pci_bus.h"
17 #include "hw/pci/pci_host.h"
18 #include "hw/qdev-properties.h"
19 #include "hw/pci/pci_bridge.h"
20 #include "qemu/range.h"
21 #include "qemu/error-report.h"
22 #include "qemu/module.h"
23 #include "sysemu/numa.h"
24 #include "hw/boards.h"
25 #include "qom/object.h"
26
27 #define TYPE_PXB_BUS "pxb-bus"
28 typedef struct PXBBus PXBBus;
29 DECLARE_INSTANCE_CHECKER(PXBBus, PXB_BUS,
30 TYPE_PXB_BUS)
31
32 #define TYPE_PXB_PCIE_BUS "pxb-pcie-bus"
33 DECLARE_INSTANCE_CHECKER(PXBBus, PXB_PCIE_BUS,
34 TYPE_PXB_PCIE_BUS)
35
36 struct PXBBus {
37 /*< private >*/
38 PCIBus parent_obj;
39 /*< public >*/
40
41 char bus_path[8];
42 };
43
44 #define TYPE_PXB_DEVICE "pxb"
45 typedef struct PXBDev PXBDev;
46 DECLARE_INSTANCE_CHECKER(PXBDev, PXB_DEV,
47 TYPE_PXB_DEVICE)
48
49 #define TYPE_PXB_PCIE_DEVICE "pxb-pcie"
50 DECLARE_INSTANCE_CHECKER(PXBDev, PXB_PCIE_DEV,
51 TYPE_PXB_PCIE_DEVICE)
52
53 struct PXBDev {
54 /*< private >*/
55 PCIDevice parent_obj;
56 /*< public >*/
57
58 uint8_t bus_nr;
59 uint16_t numa_node;
60 };
61
62 static PXBDev *convert_to_pxb(PCIDevice *dev)
63 {
64 return pci_bus_is_express(pci_get_bus(dev))
65 ? PXB_PCIE_DEV(dev) : PXB_DEV(dev);
66 }
67
68 static GList *pxb_dev_list;
69
70 #define TYPE_PXB_HOST "pxb-host"
71
72 static int pxb_bus_num(PCIBus *bus)
73 {
74 PXBDev *pxb = convert_to_pxb(bus->parent_dev);
75
76 return pxb->bus_nr;
77 }
78
79 static uint16_t pxb_bus_numa_node(PCIBus *bus)
80 {
81 PXBDev *pxb = convert_to_pxb(bus->parent_dev);
82
83 return pxb->numa_node;
84 }
85
86 static void pxb_bus_class_init(ObjectClass *class, void *data)
87 {
88 PCIBusClass *pbc = PCI_BUS_CLASS(class);
89
90 pbc->bus_num = pxb_bus_num;
91 pbc->numa_node = pxb_bus_numa_node;
92 }
93
94 static const TypeInfo pxb_bus_info = {
95 .name = TYPE_PXB_BUS,
96 .parent = TYPE_PCI_BUS,
97 .instance_size = sizeof(PXBBus),
98 .class_init = pxb_bus_class_init,
99 };
100
101 static const TypeInfo pxb_pcie_bus_info = {
102 .name = TYPE_PXB_PCIE_BUS,
103 .parent = TYPE_PCIE_BUS,
104 .instance_size = sizeof(PXBBus),
105 .class_init = pxb_bus_class_init,
106 };
107
108 static const char *pxb_host_root_bus_path(PCIHostState *host_bridge,
109 PCIBus *rootbus)
110 {
111 PXBBus *bus = pci_bus_is_express(rootbus) ?
112 PXB_PCIE_BUS(rootbus) : PXB_BUS(rootbus);
113
114 snprintf(bus->bus_path, 8, "0000:%02x", pxb_bus_num(rootbus));
115 return bus->bus_path;
116 }
117
118 static char *pxb_host_ofw_unit_address(const SysBusDevice *dev)
119 {
120 const PCIHostState *pxb_host;
121 const PCIBus *pxb_bus;
122 const PXBDev *pxb_dev;
123 int position;
124 const DeviceState *pxb_dev_base;
125 const PCIHostState *main_host;
126 const SysBusDevice *main_host_sbd;
127
128 pxb_host = PCI_HOST_BRIDGE(dev);
129 pxb_bus = pxb_host->bus;
130 pxb_dev = convert_to_pxb(pxb_bus->parent_dev);
131 position = g_list_index(pxb_dev_list, pxb_dev);
132 assert(position >= 0);
133
134 pxb_dev_base = DEVICE(pxb_dev);
135 main_host = PCI_HOST_BRIDGE(pxb_dev_base->parent_bus->parent);
136 main_host_sbd = SYS_BUS_DEVICE(main_host);
137
138 if (main_host_sbd->num_mmio > 0) {
139 return g_strdup_printf(TARGET_FMT_plx ",%x",
140 main_host_sbd->mmio[0].addr, position + 1);
141 }
142 if (main_host_sbd->num_pio > 0) {
143 return g_strdup_printf("i%04x,%x",
144 main_host_sbd->pio[0], position + 1);
145 }
146 return NULL;
147 }
148
149 static void pxb_host_class_init(ObjectClass *class, void *data)
150 {
151 DeviceClass *dc = DEVICE_CLASS(class);
152 SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(class);
153 PCIHostBridgeClass *hc = PCI_HOST_BRIDGE_CLASS(class);
154
155 dc->fw_name = "pci";
156 /* Reason: Internal part of the pxb/pxb-pcie device, not usable by itself */
157 dc->user_creatable = false;
158 sbc->explicit_ofw_unit_address = pxb_host_ofw_unit_address;
159 hc->root_bus_path = pxb_host_root_bus_path;
160 }
161
162 static const TypeInfo pxb_host_info = {
163 .name = TYPE_PXB_HOST,
164 .parent = TYPE_PCI_HOST_BRIDGE,
165 .class_init = pxb_host_class_init,
166 };
167
168 /*
169 * Registers the PXB bus as a child of pci host root bus.
170 */
171 static void pxb_register_bus(PCIDevice *dev, PCIBus *pxb_bus, Error **errp)
172 {
173 PCIBus *bus = pci_get_bus(dev);
174 int pxb_bus_num = pci_bus_num(pxb_bus);
175
176 if (bus->parent_dev) {
177 error_setg(errp, "PXB devices can be attached only to root bus");
178 return;
179 }
180
181 QLIST_FOREACH(bus, &bus->child, sibling) {
182 if (pci_bus_num(bus) == pxb_bus_num) {
183 error_setg(errp, "Bus %d is already in use", pxb_bus_num);
184 return;
185 }
186 }
187 QLIST_INSERT_HEAD(&pci_get_bus(dev)->child, pxb_bus, sibling);
188 }
189
190 static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin)
191 {
192 PCIDevice *pxb = pci_get_bus(pci_dev)->parent_dev;
193
194 /*
195 * The bios does not index the pxb slot number when
196 * it computes the IRQ because it resides on bus 0
197 * and not on the current bus.
198 * However QEMU routes the irq through bus 0 and adds
199 * the pxb slot to the IRQ computation of the PXB
200 * device.
201 *
202 * Synchronize between bios and QEMU by canceling
203 * pxb's effect.
204 */
205 return pin - PCI_SLOT(pxb->devfn);
206 }
207
208 static gint pxb_compare(gconstpointer a, gconstpointer b)
209 {
210 const PXBDev *pxb_a = a, *pxb_b = b;
211
212 return pxb_a->bus_nr < pxb_b->bus_nr ? -1 :
213 pxb_a->bus_nr > pxb_b->bus_nr ? 1 :
214 0;
215 }
216
217 static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp)
218 {
219 PXBDev *pxb = convert_to_pxb(dev);
220 DeviceState *ds, *bds = NULL;
221 PCIBus *bus;
222 const char *dev_name = NULL;
223 Error *local_err = NULL;
224 MachineState *ms = MACHINE(qdev_get_machine());
225
226 if (ms->numa_state == NULL) {
227 error_setg(errp, "NUMA is not supported by this machine-type");
228 return;
229 }
230
231 if (pxb->numa_node != NUMA_NODE_UNASSIGNED &&
232 pxb->numa_node >= ms->numa_state->num_nodes) {
233 error_setg(errp, "Illegal numa node %d", pxb->numa_node);
234 return;
235 }
236
237 if (dev->qdev.id && *dev->qdev.id) {
238 dev_name = dev->qdev.id;
239 }
240
241 ds = qdev_new(TYPE_PXB_HOST);
242 if (pcie) {
243 bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS);
244 } else {
245 bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS);
246 bds = qdev_new("pci-bridge");
247 bds->id = dev_name;
248 qdev_prop_set_uint8(bds, PCI_BRIDGE_DEV_PROP_CHASSIS_NR, pxb->bus_nr);
249 qdev_prop_set_bit(bds, PCI_BRIDGE_DEV_PROP_SHPC, false);
250 }
251
252 bus->parent_dev = dev;
253 bus->address_space_mem = pci_get_bus(dev)->address_space_mem;
254 bus->address_space_io = pci_get_bus(dev)->address_space_io;
255 bus->map_irq = pxb_map_irq_fn;
256
257 PCI_HOST_BRIDGE(ds)->bus = bus;
258
259 pxb_register_bus(dev, bus, &local_err);
260 if (local_err) {
261 error_propagate(errp, local_err);
262 goto err_register_bus;
263 }
264
265 sysbus_realize_and_unref(SYS_BUS_DEVICE(ds), &error_fatal);
266 if (bds) {
267 qdev_realize_and_unref(bds, &bus->qbus, &error_fatal);
268 }
269
270 pci_word_test_and_set_mask(dev->config + PCI_STATUS,
271 PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK);
272 pci_config_set_class(dev->config, PCI_CLASS_BRIDGE_HOST);
273
274 pxb_dev_list = g_list_insert_sorted(pxb_dev_list, pxb, pxb_compare);
275 return;
276
277 err_register_bus:
278 object_unref(OBJECT(bds));
279 object_unparent(OBJECT(bus));
280 object_unref(OBJECT(ds));
281 }
282
283 static void pxb_dev_realize(PCIDevice *dev, Error **errp)
284 {
285 if (pci_bus_is_express(pci_get_bus(dev))) {
286 error_setg(errp, "pxb devices cannot reside on a PCIe bus");
287 return;
288 }
289
290 pxb_dev_realize_common(dev, false, errp);
291 }
292
293 static void pxb_dev_exitfn(PCIDevice *pci_dev)
294 {
295 PXBDev *pxb = convert_to_pxb(pci_dev);
296
297 pxb_dev_list = g_list_remove(pxb_dev_list, pxb);
298 }
299
300 static Property pxb_dev_properties[] = {
301 /* Note: 0 is not a legal PXB bus number. */
302 DEFINE_PROP_UINT8("bus_nr", PXBDev, bus_nr, 0),
303 DEFINE_PROP_UINT16("numa_node", PXBDev, numa_node, NUMA_NODE_UNASSIGNED),
304 DEFINE_PROP_END_OF_LIST(),
305 };
306
307 static void pxb_dev_class_init(ObjectClass *klass, void *data)
308 {
309 DeviceClass *dc = DEVICE_CLASS(klass);
310 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
311
312 k->realize = pxb_dev_realize;
313 k->exit = pxb_dev_exitfn;
314 k->vendor_id = PCI_VENDOR_ID_REDHAT;
315 k->device_id = PCI_DEVICE_ID_REDHAT_PXB;
316 k->class_id = PCI_CLASS_BRIDGE_HOST;
317
318 dc->desc = "PCI Expander Bridge";
319 device_class_set_props(dc, pxb_dev_properties);
320 dc->hotpluggable = false;
321 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
322 }
323
324 static const TypeInfo pxb_dev_info = {
325 .name = TYPE_PXB_DEVICE,
326 .parent = TYPE_PCI_DEVICE,
327 .instance_size = sizeof(PXBDev),
328 .class_init = pxb_dev_class_init,
329 .interfaces = (InterfaceInfo[]) {
330 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
331 { },
332 },
333 };
334
335 static void pxb_pcie_dev_realize(PCIDevice *dev, Error **errp)
336 {
337 if (!pci_bus_is_express(pci_get_bus(dev))) {
338 error_setg(errp, "pxb-pcie devices cannot reside on a PCI bus");
339 return;
340 }
341
342 pxb_dev_realize_common(dev, true, errp);
343 }
344
345 static void pxb_pcie_dev_class_init(ObjectClass *klass, void *data)
346 {
347 DeviceClass *dc = DEVICE_CLASS(klass);
348 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
349
350 k->realize = pxb_pcie_dev_realize;
351 k->exit = pxb_dev_exitfn;
352 k->vendor_id = PCI_VENDOR_ID_REDHAT;
353 k->device_id = PCI_DEVICE_ID_REDHAT_PXB_PCIE;
354 k->class_id = PCI_CLASS_BRIDGE_HOST;
355
356 dc->desc = "PCI Express Expander Bridge";
357 device_class_set_props(dc, pxb_dev_properties);
358 dc->hotpluggable = false;
359 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
360 }
361
362 static const TypeInfo pxb_pcie_dev_info = {
363 .name = TYPE_PXB_PCIE_DEVICE,
364 .parent = TYPE_PCI_DEVICE,
365 .instance_size = sizeof(PXBDev),
366 .class_init = pxb_pcie_dev_class_init,
367 .interfaces = (InterfaceInfo[]) {
368 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
369 { },
370 },
371 };
372
373 static void pxb_register_types(void)
374 {
375 type_register_static(&pxb_bus_info);
376 type_register_static(&pxb_pcie_bus_info);
377 type_register_static(&pxb_host_info);
378 type_register_static(&pxb_dev_info);
379 type_register_static(&pxb_pcie_dev_info);
380 }
381
382 type_init(pxb_register_types)