sm501: Add missing arbitration control register
[qemu.git] / hw / pci-host / grackle.c
1 /*
2 * QEMU Grackle PCI host (heathrow OldWorld PowerMac)
3 *
4 * Copyright (c) 2006-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
26 #include "qemu/osdep.h"
27 #include "hw/pci/pci_host.h"
28 #include "hw/ppc/mac.h"
29 #include "hw/pci/pci.h"
30
31 /* debug Grackle */
32 //#define DEBUG_GRACKLE
33
34 #ifdef DEBUG_GRACKLE
35 #define GRACKLE_DPRINTF(fmt, ...) \
36 do { printf("GRACKLE: " fmt , ## __VA_ARGS__); } while (0)
37 #else
38 #define GRACKLE_DPRINTF(fmt, ...)
39 #endif
40
41 #define GRACKLE_PCI_HOST_BRIDGE(obj) \
42 OBJECT_CHECK(GrackleState, (obj), TYPE_GRACKLE_PCI_HOST_BRIDGE)
43
44 typedef struct GrackleState {
45 PCIHostState parent_obj;
46
47 MemoryRegion pci_mmio;
48 MemoryRegion pci_hole;
49 } GrackleState;
50
51 /* Don't know if this matches real hardware, but it agrees with OHW. */
52 static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num)
53 {
54 return (irq_num + (pci_dev->devfn >> 3)) & 3;
55 }
56
57 static void pci_grackle_set_irq(void *opaque, int irq_num, int level)
58 {
59 qemu_irq *pic = opaque;
60
61 GRACKLE_DPRINTF("set_irq num %d level %d\n", irq_num, level);
62 qemu_set_irq(pic[irq_num + 0x15], level);
63 }
64
65 PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
66 MemoryRegion *address_space_mem,
67 MemoryRegion *address_space_io)
68 {
69 DeviceState *dev;
70 SysBusDevice *s;
71 PCIHostState *phb;
72 GrackleState *d;
73
74 dev = qdev_create(NULL, TYPE_GRACKLE_PCI_HOST_BRIDGE);
75 s = SYS_BUS_DEVICE(dev);
76 phb = PCI_HOST_BRIDGE(dev);
77 d = GRACKLE_PCI_HOST_BRIDGE(dev);
78
79 memory_region_init(&d->pci_mmio, OBJECT(s), "pci-mmio", 0x100000000ULL);
80 memory_region_init_alias(&d->pci_hole, OBJECT(s), "pci-hole", &d->pci_mmio,
81 0x80000000ULL, 0x7e000000ULL);
82 memory_region_add_subregion(address_space_mem, 0x80000000ULL,
83 &d->pci_hole);
84
85 phb->bus = pci_register_bus(dev, NULL,
86 pci_grackle_set_irq,
87 pci_grackle_map_irq,
88 pic,
89 &d->pci_mmio,
90 address_space_io,
91 0, 4, TYPE_PCI_BUS);
92
93 pci_create_simple(phb->bus, 0, "grackle");
94 qdev_init_nofail(dev);
95
96 sysbus_mmio_map(s, 0, base);
97 sysbus_mmio_map(s, 1, base + 0x00200000);
98
99 return phb->bus;
100 }
101
102 static int pci_grackle_init_device(SysBusDevice *dev)
103 {
104 PCIHostState *phb;
105
106 phb = PCI_HOST_BRIDGE(dev);
107
108 memory_region_init_io(&phb->conf_mem, OBJECT(dev), &pci_host_conf_le_ops,
109 dev, "pci-conf-idx", 0x1000);
110 memory_region_init_io(&phb->data_mem, OBJECT(dev), &pci_host_data_le_ops,
111 dev, "pci-data-idx", 0x1000);
112 sysbus_init_mmio(dev, &phb->conf_mem);
113 sysbus_init_mmio(dev, &phb->data_mem);
114
115 return 0;
116 }
117
118 static void grackle_pci_host_realize(PCIDevice *d, Error **errp)
119 {
120 d->config[0x09] = 0x01;
121 }
122
123 static void grackle_pci_class_init(ObjectClass *klass, void *data)
124 {
125 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
126 DeviceClass *dc = DEVICE_CLASS(klass);
127
128 k->realize = grackle_pci_host_realize;
129 k->vendor_id = PCI_VENDOR_ID_MOTOROLA;
130 k->device_id = PCI_DEVICE_ID_MOTOROLA_MPC106;
131 k->revision = 0x00;
132 k->class_id = PCI_CLASS_BRIDGE_HOST;
133 /*
134 * PCI-facing part of the host bridge, not usable without the
135 * host-facing part, which can't be device_add'ed, yet.
136 */
137 dc->cannot_instantiate_with_device_add_yet = true;
138 }
139
140 static const TypeInfo grackle_pci_info = {
141 .name = "grackle",
142 .parent = TYPE_PCI_DEVICE,
143 .instance_size = sizeof(PCIDevice),
144 .class_init = grackle_pci_class_init,
145 };
146
147 static void pci_grackle_class_init(ObjectClass *klass, void *data)
148 {
149 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
150 DeviceClass *dc = DEVICE_CLASS(klass);
151
152 k->init = pci_grackle_init_device;
153 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
154 }
155
156 static const TypeInfo grackle_pci_host_info = {
157 .name = TYPE_GRACKLE_PCI_HOST_BRIDGE,
158 .parent = TYPE_PCI_HOST_BRIDGE,
159 .instance_size = sizeof(GrackleState),
160 .class_init = pci_grackle_class_init,
161 };
162
163 static void grackle_register_types(void)
164 {
165 type_register_static(&grackle_pci_info);
166 type_register_static(&grackle_pci_host_info);
167 }
168
169 type_init(grackle_register_types)