capstone: Update to upstream "next" branch
[qemu.git] / hw / pci-host / xen_igd_pt.c
1 /*
2 * QEMU Intel IGD Passthrough Host Bridge Emulation
3 *
4 * Copyright (c) 2006 Fabrice Bellard
5 *
6 * SPDX-License-Identifier: MIT
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 */
26
27 #include "qemu/osdep.h"
28 #include "hw/pci/pci.h"
29 #include "hw/pci/pci_host.h"
30 #include "hw/pci-host/i440fx.h"
31 #include "qapi/error.h"
32
33 typedef struct {
34 uint8_t offset;
35 uint8_t len;
36 } IGDHostInfo;
37
38 /* Here we just expose minimal host bridge offset subset. */
39 static const IGDHostInfo igd_host_bridge_infos[] = {
40 {PCI_REVISION_ID, 2},
41 {PCI_SUBSYSTEM_VENDOR_ID, 2},
42 {PCI_SUBSYSTEM_ID, 2},
43 {0x50, 2}, /* SNB: processor graphics control register */
44 {0x52, 2}, /* processor graphics control register */
45 {0xa4, 4}, /* SNB: graphics base of stolen memory */
46 {0xa8, 4}, /* SNB: base of GTT stolen memory */
47 };
48
49 static void host_pci_config_read(int pos, int len, uint32_t *val, Error **errp)
50 {
51 int rc, config_fd;
52 /* Access real host bridge. */
53 char *path = g_strdup_printf("/sys/bus/pci/devices/%04x:%02x:%02x.%d/%s",
54 0, 0, 0, 0, "config");
55
56 config_fd = open(path, O_RDWR);
57 if (config_fd < 0) {
58 error_setg_errno(errp, errno, "Failed to open: %s", path);
59 goto out;
60 }
61
62 if (lseek(config_fd, pos, SEEK_SET) != pos) {
63 error_setg_errno(errp, errno, "Failed to seek: %s", path);
64 goto out_close_fd;
65 }
66
67 do {
68 rc = read(config_fd, (uint8_t *)val, len);
69 } while (rc < 0 && (errno == EINTR || errno == EAGAIN));
70 if (rc != len) {
71 error_setg_errno(errp, errno, "Failed to read: %s", path);
72 }
73
74 out_close_fd:
75 close(config_fd);
76 out:
77 g_free(path);
78 }
79
80 static void igd_pt_i440fx_realize(PCIDevice *pci_dev, Error **errp)
81 {
82 ERRP_GUARD();
83 uint32_t val = 0;
84 size_t i;
85 int pos, len;
86
87 for (i = 0; i < ARRAY_SIZE(igd_host_bridge_infos); i++) {
88 pos = igd_host_bridge_infos[i].offset;
89 len = igd_host_bridge_infos[i].len;
90 host_pci_config_read(pos, len, &val, errp);
91 if (*errp) {
92 return;
93 }
94 pci_default_write_config(pci_dev, pos, val, len);
95 }
96 }
97
98 static void igd_passthrough_i440fx_class_init(ObjectClass *klass, void *data)
99 {
100 DeviceClass *dc = DEVICE_CLASS(klass);
101 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
102
103 k->realize = igd_pt_i440fx_realize;
104 dc->desc = "IGD Passthrough Host bridge";
105 }
106
107 static const TypeInfo igd_passthrough_i440fx_info = {
108 .name = TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE,
109 .parent = TYPE_I440FX_PCI_DEVICE,
110 .instance_size = sizeof(PCII440FXState),
111 .class_init = igd_passthrough_i440fx_class_init,
112 };
113
114 static void igd_pt_i440fx_register_types(void)
115 {
116 type_register_static(&igd_passthrough_i440fx_info);
117 }
118
119 type_init(igd_pt_i440fx_register_types)